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llvm-svn: 273858
This commit is contained in:
NAKAMURA Takumi 2016-06-27 10:26:25 +00:00
parent 5688c0f82f
commit 2aa0a231a2
2 changed files with 0 additions and 3 deletions
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2
lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
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@ -7,7 +7,6 @@
//
//===----------------------------------------------------------------------===//
#include "SIMachineFunctionInfo.h"
#include "AMDGPUSubtarget.h"
#include "SIInstrInfo.h"
@ -208,7 +207,6 @@ SIMachineFunctionInfo::SpilledReg SIMachineFunctionInfo::getSpilledReg (
// We have no VGPRs left for spilling SGPRs.
return Spill;
LaneVGPRs[LaneVGPRIdx] = LaneVGPR;
// Add this register as live-in to all blocks to avoid machine verifer

1
lib/Target/AMDGPU/SIMachineFunctionInfo.h
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@ -106,7 +106,6 @@ private:
bool WorkItemIDY : 1;
bool WorkItemIDZ : 1;
MCPhysReg getNextUserSGPR() const {
assert(NumSystemSGPRs == 0 && "System SGPRs must be added after user SGPRs");
return AMDGPU::SGPR0 + NumUserSGPRs;