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RegAlloc: Fix assert if all registers in class reserved

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With a context instruction, this would produce a context
error. However, it would continue on and do an out of bounds access of
the empty allocation order array.
This commit is contained in:
Matt Arsenault 2021-01-18 09:53:55 -05:00
parent d78e6d4720
commit 2ac4ab5c26
2 changed files with 26 additions and 4 deletions
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12
lib/CodeGen/RegAllocBase.cpp
View File

@ -124,7 +124,12 @@ void RegAllocBase::allocatePhysRegs() {
if (MI->isInlineAsm())
break;
}
if (MI && MI->isInlineAsm()) {
const TargetRegisterClass *RC = MRI->getRegClass(VirtReg->reg());
ArrayRef<MCPhysReg> AllocOrder = RegClassInfo.getOrder(RC);
if (AllocOrder.empty())
report_fatal_error("no registers from class available to allocate");
else if (MI && MI->isInlineAsm()) {
MI->emitError("inline assembly requires more registers than available");
} else if (MI) {
LLVMContext &Context =
@ -133,10 +138,9 @@ void RegAllocBase::allocatePhysRegs() {
} else {
report_fatal_error("ran out of registers during register allocation");
}
// Keep going after reporting the error.
VRM->assignVirt2Phys(
VirtReg->reg(),
RegClassInfo.getOrder(MRI->getRegClass(VirtReg->reg())).front());
VRM->assignVirt2Phys(VirtReg->reg(), AllocOrder.front());
continue;
}

18
test/CodeGen/AMDGPU/alloc-all-regs-reserved-in-class.mir Normal file
View File

@ -0,0 +1,18 @@
# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=greedy -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s
# Check that there isn't an assert if we try to allocate a virtual register from
# a class where all registers are reserved. All AGPRs are reserved on subtargets
# that do not have them.
# CHECK-NOT: ran out of registers during register allocation
# CHECK: LLVM ERROR: no registers from class available to allocate
# CHECK-NOT: ran out of registers during register allocation
---
name: use_agpr
tracksRegLiveness: true
body: |
bb.0:
%0:agpr_32 = IMPLICIT_DEF
S_ENDPGM 0, implicit %0
...