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[NVPTX] Lower integer absolute value idiom to abs instruction.

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Summary: Previously we lowered it literally, to shifts and xors.

Reviewers: tra

Subscribers: jholewinski, llvm-commits

Differential Revision: https://reviews.llvm.org/D28722

llvm-svn: 292303
This commit is contained in:
Justin Lebar 2017-01-18 00:08:44 +00:00
parent 8dc6f0597a
commit 2af1dc95bf
2 changed files with 43 additions and 0 deletions
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12
lib/Target/NVPTX/NVPTXInstrInfo.td
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@ -516,6 +516,18 @@ defm UDIV : I3<"div.u", udiv>;
defm SREM : I3<"rem.s", srem>;
defm UREM : I3<"rem.u", urem>;
// Integer absolute value. NumBits should be one minus the bit width of RC.
// This idiom implements the algorithm at
// http://graphics.stanford.edu/~seander/bithacks.html#IntegerAbs.
multiclass ABS<RegisterClass RC, int NumBits, string SizeName> {
def : NVPTXInst<(outs RC:$dst), (ins RC:$a),
!strconcat("abs", SizeName, " \t$dst, $a;"),
[(set RC:$dst, (xor (add (sra RC:$a, (i32 NumBits)), RC:$a),
(sra RC:$a, (i32 NumBits))))]>;
}
defm ABS_16 : ABS<Int16Regs, 15, ".s16">;
defm ABS_32 : ABS<Int32Regs, 31, ".s32">;
defm ABS_64 : ABS<Int64Regs, 63, ".s64">;
//
// Wide multiplication

31
test/CodeGen/NVPTX/idioms.ll Normal file
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@ -0,0 +1,31 @@
; Check that various LLVM idioms get lowered to NVPTX as expected.
; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s
; CHECK-LABEL: abs_i16(
define i16 @abs_i16(i16 %a) {
; CHECK: abs.s16
%neg = sub i16 0, %a
%abs.cond = icmp sge i16 %a, 0
%abs = select i1 %abs.cond, i16 %a, i16 %neg
ret i16 %abs
}
; CHECK-LABEL: abs_i32(
define i32 @abs_i32(i32 %a) {
; CHECK: abs.s32
%neg = sub i32 0, %a
%abs.cond = icmp sge i32 %a, 0
%abs = select i1 %abs.cond, i32 %a, i32 %neg
ret i32 %abs
}
; CHECK-LABEL: abs_i64(
define i64 @abs_i64(i64 %a) {
; CHECK: abs.s64
%neg = sub i64 0, %a
%abs.cond = icmp sge i64 %a, 0
%abs = select i1 %abs.cond, i64 %a, i64 %neg
ret i64 %abs
}