1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-20 19:42:54 +02:00

[mips] Custom-lower i64 MULHS and MULHU nodes. Remove the code which selects

multiply instructions in MipsSEDAGToDAGISel.

This patch was supposed to be part of r178403.

llvm-svn: 179314
This commit is contained in:
Akira Hatanaka 2013-04-11 19:29:26 +00:00
parent 10518e983d
commit 2b0ffc5124
2 changed files with 4 additions and 64 deletions

View File

@ -182,27 +182,6 @@ void MipsSEDAGToDAGISel::processFunctionAfterISel(MachineFunction &MF) {
replaceUsesWithZeroReg(MRI, *I);
}
/// Select multiply instructions.
std::pair<SDNode*, SDNode*>
MipsSEDAGToDAGISel::selectMULT(SDNode *N, unsigned Opc, DebugLoc DL, EVT Ty,
bool HasLo, bool HasHi) {
SDNode *Lo = 0, *Hi = 0;
SDNode *Mul = CurDAG->getMachineNode(Opc, DL, MVT::Glue, N->getOperand(0),
N->getOperand(1));
SDValue InFlag = SDValue(Mul, 0);
if (HasLo) {
unsigned Opcode = (Ty == MVT::i32 ? Mips::MFLO : Mips::MFLO64);
Lo = CurDAG->getMachineNode(Opcode, DL, Ty, MVT::Glue, InFlag);
InFlag = SDValue(Lo, 1);
}
if (HasHi) {
unsigned Opcode = (Ty == MVT::i32 ? Mips::MFHI : Mips::MFHI64);
Hi = CurDAG->getMachineNode(Opcode, DL, Ty, InFlag);
}
return std::make_pair(Lo, Hi);
}
SDNode *MipsSEDAGToDAGISel::selectAddESubE(unsigned MOp, SDValue InFlag,
SDValue CmpLHS, DebugLoc DL,
SDNode *Node) const {
@ -312,9 +291,7 @@ std::pair<bool, SDNode*> MipsSEDAGToDAGISel::selectNode(SDNode *Node) {
// Instruction Selection not handled by the auto-generated
// tablegen selection should be handled here.
///
EVT NodeTy = Node->getValueType(0);
SDNode *Result;
unsigned MultOpc;
switch(Opcode) {
default: break;
@ -331,46 +308,6 @@ std::pair<bool, SDNode*> MipsSEDAGToDAGISel::selectNode(SDNode *Node) {
return std::make_pair(true, Result);
}
/// Mul with two results
case ISD::SMUL_LOHI:
case ISD::UMUL_LOHI: {
if (NodeTy == MVT::i32)
MultOpc = (Opcode == ISD::UMUL_LOHI ? Mips::MULTu : Mips::MULT);
else
MultOpc = (Opcode == ISD::UMUL_LOHI ? Mips::DMULTu : Mips::DMULT);
std::pair<SDNode*, SDNode*> LoHi = selectMULT(Node, MultOpc, DL, NodeTy,
true, true);
if (!SDValue(Node, 0).use_empty())
ReplaceUses(SDValue(Node, 0), SDValue(LoHi.first, 0));
if (!SDValue(Node, 1).use_empty())
ReplaceUses(SDValue(Node, 1), SDValue(LoHi.second, 0));
return std::make_pair(true, (SDNode*)NULL);
}
/// Special Muls
case ISD::MUL: {
// Mips32 has a 32-bit three operand mul instruction.
if (Subtarget.hasMips32() && NodeTy == MVT::i32)
break;
MultOpc = NodeTy == MVT::i32 ? Mips::MULT : Mips::DMULT;
Result = selectMULT(Node, MultOpc, DL, NodeTy, true, false).first;
return std::make_pair(true, Result);
}
case ISD::MULHS:
case ISD::MULHU: {
if (NodeTy == MVT::i32)
MultOpc = (Opcode == ISD::MULHU ? Mips::MULTu : Mips::MULT);
else
MultOpc = (Opcode == ISD::MULHU ? Mips::DMULTu : Mips::DMULT);
Result = selectMULT(Node, MultOpc, DL, NodeTy, false, true).second;
return std::make_pair(true, Result);
}
case ISD::ConstantFP: {
ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(Node);
if (Node->getValueType(0) == MVT::f64 && CN->isExactlyValue(+0.0)) {

View File

@ -68,8 +68,11 @@ MipsSETargetLowering::MipsSETargetLowering(MipsTargetMachine &TM)
setOperationAction(ISD::MULHS, MVT::i32, Custom);
setOperationAction(ISD::MULHU, MVT::i32, Custom);
if (HasMips64)
if (HasMips64) {
setOperationAction(ISD::MULHS, MVT::i64, Custom);
setOperationAction(ISD::MULHU, MVT::i64, Custom);
setOperationAction(ISD::MUL, MVT::i64, Custom);
}
setOperationAction(ISD::SDIVREM, MVT::i32, Custom);
setOperationAction(ISD::UDIVREM, MVT::i32, Custom);