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Fix mmx paddq, add support for the 'y' register class, though it isn't tested.
llvm-svn: 35940
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@ -321,6 +321,7 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM)
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setOperationAction(ISD::ADD, MVT::v8i8, Legal);
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setOperationAction(ISD::ADD, MVT::v4i16, Legal);
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setOperationAction(ISD::ADD, MVT::v2i32, Legal);
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setOperationAction(ISD::ADD, MVT::v1i64, Legal);
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setOperationAction(ISD::SUB, MVT::v8i8, Legal);
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setOperationAction(ISD::SUB, MVT::v4i16, Legal);
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@ -4636,7 +4637,10 @@ X86TargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
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else if (VT == MVT::i8)
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return std::make_pair(0U, X86::GR8RegisterClass);
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break;
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// FIXME: not handling MMX registers yet ('y' constraint).
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case 'y': // MMX_REGS if MMX allowed.
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if (!Subtarget->hasMMX()) break;
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return std::make_pair(0U, X86::VR64RegisterClass);
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break;
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case 'Y': // SSE_REGS if SSE2 allowed
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if (!Subtarget->hasSSE2()) break;
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// FALL THROUGH.
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