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AMDGPU: Fix crash with invariant markers
The promote alloca pass didn't handle these intrinsics and crashed. These intrinsics should accept any address space, but for now just erase them to avoid breaking. llvm-svn: 258537
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@ -412,6 +412,14 @@ void AMDGPUPromoteAlloca::visitAlloca(AllocaInst &I) {
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Intr->eraseFromParent();
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continue;
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}
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case Intrinsic::invariant_start:
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case Intrinsic::invariant_end:
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case Intrinsic::invariant_group_barrier:
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Intr->eraseFromParent();
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// FIXME: I think the invariant marker should still theoretically apply,
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// but the intrinsics need to be changed to accept pointers with any
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// address space.
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continue;
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default:
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Intr->dump();
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llvm_unreachable("Don't know how to promote alloca intrinsic use.");
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25
test/CodeGen/AMDGPU/promote-alloca-invariant-markers.ll
Normal file
25
test/CodeGen/AMDGPU/promote-alloca-invariant-markers.ll
Normal file
@ -0,0 +1,25 @@
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; RUN: llc -march=amdgcn -mattr=+promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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declare {}* @llvm.invariant.start(i64, i8* nocapture) #0
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declare void @llvm.invariant.end({}*, i64, i8* nocapture) #0
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declare i8* @llvm.invariant.group.barrier(i8*) #1
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; GCN-LABEL: {{^}}use_invariant_promotable_lds:
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; GCN: buffer_load_dword
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; GCN: ds_write_b32
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define void @use_invariant_promotable_lds(i32 addrspace(1)* %arg) #2 {
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bb:
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%tmp = alloca i32, align 4
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%tmp1 = bitcast i32* %tmp to i8*
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%tmp2 = getelementptr inbounds i32, i32 addrspace(1)* %arg, i64 1
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%tmp3 = load i32, i32 addrspace(1)* %tmp2
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store i32 %tmp3, i32* %tmp
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%tmp4 = call {}* @llvm.invariant.start(i64 4, i8* %tmp1) #0
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call void @llvm.invariant.end({}* %tmp4, i64 4, i8* %tmp1) #0
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%tmp5 = call i8* @llvm.invariant.group.barrier(i8* %tmp1) #1
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ret void
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}
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attributes #0 = { argmemonly nounwind }
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attributes #1 = { nounwind readnone }
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attributes #2 = { nounwind }
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