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Pull DAG ISel generation nodes out of the PowerPC backend to where they
can be used by other targets. For those targets that want to use it, have at. :) llvm-svn: 23680
This commit is contained in:
Chris Lattner
parent
097b306215
commit
2b9c260832
@ -241,94 +241,7 @@ class Target {
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list<AsmWriter> AssemblyWriters = [DefaultAsmWriter];
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}
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//===----------------------------------------------------------------------===//
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// DAG node definitions used by the instruction selector.
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// Pull in the common support for DAG isel generation
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//
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// NOTE: all of this is a work-in-progress and should be ignored for now.
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//
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/*
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class Expander<dag pattern, list<dag> result> {
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dag Pattern = pattern;
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list<dag> Result = result;
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}
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class DagNodeValType;
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def DNVT_any : DagNodeValType; // No constraint on tree node
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def DNVT_void : DagNodeValType; // Tree node always returns void
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def DNVT_val : DagNodeValType; // A non-void type
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def DNVT_arg0 : DagNodeValType; // Tree node returns same type as Arg0
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def DNVT_arg1 : DagNodeValType; // Tree node returns same type as Arg1
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def DNVT_ptr : DagNodeValType; // The target pointer type
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def DNVT_i8 : DagNodeValType; // Always have an i8 value
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class DagNode<DagNodeValType ret, list<DagNodeValType> args> {
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DagNodeValType RetType = ret;
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list<DagNodeValType> ArgTypes = args;
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string EnumName = ?;
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}
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// BuiltinDagNodes are built into the instruction selector and correspond to
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// enum values.
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class BuiltinDagNode<DagNodeValType Ret, list<DagNodeValType> Args,
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string Ename> : DagNode<Ret, Args> {
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let EnumName = Ename;
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}
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// Magic nodes...
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def Void : RegisterClass<isVoid,0,[]> { let isDummyClass = 1; }
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def set : DagNode<DNVT_void, [DNVT_val, DNVT_arg0]>;
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def chain : BuiltinDagNode<DNVT_void, [DNVT_void, DNVT_void], "ChainNode">;
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def blockchain : BuiltinDagNode<DNVT_void, [DNVT_void, DNVT_void],
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"BlockChainNode">;
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def ChainExpander : Expander<(chain Void, Void), []>;
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def BlockChainExpander : Expander<(blockchain Void, Void), []>;
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// Terminals...
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def imm : BuiltinDagNode<DNVT_val, [], "Constant">;
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def frameidx : BuiltinDagNode<DNVT_ptr, [], "FrameIndex">;
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def basicblock : BuiltinDagNode<DNVT_ptr, [], "BasicBlock">;
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// Arithmetic...
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def plus : BuiltinDagNode<DNVT_arg0, [DNVT_arg1, DNVT_arg0], "Plus">;
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def minus : BuiltinDagNode<DNVT_arg0, [DNVT_arg1, DNVT_arg0], "Minus">;
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def times : BuiltinDagNode<DNVT_arg0, [DNVT_arg1, DNVT_arg0], "Times">;
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def sdiv : BuiltinDagNode<DNVT_arg0, [DNVT_arg1, DNVT_arg0], "SDiv">;
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def udiv : BuiltinDagNode<DNVT_arg0, [DNVT_arg1, DNVT_arg0], "UDiv">;
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def srem : BuiltinDagNode<DNVT_arg0, [DNVT_arg1, DNVT_arg0], "SRem">;
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def urem : BuiltinDagNode<DNVT_arg0, [DNVT_arg1, DNVT_arg0], "URem">;
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def and : BuiltinDagNode<DNVT_arg0, [DNVT_arg1, DNVT_arg0], "And">;
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def or : BuiltinDagNode<DNVT_arg0, [DNVT_arg1, DNVT_arg0], "Or">;
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def xor : BuiltinDagNode<DNVT_arg0, [DNVT_arg1, DNVT_arg0], "Xor">;
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// Comparisons...
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def seteq : BuiltinDagNode<DNVT_i8 , [DNVT_arg1, DNVT_arg0], "SetEQ">;
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def setne : BuiltinDagNode<DNVT_i8 , [DNVT_arg1, DNVT_arg0], "SetNE">;
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def setlt : BuiltinDagNode<DNVT_i8 , [DNVT_arg1, DNVT_arg0], "SetLT">;
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def setle : BuiltinDagNode<DNVT_i8 , [DNVT_arg1, DNVT_arg0], "SetLE">;
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def setgt : BuiltinDagNode<DNVT_i8 , [DNVT_arg1, DNVT_arg0], "SetGT">;
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def setge : BuiltinDagNode<DNVT_i8 , [DNVT_arg1, DNVT_arg0], "SetGE">;
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def load : BuiltinDagNode<DNVT_val, [DNVT_ptr], "Load">;
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//def store : BuiltinDagNode<DNVT_Void, [DNVT_ptr, DNVT_val]>;
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// Other...
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def ret : BuiltinDagNode<DNVT_void, [DNVT_val], "Ret">;
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def retvoid : BuiltinDagNode<DNVT_void, [], "RetVoid">;
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def br : BuiltinDagNode<DNVT_void, [DNVT_ptr], "Br">;
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def brcond : BuiltinDagNode<DNVT_void, [DNVT_i8, DNVT_ptr, DNVT_ptr],
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"BrCond">;
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def unspec1 : BuiltinDagNode<DNVT_any , [DNVT_val], "Unspec1">;
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def unspec2 : BuiltinDagNode<DNVT_any , [DNVT_val, DNVT_val], "Unspec2">;
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//===----------------------------------------------------------------------===//
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// DAG nonterminals definitions used by the instruction selector...
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//
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class Nonterminal<dag pattern> {
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dag Pattern = pattern;
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bit BuiltIn = 0;
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}
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*/
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include "../TargetSelectionDAG.td"
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214
lib/Target/TargetSelectionDAG.td
Normal file
214
lib/Target/TargetSelectionDAG.td
Normal file
@ -0,0 +1,214 @@
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//===- TargetSelectionDAG.td - Common code for DAG isels ---*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the target-independent interfaces used by SelectionDAG
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// instruction selection generators.
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Selection DAG Type Constraint definitions.
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//
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// Note that the semantics of these constraints are hard coded into tblgen. To
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// modify or add constraints, you have to hack tblgen.
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//
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class SDTypeConstraint<int opnum> {
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int OperandNum = opnum;
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}
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// SDTCisVT - The specified operand has exactly this VT.
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class SDTCisVT <int OpNum, ValueType vt> : SDTypeConstraint<OpNum> {
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ValueType VT = vt;
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}
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// SDTCisInt - The specified operand is has integer type.
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class SDTCisInt<int OpNum> : SDTypeConstraint<OpNum>;
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// SDTCisFP - The specified operand is has floating point type.
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class SDTCisFP <int OpNum> : SDTypeConstraint<OpNum>;
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// SDTCisSameAs - The two specified operands have identical types.
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class SDTCisSameAs<int OpNum, int OtherOp> : SDTypeConstraint<OpNum> {
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int OtherOperandNum = OtherOp;
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}
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// SDTCisVTSmallerThanOp - The specified operand is a VT SDNode, and its type is
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// smaller than the 'Other' operand.
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class SDTCisVTSmallerThanOp<int OpNum, int OtherOp> : SDTypeConstraint<OpNum> {
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int OtherOperandNum = OtherOp;
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}
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//===----------------------------------------------------------------------===//
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// Selection DAG Type Profile definitions.
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//
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// These use the constraints defined above to describe the type requirements of
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// the various nodes. These are not hard coded into tblgen, allowing targets to
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// add their own if needed.
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//
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// SDTypeProfile - This profile describes the type requirements of a Selection
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// DAG node.
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class SDTypeProfile<int numresults, int numoperands,
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list<SDTypeConstraint> constraints> {
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int NumResults = numresults;
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int NumOperands = numoperands;
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list<SDTypeConstraint> Constraints = constraints;
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}
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// Builtin profiles.
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def SDTImm : SDTypeProfile<1, 0, [SDTCisInt<0>]>; // for 'imm'.
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def SDTVT : SDTypeProfile<1, 0, [SDTCisVT<0, OtherVT>]>; // for 'vt'
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def SDTIntBinOp : SDTypeProfile<1, 2, [ // add, and, or, xor, udiv, etc.
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SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisInt<0>
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]>;
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def SDTFPBinOp : SDTypeProfile<1, 2, [ // fadd, fmul, etc.
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SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisFP<0>
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]>;
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def SDTIntUnaryOp : SDTypeProfile<1, 1, [ // ctlz
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SDTCisSameAs<0, 1>, SDTCisInt<0>
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]>;
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def SDTFPUnaryOp : SDTypeProfile<1, 1, [ // fneg, fsqrt, etc
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SDTCisSameAs<0, 1>, SDTCisFP<0>
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]>;
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def SDTExtInreg : SDTypeProfile<1, 2, [ // sext_inreg
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SDTCisSameAs<0, 1>, SDTCisInt<0>, SDTCisVT<2, OtherVT>,
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SDTCisVTSmallerThanOp<2, 1>
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]>;
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//===----------------------------------------------------------------------===//
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// Selection DAG Node Properties.
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//
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// Note: These are hard coded into tblgen.
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//
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class SDNodeProperty;
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def SDNPCommutative : SDNodeProperty; // X op Y == Y op X
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def SDNPAssociative : SDNodeProperty; // (X op Y) op Z == X op (Y op Z)
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//===----------------------------------------------------------------------===//
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// Selection DAG Node definitions.
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//
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class SDNode<string opcode, SDTypeProfile typeprof,
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list<SDNodeProperty> props = [], string sdclass = "SDNode"> {
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string Opcode = opcode;
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string SDClass = sdclass;
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list<SDNodeProperty> Properties = props;
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SDTypeProfile TypeProfile = typeprof;
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}
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def set;
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def node;
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def imm : SDNode<"ISD::Constant" , SDTImm , [], "ConstantSDNode">;
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def vt : SDNode<"ISD::VALUETYPE" , SDTVT , [], "VTSDNode">;
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def add : SDNode<"ISD::ADD" , SDTIntBinOp ,
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[SDNPCommutative, SDNPAssociative]>;
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def sub : SDNode<"ISD::SUB" , SDTIntBinOp>;
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def mul : SDNode<"ISD::MUL" , SDTIntBinOp,
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[SDNPCommutative, SDNPAssociative]>;
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def mulhs : SDNode<"ISD::MULHS" , SDTIntBinOp, [SDNPCommutative]>;
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def mulhu : SDNode<"ISD::MULHU" , SDTIntBinOp, [SDNPCommutative]>;
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def sdiv : SDNode<"ISD::SDIV" , SDTIntBinOp>;
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def udiv : SDNode<"ISD::UDIV" , SDTIntBinOp>;
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def srem : SDNode<"ISD::SREM" , SDTIntBinOp>;
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def urem : SDNode<"ISD::UREM" , SDTIntBinOp>;
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def srl : SDNode<"ISD::SRL" , SDTIntBinOp>;
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def sra : SDNode<"ISD::SRA" , SDTIntBinOp>;
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def shl : SDNode<"ISD::SHL" , SDTIntBinOp>;
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def and : SDNode<"ISD::AND" , SDTIntBinOp,
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[SDNPCommutative, SDNPAssociative]>;
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def or : SDNode<"ISD::OR" , SDTIntBinOp,
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[SDNPCommutative, SDNPAssociative]>;
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def xor : SDNode<"ISD::XOR" , SDTIntBinOp,
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[SDNPCommutative, SDNPAssociative]>;
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def fadd : SDNode<"ISD::FADD" , SDTFPBinOp, [SDNPCommutative]>;
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def fsub : SDNode<"ISD::FSUB" , SDTFPBinOp>;
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def fmul : SDNode<"ISD::FMUL" , SDTFPBinOp, [SDNPCommutative]>;
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def fdiv : SDNode<"ISD::FDIV" , SDTFPBinOp>;
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def frem : SDNode<"ISD::FREM" , SDTFPBinOp>;
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def fabs : SDNode<"ISD::FABS" , SDTFPUnaryOp>;
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def fneg : SDNode<"ISD::FNEG" , SDTFPUnaryOp>;
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def fsqrt : SDNode<"ISD::FSQRT" , SDTFPUnaryOp>;
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def sext_inreg : SDNode<"ISD::SIGN_EXTEND_INREG", SDTExtInreg>;
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def ctlz : SDNode<"ISD::CTLZ" , SDTIntUnaryOp>;
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//===----------------------------------------------------------------------===//
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// Selection DAG Node Transformation Functions.
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//
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// This mechanism allows targets to manipulate nodes in the output DAG once a
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// match has been formed. This is typically used to manipulate immediate
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// values.
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//
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class SDNodeXForm<SDNode opc, code xformFunction> {
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SDNode Opcode = opc;
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code XFormFunction = xformFunction;
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}
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def NOOP_SDNodeXForm : SDNodeXForm<imm, [{}]>;
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//===----------------------------------------------------------------------===//
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// Selection DAG Pattern Fragments.
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//
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// Pattern fragments are reusable chunks of dags that match specific things.
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// They can take arguments and have C++ predicates that control whether they
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// match. They are intended to make the patterns for common instructions more
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// compact and readable.
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//
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/// PatFrag - Represents a pattern fragment. This can match something on the
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/// DAG, frame a single node to multiply nested other fragments.
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///
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class PatFrag<dag ops, dag frag, code pred = [{}],
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SDNodeXForm xform = NOOP_SDNodeXForm> {
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dag Operands = ops;
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dag Fragment = frag;
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code Predicate = pred;
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SDNodeXForm OperandTransform = xform;
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}
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// PatLeaf's are pattern fragments that have no operands. This is just a helper
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// to define immediates and other common things concisely.
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class PatLeaf<dag frag, code pred = [{}], SDNodeXForm xform = NOOP_SDNodeXForm>
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: PatFrag<(ops), frag, pred, xform>;
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// Leaf fragments.
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def immAllOnes : PatLeaf<(imm), [{ return N->isAllOnesValue(); }]>;
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def immZero : PatLeaf<(imm), [{ return N->isNullValue(); }]>;
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def vtInt : PatLeaf<(vt), [{ return MVT::isInteger(N->getVT()); }]>;
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def vtFP : PatLeaf<(vt), [{ return MVT::isFloatingPoint(N->getVT()); }]>;
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// Other helper fragments.
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def not : PatFrag<(ops node:$in), (xor node:$in, immAllOnes)>;
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def ineg : PatFrag<(ops node:$in), (sub immZero, node:$in)>;
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//===----------------------------------------------------------------------===//
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// Selection DAG Pattern Support.
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//
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// Patterns are what are actually matched against the target-flavored
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// instruction selection DAG. Instructions defined by the target implicitly
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// define patterns in most cases, but patterns can also be explicitly added when
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// an operation is defined by a sequence of instructions (e.g. loading a large
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// immediate value on RISC targets that do not support immediates as large as
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// their GPRs).
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//
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class Pattern<dag patternToMatch, list<dag> resultInstrs> {
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dag PatternToMatch = patternToMatch;
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list<dag> ResultInstrs = resultInstrs;
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}
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// Pat - A simple (but common) form of a pattern, which produces a simple result
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// not needing a full list.
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class Pat<dag pattern, dag result> : Pattern<pattern, [result]>;
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