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GlobalISel: support wider range of load/store sizes in AArch64.

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llvm-svn: 284406
This commit is contained in:
Tim Northover 2016-10-17 18:36:53 +00:00
parent e57c681680
commit 2bc7209c52
2 changed files with 168 additions and 0 deletions
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8
lib/Target/AArch64/AArch64InstructionSelector.cpp
View File

@ -222,6 +222,10 @@ static unsigned selectLoadStoreUIOp(unsigned GenericOpc, unsigned RegBankID,
switch (RegBankID) {
case AArch64::GPRRegBankID:
switch (OpSize) {
case 8:
return isStore ? AArch64::STRBBui : AArch64::LDRBBui;
case 16:
return isStore ? AArch64::STRHHui : AArch64::LDRHHui;
case 32:
return isStore ? AArch64::STRWui : AArch64::LDRWui;
case 64:
@ -229,6 +233,10 @@ static unsigned selectLoadStoreUIOp(unsigned GenericOpc, unsigned RegBankID,
}
case AArch64::FPRRegBankID:
switch (OpSize) {
case 8:
return isStore ? AArch64::STRBui : AArch64::LDRBui;
case 16:
return isStore ? AArch64::STRHui : AArch64::LDRHui;
case 32:
return isStore ? AArch64::STRSui : AArch64::LDRSui;
case 64:

160
test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir
View File

@ -79,11 +79,17 @@
define void @load_s64_gpr(i64* %addr) { ret void }
define void @load_s32_gpr(i32* %addr) { ret void }
define void @load_s16_gpr(i16* %addr) { ret void }
define void @load_s8_gpr(i8* %addr) { ret void }
define void @load_s64_fpr(i64* %addr) { ret void }
define void @load_s32_fpr(i32* %addr) { ret void }
define void @load_s16_fpr(i16* %addr) { ret void }
define void @load_s8_fpr(i8* %addr) { ret void }
define void @store_s64_gpr(i64* %addr) { ret void }
define void @store_s32_gpr(i32* %addr) { ret void }
define void @store_s16_gpr(i16* %addr) { ret void }
define void @store_s8_gpr(i8* %addr) { ret void }
define void @store_s64_fpr(i64* %addr) { ret void }
define void @store_s32_fpr(i32* %addr) { ret void }
@ -1495,6 +1501,56 @@ body: |
...
---
# CHECK-LABEL: name: load_s16_gpr
name: load_s16_gpr
legalized: true
regBankSelected: true
# CHECK: registers:
# CHECK-NEXT: - { id: 0, class: gpr64sp }
# CHECK-NEXT: - { id: 1, class: gpr32 }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
# CHECK: body:
# CHECK: %0 = COPY %x0
# CHECK: %1 = LDRHHui %0, 0 :: (load 2 from %ir.addr)
body: |
bb.0:
liveins: %x0
%0(p0) = COPY %x0
%1(s16) = G_LOAD %0 :: (load 2 from %ir.addr)
...
---
# CHECK-LABEL: name: load_s8_gpr
name: load_s8_gpr
legalized: true
regBankSelected: true
# CHECK: registers:
# CHECK-NEXT: - { id: 0, class: gpr64sp }
# CHECK-NEXT: - { id: 1, class: gpr32 }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
# CHECK: body:
# CHECK: %0 = COPY %x0
# CHECK: %1 = LDRBBui %0, 0 :: (load 1 from %ir.addr)
body: |
bb.0:
liveins: %x0
%0(p0) = COPY %x0
%1(s8) = G_LOAD %0 :: (load 1 from %ir.addr)
...
---
# CHECK-LABEL: name: load_s64_fpr
name: load_s64_fpr
@ -1545,6 +1601,56 @@ body: |
...
---
# CHECK-LABEL: name: load_s16_fpr
name: load_s16_fpr
legalized: true
regBankSelected: true
# CHECK: registers:
# CHECK-NEXT: - { id: 0, class: gpr64sp }
# CHECK-NEXT: - { id: 1, class: fpr16 }
registers:
- { id: 0, class: gpr }
- { id: 1, class: fpr }
# CHECK: body:
# CHECK: %0 = COPY %x0
# CHECK: %1 = LDRHui %0, 0 :: (load 2 from %ir.addr)
body: |
bb.0:
liveins: %x0
%0(p0) = COPY %x0
%1(s16) = G_LOAD %0 :: (load 2 from %ir.addr)
...
---
# CHECK-LABEL: name: load_s8_fpr
name: load_s8_fpr
legalized: true
regBankSelected: true
# CHECK: registers:
# CHECK-NEXT: - { id: 0, class: gpr64sp }
# CHECK-NEXT: - { id: 1, class: fpr8 }
registers:
- { id: 0, class: gpr }
- { id: 1, class: fpr }
# CHECK: body:
# CHECK: %0 = COPY %x0
# CHECK: %1 = LDRBui %0, 0 :: (load 1 from %ir.addr)
body: |
bb.0:
liveins: %x0
%0(p0) = COPY %x0
%1(s8) = G_LOAD %0 :: (load 1 from %ir.addr)
...
---
# CHECK-LABEL: name: store_s64_gpr
name: store_s64_gpr
@ -1599,6 +1705,60 @@ body: |
...
---
# CHECK-LABEL: name: store_s16_gpr
name: store_s16_gpr
legalized: true
regBankSelected: true
# CHECK: registers:
# CHECK-NEXT: - { id: 0, class: gpr64sp }
# CHECK-NEXT: - { id: 1, class: gpr32 }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
# CHECK: body:
# CHECK: %0 = COPY %x0
# CHECK: %1 = COPY %w1
# CHECK: STRHHui %1, %0, 0 :: (store 2 into %ir.addr)
body: |
bb.0:
liveins: %x0, %w1
%0(p0) = COPY %x0
%1(s16) = COPY %w1
G_STORE %1, %0 :: (store 2 into %ir.addr)
...
---
# CHECK-LABEL: name: store_s8_gpr
name: store_s8_gpr
legalized: true
regBankSelected: true
# CHECK: registers:
# CHECK-NEXT: - { id: 0, class: gpr64sp }
# CHECK-NEXT: - { id: 1, class: gpr32 }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
# CHECK: body:
# CHECK: %0 = COPY %x0
# CHECK: %1 = COPY %w1
# CHECK: STRBBui %1, %0, 0 :: (store 1 into %ir.addr)
body: |
bb.0:
liveins: %x0, %w1
%0(p0) = COPY %x0
%1(s8) = COPY %w1
G_STORE %1, %0 :: (store 1 into %ir.addr)
...
---
# CHECK-LABEL: name: store_s64_fpr
name: store_s64_fpr