From 2bfe7ae375bb0c0a655119cff265c7c1c8a021af Mon Sep 17 00:00:00 2001 From: Roman Lebedev Date: Wed, 22 Apr 2020 17:30:58 +0300 Subject: [PATCH] [NFC][InstCombine] Tests for negation of sign-/zero- extensions * sext of non-positive can be negated. * zext of non-negative can be negated. --- .../InstCombine/sub-of-negatible.ll | 147 ++++++++++++++++++ 1 file changed, 147 insertions(+) diff --git a/test/Transforms/InstCombine/sub-of-negatible.ll b/test/Transforms/InstCombine/sub-of-negatible.ll index d676c0ba093..83f86ca7a5e 100644 --- a/test/Transforms/InstCombine/sub-of-negatible.ll +++ b/test/Transforms/InstCombine/sub-of-negatible.ll @@ -675,3 +675,150 @@ define <2 x i4> @negate_shufflevector_oneinput_extrause(<2 x i4> %x, <2 x i4> %y %t2 = sub <2 x i4> %y, %t1 ret <2 x i4> %t2 } + +; zext of non-negative can be negated +; sext of non-positive can be negated +define i16 @negation_of_zeroext_of_nonnegative(i8 %x) { +; CHECK-LABEL: @negation_of_zeroext_of_nonnegative( +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-NEXT: [[T1:%.*]] = icmp sgt i8 [[T0]], -1 +; CHECK-NEXT: br i1 [[T1]], label [[NONNEG_BB:%.*]], label [[NEG_BB:%.*]] +; CHECK: nonneg_bb: +; CHECK-NEXT: [[T2:%.*]] = zext i8 [[T0]] to i16 +; CHECK-NEXT: [[T3:%.*]] = sub nsw i16 0, [[T2]] +; CHECK-NEXT: ret i16 [[T3]] +; CHECK: neg_bb: +; CHECK-NEXT: ret i16 0 +; + %t0 = sub i8 0, %x + %t1 = icmp sge i8 %t0, 0 + br i1 %t1, label %nonneg_bb, label %neg_bb + +nonneg_bb: + %t2 = zext i8 %t0 to i16 + %t3 = sub i16 0, %t2 + ret i16 %t3 + +neg_bb: + ret i16 0 +} +define i16 @negation_of_zeroext_of_positive(i8 %x) { +; CHECK-LABEL: @negation_of_zeroext_of_positive( +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-NEXT: [[T1:%.*]] = icmp sgt i8 [[T0]], 0 +; CHECK-NEXT: br i1 [[T1]], label [[NONNEG_BB:%.*]], label [[NEG_BB:%.*]] +; CHECK: nonneg_bb: +; CHECK-NEXT: [[T2:%.*]] = zext i8 [[T0]] to i16 +; CHECK-NEXT: [[T3:%.*]] = sub nsw i16 0, [[T2]] +; CHECK-NEXT: ret i16 [[T3]] +; CHECK: neg_bb: +; CHECK-NEXT: ret i16 0 +; + %t0 = sub i8 0, %x + %t1 = icmp sgt i8 %t0, 0 + br i1 %t1, label %nonneg_bb, label %neg_bb + +nonneg_bb: + %t2 = zext i8 %t0 to i16 + %t3 = sub i16 0, %t2 + ret i16 %t3 + +neg_bb: + ret i16 0 +} +define i16 @negation_of_signext_of_negative(i8 %x) { +; CHECK-LABEL: @negation_of_signext_of_negative( +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-NEXT: [[T1:%.*]] = icmp slt i8 [[T0]], 0 +; CHECK-NEXT: br i1 [[T1]], label [[NEG_BB:%.*]], label [[NONNEG_BB:%.*]] +; CHECK: neg_bb: +; CHECK-NEXT: [[T2:%.*]] = sext i8 [[T0]] to i16 +; CHECK-NEXT: [[T3:%.*]] = sub nsw i16 0, [[T2]] +; CHECK-NEXT: ret i16 [[T3]] +; CHECK: nonneg_bb: +; CHECK-NEXT: ret i16 0 +; + %t0 = sub i8 0, %x + %t1 = icmp slt i8 %t0, 0 + br i1 %t1, label %neg_bb, label %nonneg_bb + +neg_bb: + %t2 = sext i8 %t0 to i16 + %t3 = sub i16 0, %t2 + ret i16 %t3 + +nonneg_bb: + ret i16 0 +} +define i16 @negation_of_signext_of_nonpositive(i8 %x) { +; CHECK-LABEL: @negation_of_signext_of_nonpositive( +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-NEXT: [[T1:%.*]] = icmp slt i8 [[T0]], 1 +; CHECK-NEXT: br i1 [[T1]], label [[NEG_BB:%.*]], label [[NONNEG_BB:%.*]] +; CHECK: neg_bb: +; CHECK-NEXT: [[T2:%.*]] = sext i8 [[T0]] to i16 +; CHECK-NEXT: [[T3:%.*]] = sub nsw i16 0, [[T2]] +; CHECK-NEXT: ret i16 [[T3]] +; CHECK: nonneg_bb: +; CHECK-NEXT: ret i16 0 +; + %t0 = sub i8 0, %x + %t1 = icmp sle i8 %t0, 0 + br i1 %t1, label %neg_bb, label %nonneg_bb + +neg_bb: + %t2 = sext i8 %t0 to i16 + %t3 = sub i16 0, %t2 + ret i16 %t3 + +nonneg_bb: + ret i16 0 +} +define i16 @negation_of_signext_of_nonnegative__wrong_cast(i8 %x) { +; CHECK-LABEL: @negation_of_signext_of_nonnegative__wrong_cast( +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-NEXT: [[T1:%.*]] = icmp sgt i8 [[T0]], -1 +; CHECK-NEXT: br i1 [[T1]], label [[NONNEG_BB:%.*]], label [[NEG_BB:%.*]] +; CHECK: nonneg_bb: +; CHECK-NEXT: [[T2:%.*]] = sext i8 [[T0]] to i16 +; CHECK-NEXT: [[T3:%.*]] = sub nsw i16 0, [[T2]] +; CHECK-NEXT: ret i16 [[T3]] +; CHECK: neg_bb: +; CHECK-NEXT: ret i16 0 +; + %t0 = sub i8 0, %x + %t1 = icmp sge i8 %t0, 0 + br i1 %t1, label %nonneg_bb, label %neg_bb + +nonneg_bb: + %t2 = sext i8 %t0 to i16 + %t3 = sub i16 0, %t2 + ret i16 %t3 + +neg_bb: + ret i16 0 +} +define i16 @negation_of_zeroext_of_negative_wrongcast(i8 %x) { +; CHECK-LABEL: @negation_of_zeroext_of_negative_wrongcast( +; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-NEXT: [[T1:%.*]] = icmp slt i8 [[T0]], 0 +; CHECK-NEXT: br i1 [[T1]], label [[NEG_BB:%.*]], label [[NONNEG_BB:%.*]] +; CHECK: neg_bb: +; CHECK-NEXT: [[T2:%.*]] = zext i8 [[T0]] to i16 +; CHECK-NEXT: [[T3:%.*]] = sub nsw i16 0, [[T2]] +; CHECK-NEXT: ret i16 [[T3]] +; CHECK: nonneg_bb: +; CHECK-NEXT: ret i16 0 +; + %t0 = sub i8 0, %x + %t1 = icmp slt i8 %t0, 0 + br i1 %t1, label %neg_bb, label %nonneg_bb + +neg_bb: + %t2 = zext i8 %t0 to i16 + %t3 = sub i16 0, %t2 + ret i16 %t3 + +nonneg_bb: + ret i16 0 +}