RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 11:02:59 +02:00
Code Issues Projects Releases Wiki Activity

[AArch64] Reserve x18 register on Fuchsia

Browse Source 
This register is reserved as a platform register on Fuchsia.

Differential Revision: https://reviews.llvm.org/D45105

llvm-svn: 328950
This commit is contained in:
Petr Hosek 2018-04-01 23:44:04 +00:00
parent a5e7ed1410
commit 2c556dfbc3
4 changed files with 5 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
lib/Target/AArch64/AArch64Subtarget.cpp
View File

@ -151,8 +151,8 @@ AArch64Subtarget::AArch64Subtarget(const Triple &TT, const std::string &CPU,
const std::string &FS, const std::string &FS,
const TargetMachine &TM, bool LittleEndian) const TargetMachine &TM, bool LittleEndian)
: AArch64GenSubtargetInfo(TT, CPU, FS), : AArch64GenSubtargetInfo(TT, CPU, FS),
ReserveX18(TT.isOSDarwin() || TT.isOSWindows()), IsLittle(LittleEndian), ReserveX18(TT.isOSDarwin() || TT.isOSFuchsia() || TT.isOSWindows()),
TargetTriple(TT), FrameLowering(), IsLittle(LittleEndian), TargetTriple(TT), FrameLowering(),
InstrInfo(initializeSubtargetDependencies(FS, CPU)), TSInfo(), InstrInfo(initializeSubtargetDependencies(FS, CPU)), TSInfo(),
TLInfo(TM, *this) { TLInfo(TM, *this) {
CallLoweringInfo.reset(new AArch64CallLowering(*getTargetLowering())); CallLoweringInfo.reset(new AArch64CallLowering(*getTargetLowering()));

4
test/CodeGen/AArch64/aarch64-named-reg-w18.ll
View File

@ -1,10 +1,8 @@
; RUN: not llc -mtriple=aarch64-fuchsia -o - %s 2>&1 | FileCheck %s --check-prefix=ERROR ; RUN: llc -mtriple=aarch64-fuchsia -o - %s
; RUN: llc -mtriple=aarch64-fuchsia -mattr=+reserve-x18 -o - %s
define void @set_w18(i32 %x) { define void @set_w18(i32 %x) {
entry: entry:
; FIXME: Include an allocatable-specific error message ; FIXME: Include an allocatable-specific error message
; ERROR: Invalid register name "w18".
tail call void @llvm.write_register.i32(metadata !0, i32 %x) tail call void @llvm.write_register.i32(metadata !0, i32 %x)
ret void ret void
} }

4
test/CodeGen/AArch64/aarch64-named-reg-x18.ll
View File

@ -1,10 +1,8 @@
; RUN: not llc -mtriple=aarch64-fuchsia -o - %s 2>&1 | FileCheck %s --check-prefix=ERROR ; RUN: llc -mtriple=aarch64-fuchsia -o - %s
; RUN: llc -mtriple=aarch64-fuchsia -mattr=+reserve-x18 -o - %s
define void @set_x18(i64 %x) { define void @set_x18(i64 %x) {
entry: entry:
; FIXME: Include an allocatable-specific error message ; FIXME: Include an allocatable-specific error message
; ERROR: Invalid register name "x18".
tail call void @llvm.write_register.i64(metadata !0, i64 %x) tail call void @llvm.write_register.i64(metadata !0, i64 %x)
ret void ret void
} }

1
test/CodeGen/AArch64/arm64-platform-reg.ll
View File

@ -1,6 +1,7 @@
; RUN: llc -mtriple=arm64-apple-ios -mattr=+reserve-x18 -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE-X18 ; RUN: llc -mtriple=arm64-apple-ios -mattr=+reserve-x18 -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE-X18
; RUN: llc -mtriple=arm64-freebsd-gnu -mattr=+reserve-x18 -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE-X18 ; RUN: llc -mtriple=arm64-freebsd-gnu -mattr=+reserve-x18 -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE-X18
; RUN: llc -mtriple=arm64-linux-gnu -o - %s | FileCheck %s ; RUN: llc -mtriple=arm64-linux-gnu -o - %s | FileCheck %s
; RUN: llc -mtriple=aarch64-fuchsia -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE-X18
; RUN: llc -mtriple=aarch64-windows -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE-X18 ; RUN: llc -mtriple=aarch64-windows -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE-X18
; x18 is reserved as a platform register on Darwin but not on other ; x18 is reserved as a platform register on Darwin but not on other