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https://github.com/RPCS3/llvm-mirror.git
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AMDGPU: Fix constantexpr addrspacecasts
If we had a constant group address space cast the queue pointer wasn't enabled for the function, resulting in a crash on noreg later. llvm-svn: 271935
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@ -13,6 +13,7 @@
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//===----------------------------------------------------------------------===//
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#include "AMDGPU.h"
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#include "llvm/IR/Constants.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/Module.h"
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@ -42,6 +43,11 @@ public:
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AU.setPreservesAll();
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ModulePass::getAnalysisUsage(AU);
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}
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static bool visitConstantExpr(const ConstantExpr *CE);
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static bool visitConstantExprsRecursively(
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const Constant *EntryC,
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SmallPtrSet<const Constant *, 8> &ConstantExprVisited);
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};
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}
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@ -53,21 +59,79 @@ char &llvm::AMDGPUAnnotateKernelFeaturesID = AMDGPUAnnotateKernelFeatures::ID;
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INITIALIZE_PASS(AMDGPUAnnotateKernelFeatures, DEBUG_TYPE,
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"Add AMDGPU function attributes", false, false)
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static bool castRequiresQueuePtr(const AddrSpaceCastInst *ASC) {
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unsigned SrcAS = ASC->getSrcAddressSpace();
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// The queue ptr is only needed when casting to flat, not from it.
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// The queue ptr is only needed when casting to flat, not from it.
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static bool castRequiresQueuePtr(unsigned SrcAS) {
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return SrcAS == AMDGPUAS::LOCAL_ADDRESS || SrcAS == AMDGPUAS::PRIVATE_ADDRESS;
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}
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static bool castRequiresQueuePtr(const AddrSpaceCastInst *ASC) {
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return castRequiresQueuePtr(ASC->getSrcAddressSpace());
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}
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bool AMDGPUAnnotateKernelFeatures::visitConstantExpr(const ConstantExpr *CE) {
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if (CE->getOpcode() == Instruction::AddrSpaceCast) {
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unsigned SrcAS = CE->getOperand(0)->getType()->getPointerAddressSpace();
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return castRequiresQueuePtr(SrcAS);
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}
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return false;
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}
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bool AMDGPUAnnotateKernelFeatures::visitConstantExprsRecursively(
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const Constant *EntryC,
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SmallPtrSet<const Constant *, 8> &ConstantExprVisited) {
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if (!ConstantExprVisited.insert(EntryC).second)
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return false;
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SmallVector<const Constant *, 16> Stack;
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Stack.push_back(EntryC);
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while (!Stack.empty()) {
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const Constant *C = Stack.pop_back_val();
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// Check this constant expression.
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if (const auto *CE = dyn_cast<ConstantExpr>(C)) {
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if (visitConstantExpr(CE))
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return true;
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}
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// Visit all sub-expressions.
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for (const Use &U : C->operands()) {
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const auto *OpC = dyn_cast<Constant>(U);
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if (!OpC)
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continue;
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if (!ConstantExprVisited.insert(OpC).second)
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continue;
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Stack.push_back(OpC);
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}
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}
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return false;
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}
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// Return true if an addrspacecast is used that requires the queue ptr.
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bool AMDGPUAnnotateKernelFeatures::hasAddrSpaceCast(const Function &F) {
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SmallPtrSet<const Constant *, 8> ConstantExprVisited;
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for (const BasicBlock &BB : F) {
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for (const Instruction &I : BB) {
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if (const AddrSpaceCastInst *ASC = dyn_cast<AddrSpaceCastInst>(&I)) {
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if (castRequiresQueuePtr(ASC))
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return true;
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}
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for (const Use &U : I.operands()) {
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const auto *OpC = dyn_cast<Constant>(U);
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if (!OpC)
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continue;
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if (visitConstantExprsRecursively(OpC, ConstantExprVisited))
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return true;
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}
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}
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}
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@ -1334,8 +1334,11 @@ SDValue SITargetLowering::getSegmentAperture(unsigned AS,
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SDLoc SL;
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MachineFunction &MF = DAG.getMachineFunction();
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SIMachineFunctionInfo *Info = MF.getInfo<SIMachineFunctionInfo>();
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unsigned UserSGPR = Info->getQueuePtrUserSGPR();
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assert(UserSGPR != AMDGPU::NoRegister);
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SDValue QueuePtr = CreateLiveInRegister(
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DAG, &AMDGPU::SReg_64RegClass, Info->getQueuePtrUserSGPR(), MVT::i64);
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DAG, &AMDGPU::SReg_64RegClass, UserSGPR, MVT::i64);
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// Offset into amd_queue_t for group_segment_aperture_base_hi /
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// private_segment_aperture_base_hi.
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106
test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
Normal file
106
test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
Normal file
@ -0,0 +1,106 @@
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; RUN: opt -mtriple=amdgcn-unknown-amdhsa -S -amdgpu-annotate-kernel-features < %s | FileCheck -check-prefix=HSA %s
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declare void @llvm.memcpy.p1i32.p4i32.i32(i32 addrspace(1)* nocapture, i32 addrspace(4)* nocapture, i32, i32, i1) #0
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@lds.i32 = unnamed_addr addrspace(3) global i32 undef, align 4
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@lds.arr = unnamed_addr addrspace(3) global [256 x i32] undef, align 4
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@global.i32 = unnamed_addr addrspace(1) global i32 undef, align 4
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@global.arr = unnamed_addr addrspace(1) global [256 x i32] undef, align 4
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; HSA: @store_cast_0_flat_to_group_addrspacecast() #1
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define void @store_cast_0_flat_to_group_addrspacecast() #1 {
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store i32 7, i32 addrspace(3)* addrspacecast (i32 addrspace(4)* null to i32 addrspace(3)*)
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ret void
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}
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; HSA: @store_cast_0_group_to_flat_addrspacecast() #2
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define void @store_cast_0_group_to_flat_addrspacecast() #1 {
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store i32 7, i32 addrspace(4)* addrspacecast (i32 addrspace(3)* null to i32 addrspace(4)*)
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ret void
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}
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; HSA: define void @store_constant_cast_group_gv_to_flat() #2
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define void @store_constant_cast_group_gv_to_flat() #1 {
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store i32 7, i32 addrspace(4)* addrspacecast (i32 addrspace(3)* @lds.i32 to i32 addrspace(4)*)
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ret void
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}
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; HSA: @store_constant_cast_group_gv_gep_to_flat() #2
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define void @store_constant_cast_group_gv_gep_to_flat() #1 {
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store i32 7, i32 addrspace(4)* getelementptr ([256 x i32], [256 x i32] addrspace(4)* addrspacecast ([256 x i32] addrspace(3)* @lds.arr to [256 x i32] addrspace(4)*), i64 0, i64 8)
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ret void
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}
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; HSA: @store_constant_cast_global_gv_to_flat() #1
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define void @store_constant_cast_global_gv_to_flat() #1 {
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store i32 7, i32 addrspace(4)* addrspacecast (i32 addrspace(1)* @global.i32 to i32 addrspace(4)*)
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ret void
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}
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; HSA: @store_constant_cast_global_gv_gep_to_flat() #1
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define void @store_constant_cast_global_gv_gep_to_flat() #1 {
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store i32 7, i32 addrspace(4)* getelementptr ([256 x i32], [256 x i32] addrspace(4)* addrspacecast ([256 x i32] addrspace(1)* @global.arr to [256 x i32] addrspace(4)*), i64 0, i64 8)
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ret void
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}
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; HSA: @load_constant_cast_group_gv_gep_to_flat(i32 addrspace(1)* %out) #2
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define void @load_constant_cast_group_gv_gep_to_flat(i32 addrspace(1)* %out) #1 {
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%val = load i32, i32 addrspace(4)* getelementptr ([256 x i32], [256 x i32] addrspace(4)* addrspacecast ([256 x i32] addrspace(3)* @lds.arr to [256 x i32] addrspace(4)*), i64 0, i64 8)
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store i32 %val, i32 addrspace(1)* %out
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ret void
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}
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; HSA: @atomicrmw_constant_cast_group_gv_gep_to_flat(i32 addrspace(1)* %out) #2
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define void @atomicrmw_constant_cast_group_gv_gep_to_flat(i32 addrspace(1)* %out) #1 {
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%val = atomicrmw add i32 addrspace(4)* getelementptr ([256 x i32], [256 x i32] addrspace(4)* addrspacecast ([256 x i32] addrspace(3)* @lds.arr to [256 x i32] addrspace(4)*), i64 0, i64 8), i32 1 seq_cst
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store i32 %val, i32 addrspace(1)* %out
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ret void
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}
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; HSA: @cmpxchg_constant_cast_group_gv_gep_to_flat(i32 addrspace(1)* %out) #2
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define void @cmpxchg_constant_cast_group_gv_gep_to_flat(i32 addrspace(1)* %out) #1 {
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%val = cmpxchg i32 addrspace(4)* getelementptr ([256 x i32], [256 x i32] addrspace(4)* addrspacecast ([256 x i32] addrspace(3)* @lds.arr to [256 x i32] addrspace(4)*), i64 0, i64 8), i32 0, i32 1 seq_cst seq_cst
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%val0 = extractvalue { i32, i1 } %val, 0
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store i32 %val0, i32 addrspace(1)* %out
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ret void
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}
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; HSA: @memcpy_constant_cast_group_gv_gep_to_flat(i32 addrspace(1)* %out) #2
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define void @memcpy_constant_cast_group_gv_gep_to_flat(i32 addrspace(1)* %out) #1 {
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call void @llvm.memcpy.p1i32.p4i32.i32(i32 addrspace(1)* %out, i32 addrspace(4)* getelementptr ([256 x i32], [256 x i32] addrspace(4)* addrspacecast ([256 x i32] addrspace(3)* @lds.arr to [256 x i32] addrspace(4)*), i64 0, i64 8), i32 32, i32 4, i1 false)
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ret void
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}
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; Can't just search the pointer value
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; HSA: @store_value_constant_cast_lds_gv_gep_to_flat(i32 addrspace(4)* addrspace(1)* %out) #2
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define void @store_value_constant_cast_lds_gv_gep_to_flat(i32 addrspace(4)* addrspace(1)* %out) #1 {
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store i32 addrspace(4)* getelementptr ([256 x i32], [256 x i32] addrspace(4)* addrspacecast ([256 x i32] addrspace(3)* @lds.arr to [256 x i32] addrspace(4)*), i64 0, i64 8), i32 addrspace(4)* addrspace(1)* %out
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ret void
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}
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; Can't just search pointer types
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; HSA: @store_ptrtoint_value_constant_cast_lds_gv_gep_to_flat(i64 addrspace(1)* %out) #2
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define void @store_ptrtoint_value_constant_cast_lds_gv_gep_to_flat(i64 addrspace(1)* %out) #1 {
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store i64 ptrtoint (i32 addrspace(4)* getelementptr ([256 x i32], [256 x i32] addrspace(4)* addrspacecast ([256 x i32] addrspace(3)* @lds.arr to [256 x i32] addrspace(4)*), i64 0, i64 8) to i64), i64 addrspace(1)* %out
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ret void
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}
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; Cast group to flat, do GEP, cast back to group
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; HSA: @store_constant_cast_group_gv_gep_to_flat_to_group() #2
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define void @store_constant_cast_group_gv_gep_to_flat_to_group() #1 {
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store i32 7, i32 addrspace(3)* addrspacecast (i32 addrspace(4)* getelementptr ([256 x i32], [256 x i32] addrspace(4)* addrspacecast ([256 x i32] addrspace(3)* @lds.arr to [256 x i32] addrspace(4)*), i64 0, i64 8) to i32 addrspace(3)*)
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ret void
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}
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; HSA: @ret_constant_cast_group_gv_gep_to_flat_to_group() #2
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define i32 addrspace(3)* @ret_constant_cast_group_gv_gep_to_flat_to_group() #1 {
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ret i32 addrspace(3)* addrspacecast (i32 addrspace(4)* getelementptr ([256 x i32], [256 x i32] addrspace(4)* addrspacecast ([256 x i32] addrspace(3)* @lds.arr to [256 x i32] addrspace(4)*), i64 0, i64 8) to i32 addrspace(3)*)
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}
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; HSA: attributes #0 = { argmemonly nounwind }
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; HSA: attributes #1 = { nounwind }
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; HSA: attributes #2 = { nounwind "amdgpu-queue-ptr" }
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attributes #0 = { argmemonly nounwind }
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attributes #1 = { nounwind }
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