diff --git a/lib/CodeGen/InterleavedAccessPass.cpp b/lib/CodeGen/InterleavedAccessPass.cpp
index b22e6faeb91..10078746881 100644
--- a/lib/CodeGen/InterleavedAccessPass.cpp
+++ b/lib/CodeGen/InterleavedAccessPass.cpp
@@ -385,8 +385,7 @@ bool InterleavedAccess::lowerInterleavedLoad(
     return !Extracts.empty() || BinOpShuffleChanged;
   }
 
-  for (auto SVI : Shuffles)
-    DeadInsts.push_back(SVI);
+  append_range(DeadInsts, Shuffles);
 
   DeadInsts.push_back(LI);
   return true;
diff --git a/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp b/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
index e2daa46fe6b..c67be3cc9c0 100644
--- a/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
+++ b/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
@@ -932,8 +932,7 @@ void VarLocBasedLDV::collectIDsForRegs(VarLocSet &Collected,
                                         const VarLocSet &CollectFrom) const {
   assert(!Regs.empty() && "Nothing to collect");
   SmallVector<uint32_t, 32> SortedRegs;
-  for (Register Reg : Regs)
-    SortedRegs.push_back(Reg);
+  append_range(SortedRegs, Regs);
   array_pod_sort(SortedRegs.begin(), SortedRegs.end());
   auto It = CollectFrom.find(LocIndex::rawIndexForReg(SortedRegs.front()));
   auto End = CollectFrom.end();
diff --git a/lib/CodeGen/MachineSSAUpdater.cpp b/lib/CodeGen/MachineSSAUpdater.cpp
index 462082df5d0..e6dee31d5c4 100644
--- a/lib/CodeGen/MachineSSAUpdater.cpp
+++ b/lib/CodeGen/MachineSSAUpdater.cpp
@@ -284,9 +284,7 @@ public:
   /// vector.
   static void FindPredecessorBlocks(MachineBasicBlock *BB,
                                     SmallVectorImpl<MachineBasicBlock*> *Preds){
-    for (MachineBasicBlock::pred_iterator PI = BB->pred_begin(),
-           E = BB->pred_end(); PI != E; ++PI)
-      Preds->push_back(*PI);
+    append_range(*Preds, BB->predecessors());
   }
 
   /// GetUndefVal - Create an IMPLICIT_DEF instruction with a new register.
diff --git a/lib/DebugInfo/DWARF/DWARFContext.cpp b/lib/DebugInfo/DWARF/DWARFContext.cpp
index 749d738af9c..b655bee9c1d 100644
--- a/lib/DebugInfo/DWARF/DWARFContext.cpp
+++ b/lib/DebugInfo/DWARF/DWARFContext.cpp
@@ -1022,8 +1022,7 @@ DWARFContext::DIEsForAddress DWARFContext::getDIEsForAddress(uint64_t Address) {
       break;
     }
 
-    for (auto Child : DIE)
-      Worklist.push_back(Child);
+    append_range(Worklist, DIE);
   }
 
   return Result;
diff --git a/lib/IR/IRBuilder.cpp b/lib/IR/IRBuilder.cpp
index 91ca984b755..11554c2f1e6 100644
--- a/lib/IR/IRBuilder.cpp
+++ b/lib/IR/IRBuilder.cpp
@@ -892,8 +892,7 @@ CallInst *IRBuilderBase::CreateConstrainedFPCall(
     Optional<fp::ExceptionBehavior> Except) {
   llvm::SmallVector<Value *, 6> UseArgs;
 
-  for (auto *OneArg : Args)
-    UseArgs.push_back(OneArg);
+  append_range(UseArgs, Args);
   bool HasRoundingMD = false;
   switch (Callee->getIntrinsicID()) {
   default:
diff --git a/lib/IR/SafepointIRVerifier.cpp b/lib/IR/SafepointIRVerifier.cpp
index 8ed31b6668e..9be6de693ee 100644
--- a/lib/IR/SafepointIRVerifier.cpp
+++ b/lib/IR/SafepointIRVerifier.cpp
@@ -350,8 +350,7 @@ static enum BaseType getBaseType(const Value *Val) {
     // Push all the incoming values of phi node into the worklist for
     // processing.
     if (const auto *PN = dyn_cast<PHINode>(V)) {
-      for (Value *InV: PN->incoming_values())
-        Worklist.push_back(InV);
+      append_range(Worklist, PN->incoming_values());
       continue;
     }
     if (const auto *SI = dyn_cast<SelectInst>(V)) {
diff --git a/lib/Remarks/BitstreamRemarkSerializer.cpp b/lib/Remarks/BitstreamRemarkSerializer.cpp
index d02782c7954..36ba9356477 100644
--- a/lib/Remarks/BitstreamRemarkSerializer.cpp
+++ b/lib/Remarks/BitstreamRemarkSerializer.cpp
@@ -21,8 +21,7 @@ BitstreamRemarkSerializerHelper::BitstreamRemarkSerializerHelper(
     : Encoded(), R(), Bitstream(Encoded), ContainerType(ContainerType) {}
 
 static void push(SmallVectorImpl<uint64_t> &R, StringRef Str) {
-  for (const char C : Str)
-    R.push_back(C);
+  append_range(R, Str);
 }
 
 static void setRecordName(unsigned RecordID, BitstreamWriter &Bitstream,
diff --git a/lib/Target/Hexagon/HexagonSplitDouble.cpp b/lib/Target/Hexagon/HexagonSplitDouble.cpp
index c8c66ebb69c..9c60a2dd8d0 100644
--- a/lib/Target/Hexagon/HexagonSplitDouble.cpp
+++ b/lib/Target/Hexagon/HexagonSplitDouble.cpp
@@ -296,8 +296,7 @@ void HexagonSplitDoubleRegs::partitionRegisters(UUSetMap &P2Rs) {
       Visited.insert(T);
       // Add all registers associated with T.
       USet &Asc = AssocMap[T];
-      for (USet::iterator J = Asc.begin(), F = Asc.end(); J != F; ++J)
-        WorkQ.push_back(*J);
+      append_range(WorkQ, Asc);
     }
   }
 
diff --git a/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp b/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
index 1b14b8d5699..fe16e5b9555 100644
--- a/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
+++ b/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
@@ -2051,8 +2051,7 @@ void DFSanVisitor::visitCallBase(CallBase &CB) {
           Args.push_back(DFSF.LabelReturnAlloca);
         }
 
-        for (i = CB.arg_begin() + FT->getNumParams(); i != CB.arg_end(); ++i)
-          Args.push_back(*i);
+        append_range(Args, drop_begin(CB.args(), FT->getNumParams()));
 
         CallInst *CustomCI = IRB.CreateCall(CustomF, Args);
         CustomCI->setCallingConv(CI->getCallingConv());