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GlobalISel[AArch64]: support pointer types in argument lowering.

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They're basically i64 for AArch64, but we'll leave them intact for stranger
targets. Also add some tests for the (very few) other cases we can handle right
now.

llvm-svn: 276689
This commit is contained in:
Tim Northover 2016-07-25 21:01:17 +00:00
parent e46ec47350
commit 2cf541095a
3 changed files with 63 additions and 2 deletions
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7
lib/Target/AArch64/AArch64CallLowering.cpp
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@ -36,8 +36,11 @@ bool AArch64CallLowering::lowerReturn(MachineIRBuilder &MIRBuilder,
assert(((Val && VReg) || (!Val && !VReg)) && "Return value without a vreg");
if (VReg) {
assert(Val->getType()->isIntegerTy() && "Type not supported yet");
unsigned Size = Val->getType()->getPrimitiveSizeInBits();
assert((Val->getType()->isIntegerTy() || Val->getType()->isPointerTy()) &&
"Type not supported yet");
const Function &F = *MIRBuilder.getMF().getFunction();
const DataLayout &DL = F.getParent()->getDataLayout();
unsigned Size = DL.getTypeSizeInBits(Val->getType());
assert((Size == 64 || Size == 32) && "Size not supported yet");
unsigned ResReg = (Size == 32) ? AArch64::W0 : AArch64::X0;
// Set the insertion point to be right before Return.

6
lib/Target/AArch64/AArch64CallingConvention.td
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@ -23,6 +23,7 @@ class CCIfBigEndian<CCAction A> :
//===----------------------------------------------------------------------===//
def CC_AArch64_AAPCS : CallingConv<[
CCIfType<[iPTR], CCBitConvertToType<i64>>,
CCIfType<[v2f32], CCBitConvertToType<v2i32>>,
CCIfType<[v2f64, v4f32], CCBitConvertToType<v2i64>>,
@ -86,6 +87,7 @@ def CC_AArch64_AAPCS : CallingConv<[
]>;
def RetCC_AArch64_AAPCS : CallingConv<[
CCIfType<[iPTR], CCBitConvertToType<i64>>,
CCIfType<[v2f32], CCBitConvertToType<v2i32>>,
CCIfType<[v2f64, v4f32], CCBitConvertToType<v2i64>>,
@ -121,6 +123,7 @@ def RetCC_AArch64_AAPCS : CallingConv<[
// + i128s (i.e. split i64s) don't need even registers.
// + Stack slots are sized as needed rather than being at least 64-bit.
def CC_AArch64_DarwinPCS : CallingConv<[
CCIfType<[iPTR], CCBitConvertToType<i64>>,
CCIfType<[v2f32], CCBitConvertToType<v2i32>>,
CCIfType<[v2f64, v4f32, f128], CCBitConvertToType<v2i64>>,
@ -176,6 +179,7 @@ def CC_AArch64_DarwinPCS : CallingConv<[
]>;
def CC_AArch64_DarwinPCS_VarArg : CallingConv<[
CCIfType<[iPTR], CCBitConvertToType<i64>>,
CCIfType<[v2f32], CCBitConvertToType<v2i32>>,
CCIfType<[v2f64, v4f32, f128], CCBitConvertToType<v2i64>>,
@ -243,6 +247,8 @@ def RetCC_AArch64_WebKit_JS : CallingConv<[
// register mapping".
def CC_AArch64_GHC : CallingConv<[
CCIfType<[iPTR], CCBitConvertToType<i64>>,
// Handle all vector types as either f64 or v2f64.
CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32, f128], CCBitConvertToType<v2f64>>,

52
test/CodeGen/AArch64/GlobalISel/arm64-callingconv.ll Normal file
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@ -0,0 +1,52 @@
; RUN: llc -O0 -stop-after=irtranslator -global-isel -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
; REQUIRES: global-isel
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-linux-gnu"
; CHECK-LABEL: name: args_i32
; CHECK: %[[ARG0:[0-9]+]](32) = COPY %w0
; CHECK: %{{[0-9]+}}(32) = COPY %w1
; CHECK: %{{[0-9]+}}(32) = COPY %w2
; CHECK: %{{[0-9]+}}(32) = COPY %w3
; CHECK: %{{[0-9]+}}(32) = COPY %w4
; CHECK: %{{[0-9]+}}(32) = COPY %w5
; CHECK: %{{[0-9]+}}(32) = COPY %w6
; CHECK: %{{[0-9]+}}(32) = COPY %w7
; CHECK: %w0 = COPY %[[ARG0]]
define i32 @args_i32(i32 %w0, i32 %w1, i32 %w2, i32 %w3,
i32 %w4, i32 %w5, i32 %w6, i32 %w7) {
ret i32 %w0
}
; CHECK-LABEL: name: args_i64
; CHECK: %[[ARG0:[0-9]+]](64) = COPY %x0
; CHECK: %{{[0-9]+}}(64) = COPY %x1
; CHECK: %{{[0-9]+}}(64) = COPY %x2
; CHECK: %{{[0-9]+}}(64) = COPY %x3
; CHECK: %{{[0-9]+}}(64) = COPY %x4
; CHECK: %{{[0-9]+}}(64) = COPY %x5
; CHECK: %{{[0-9]+}}(64) = COPY %x6
; CHECK: %{{[0-9]+}}(64) = COPY %x7
; CHECK: %x0 = COPY %[[ARG0]]
define i64 @args_i64(i64 %x0, i64 %x1, i64 %x2, i64 %x3,
i64 %x4, i64 %x5, i64 %x6, i64 %x7) {
ret i64 %x0
}
; CHECK-LABEL: name: args_ptrs
; CHECK: %[[ARG0:[0-9]+]](64) = COPY %x0
; CHECK: %{{[0-9]+}}(64) = COPY %x1
; CHECK: %{{[0-9]+}}(64) = COPY %x2
; CHECK: %{{[0-9]+}}(64) = COPY %x3
; CHECK: %{{[0-9]+}}(64) = COPY %x4
; CHECK: %{{[0-9]+}}(64) = COPY %x5
; CHECK: %{{[0-9]+}}(64) = COPY %x6
; CHECK: %{{[0-9]+}}(64) = COPY %x7
; CHECK: %x0 = COPY %[[ARG0]]
define i8* @args_ptrs(i8* %x0, i16* %x1, <2 x i8>* %x2, {i8, i16, i32}* %x3,
[3 x float]* %x4, double* %x5, i8* %x6, i8* %x7) {
ret i8* %x0
}