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[GlobalISel][ARM] Adding HPR and QPR regclasses to FPRB regbank

Browse Source 
Also bringing ARMRegisterBankInfo::getRegBankFromRegClass
implementation up to speed with the *.td-definition.

Reviewed By: qcolombet

Differential Revision: https://reviews.llvm.org/D43982

llvm-svn: 333056
This commit is contained in:
Roman Tereshin 2018-05-23 02:59:31 +00:00
parent 3e1ac7e466
commit 2d9d4134d1
3 changed files with 8 additions and 1 deletions
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2
lib/Target/ARM/ARMInstructionSelector.cpp
View File

@ -134,6 +134,8 @@ static const TargetRegisterClass *guessRegClass(unsigned Reg,
return &ARM::SPRRegClass;
else if (Size == 64)
return &ARM::DPRRegClass;
else if (Size == 128)
return &ARM::QPRRegClass;
else
llvm_unreachable("Unsupported destination size");
}

5
lib/Target/ARM/ARMRegisterBankInfo.cpp
View File

@ -175,15 +175,20 @@ const RegisterBank &ARMRegisterBankInfo::getRegBankFromRegClass(
switch (RC.getID()) {
case GPRRegClassID:
case GPRwithAPSRRegClassID:
case GPRnopcRegClassID:
case rGPRRegClassID:
case GPRspRegClassID:
case tGPR_and_tcGPRRegClassID:
case tcGPRRegClassID:
case tGPRRegClassID:
return getRegBank(ARM::GPRRegBankID);
case HPRRegClassID:
case SPR_8RegClassID:
case SPRRegClassID:
case DPR_8RegClassID:
case DPRRegClassID:
case QPRRegClassID:
return getRegBank(ARM::FPRRegBankID);
default:
llvm_unreachable("Unsupported register kind");

2
lib/Target/ARM/ARMRegisterBanks.td
View File

@ -11,4 +11,4 @@
//===----------------------------------------------------------------------===//
def GPRRegBank : RegisterBank<"GPRB", [GPR, GPRwithAPSR]>;
def FPRRegBank : RegisterBank<"FPRB", [SPR, DPR]>;
def FPRRegBank : RegisterBank<"FPRB", [HPR, SPR, DPR, QPR]>;