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AMDGPU: Partially fix improper reliance on memoperands
There are 2 more places doing this, but I'm not sure what they are doing and don't make any sense to me llvm-svn: 308770
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@ -379,6 +379,7 @@ public:
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KillWaitBrackets.push_back(make_unique<BlockWaitcntBrackets>(*Bracket));
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}
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bool mayAccessLDSThroughFlat(const MachineInstr &MI) const;
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MachineInstr *generateSWaitCntInstBefore(MachineInstr &MI,
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BlockWaitcntBrackets *ScoreBrackets);
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void updateEventWaitCntAfter(MachineInstr &Inst,
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@ -934,6 +935,7 @@ MachineInstr *SIInsertWaitcnts::generateSWaitCntInstBefore(
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}
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#endif
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// FIXME: Should not be relying on memoperands.
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// Look at the source operands of every instruction to see if
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// any of them results from a previous memory operation that affects
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// its current usage. If so, an s_waitcnt instruction needs to be
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@ -949,6 +951,7 @@ MachineInstr *SIInsertWaitcnts::generateSWaitCntInstBefore(
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EmitSwaitcnt |= ScoreBrackets->updateByWait(
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VM_CNT, ScoreBrackets->getRegScore(RegNo, VM_CNT));
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}
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for (unsigned I = 0, E = MI.getNumOperands(); I != E; ++I) {
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const MachineOperand &Op = MI.getOperand(I);
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const MachineRegisterInfo &MRIA = *MRI;
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@ -973,6 +976,7 @@ MachineInstr *SIInsertWaitcnts::generateSWaitCntInstBefore(
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// 2) If a destination operand that was used by a recent export/store ins,
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// add s_waitcnt on exp_cnt to guarantee the WAR order.
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if (MI.mayStore()) {
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// FIXME: Should not be relying on memoperands.
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for (const MachineMemOperand *Memop : MI.memoperands()) {
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unsigned AS = Memop->getAddrSpace();
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if (AS != AMDGPUASI.LOCAL_ADDRESS)
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@ -1145,6 +1149,21 @@ void SIInsertWaitcnts::insertWaitcntBeforeCF(MachineBasicBlock &MBB,
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return;
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}
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// This is a flat memory operation. Check to see if it has memory
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// tokens for both LDS and Memory, and if so mark it as a flat.
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bool SIInsertWaitcnts::mayAccessLDSThroughFlat(const MachineInstr &MI) const {
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if (MI.memoperands_empty())
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return true;
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for (const MachineMemOperand *Memop : MI.memoperands()) {
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unsigned AS = Memop->getAddrSpace();
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if (AS == AMDGPUASI.LOCAL_ADDRESS || AS == AMDGPUASI.FLAT_ADDRESS)
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return true;
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}
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return false;
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}
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void SIInsertWaitcnts::updateEventWaitCntAfter(
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MachineInstr &Inst, BlockWaitcntBrackets *ScoreBrackets) {
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// Now look at the instruction opcode. If it is a memory access
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@ -1152,8 +1171,7 @@ void SIInsertWaitcnts::updateEventWaitCntAfter(
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// bracket and the destination operand scores.
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// TODO: Use the (TSFlags & SIInstrFlags::LGKM_CNT) property everywhere.
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if (TII->isDS(Inst) && TII->usesLGKM_CNT(Inst)) {
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if (TII->getNamedOperand(Inst, AMDGPU::OpName::gds) &&
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TII->getNamedOperand(Inst, AMDGPU::OpName::gds)->getImm() != 0) {
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if (TII->hasModifiersSet(Inst, AMDGPU::OpName::gds)) {
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ScoreBrackets->updateByEvent(TII, TRI, MRI, GDS_ACCESS, Inst);
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ScoreBrackets->updateByEvent(TII, TRI, MRI, GDS_GPR_LOCK, Inst);
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} else {
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@ -1165,23 +1183,14 @@ void SIInsertWaitcnts::updateEventWaitCntAfter(
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if (TII->usesVM_CNT(Inst))
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ScoreBrackets->updateByEvent(TII, TRI, MRI, VMEM_ACCESS, Inst);
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if (TII->usesLGKM_CNT(Inst))
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if (TII->usesLGKM_CNT(Inst)) {
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ScoreBrackets->updateByEvent(TII, TRI, MRI, LDS_ACCESS, Inst);
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// This is a flat memory operation. Check to see if it has memory
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// tokens for both LDS and Memory, and if so mark it as a flat.
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bool FoundLDSMem = false;
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for (const MachineMemOperand *Memop : Inst.memoperands()) {
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unsigned AS = Memop->getAddrSpace();
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if (AS == AMDGPUASI.LOCAL_ADDRESS || AS == AMDGPUASI.FLAT_ADDRESS)
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FoundLDSMem = true;
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}
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// This is a flat memory operation, so note it - it will require
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// that both the VM and LGKM be flushed to zero if it is pending when
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// a VM or LGKM dependency occurs.
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if (FoundLDSMem) {
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ScoreBrackets->setPendingFlat();
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// This is a flat memory operation, so note it - it will require
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// that both the VM and LGKM be flushed to zero if it is pending when
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// a VM or LGKM dependency occurs.
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if (mayAccessLDSThroughFlat(Inst))
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ScoreBrackets->setPendingFlat();
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}
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} else if (SIInstrInfo::isVMEM(Inst) &&
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// TODO: get a better carve out.
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