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Precommit test files for D105344 (NFC)
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Juneyoung Lee
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test/CodeGen/X86/setcc-freeze.ll
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210
test/CodeGen/X86/setcc-freeze.ll
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s 2>&1 | FileCheck %s
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define i32 @f(i16* %p) {
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; CHECK-LABEL: f:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movzwl (%rdi), %eax
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; CHECK-NEXT: andl $2048, %eax # imm = 0x800
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; CHECK-NEXT: testw %ax, %ax
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; CHECK-NEXT: je .LBB0_1
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; CHECK-NEXT: # %bb.2: # %B
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; CHECK-NEXT: movl $20, %eax
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB0_1: # %A
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; CHECK-NEXT: movl $10, %eax
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; CHECK-NEXT: retq
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%v = load i16, i16* %p, align 2
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%and = and i16 %v, 2048
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%cond = icmp eq i16 %and, 0
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%cond.fr = freeze i1 %cond
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br i1 %cond.fr, label %A, label %B
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A:
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ret i32 10
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B:
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ret i32 20
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}
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define i32 @f_false(i16* %p) {
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; CHECK-LABEL: f_false:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movb $1, %al
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; CHECK-NEXT: testb %al, %al
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; CHECK-NEXT: jne .LBB1_2
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; CHECK-NEXT: # %bb.1: # %A
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; CHECK-NEXT: movl $10, %eax
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB1_2: # %B
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; CHECK-NEXT: movl $20, %eax
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; CHECK-NEXT: retq
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%v = load i16, i16* %p, align 2
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%and = and i16 %v, 2048
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%cond = icmp ult i16 %and, 0
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%cond.fr = freeze i1 %cond
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br i1 %cond.fr, label %A, label %B
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A:
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ret i32 10
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B:
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ret i32 20
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}
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define i32 @f_false2(i16* %p) {
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; CHECK-LABEL: f_false2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movb $1, %al
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; CHECK-NEXT: testb %al, %al
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; CHECK-NEXT: jne .LBB2_2
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; CHECK-NEXT: # %bb.1: # %A
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; CHECK-NEXT: movl $10, %eax
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB2_2: # %B
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; CHECK-NEXT: movl $20, %eax
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; CHECK-NEXT: retq
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%v = load i16, i16* %p, align 2
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%and = and i16 %v, 2048
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%cond = icmp ult i16 65535, %and
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%cond.fr = freeze i1 %cond
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br i1 %cond.fr, label %A, label %B
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A:
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ret i32 10
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B:
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ret i32 20
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}
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define i32 @f_false3(i16* %p) {
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; CHECK-LABEL: f_false3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movb $1, %al
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; CHECK-NEXT: testb %al, %al
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; CHECK-NEXT: jne .LBB3_2
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; CHECK-NEXT: # %bb.1: # %A
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; CHECK-NEXT: movl $10, %eax
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB3_2: # %B
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; CHECK-NEXT: movl $20, %eax
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; CHECK-NEXT: retq
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%v = load i16, i16* %p, align 2
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%and = and i16 %v, 2048
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%cond = icmp slt i16 32767, %and
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%cond.fr = freeze i1 %cond
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br i1 %cond.fr, label %A, label %B
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A:
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ret i32 10
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B:
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ret i32 20
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}
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define i32 @f_false4(i16* %p) {
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; CHECK-LABEL: f_false4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movb $1, %al
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; CHECK-NEXT: testb %al, %al
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; CHECK-NEXT: jne .LBB4_2
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; CHECK-NEXT: # %bb.1: # %A
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; CHECK-NEXT: movl $10, %eax
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB4_2: # %B
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; CHECK-NEXT: movl $20, %eax
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; CHECK-NEXT: retq
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%v = load i16, i16* %p, align 2
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%and = and i16 %v, 2048
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%cond = icmp sgt i16 %and, 32767
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%cond.fr = freeze i1 %cond
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br i1 %cond.fr, label %A, label %B
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A:
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ret i32 10
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B:
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ret i32 20
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}
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define i32 @f_true(i16* %p) {
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; CHECK-LABEL: f_true:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: testb %al, %al
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; CHECK-NEXT: jne .LBB5_2
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; CHECK-NEXT: # %bb.1: # %A
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; CHECK-NEXT: movl $10, %eax
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB5_2: # %B
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; CHECK-NEXT: movl $20, %eax
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; CHECK-NEXT: retq
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%v = load i16, i16* %p, align 2
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%and = and i16 %v, 2048
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%cond = icmp sge i16 %and, -32768
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%cond.fr = freeze i1 %cond
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br i1 %cond.fr, label %A, label %B
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A:
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ret i32 10
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B:
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ret i32 20
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}
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define i32 @f_true2(i16* %p) {
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; CHECK-LABEL: f_true2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: testb %al, %al
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; CHECK-NEXT: jne .LBB6_2
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; CHECK-NEXT: # %bb.1: # %A
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; CHECK-NEXT: movl $10, %eax
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB6_2: # %B
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; CHECK-NEXT: movl $20, %eax
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; CHECK-NEXT: retq
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%v = load i16, i16* %p, align 2
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%and = and i16 %v, 2048
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%cond = icmp uge i16 %and, 0
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%cond.fr = freeze i1 %cond
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br i1 %cond.fr, label %A, label %B
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A:
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ret i32 10
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B:
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ret i32 20
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}
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define i32 @f_true3(i16* %p) {
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; CHECK-LABEL: f_true3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: testb %al, %al
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; CHECK-NEXT: jne .LBB7_2
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; CHECK-NEXT: # %bb.1: # %A
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; CHECK-NEXT: movl $10, %eax
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB7_2: # %B
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; CHECK-NEXT: movl $20, %eax
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; CHECK-NEXT: retq
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%v = load i16, i16* %p, align 2
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%and = and i16 %v, 2048
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%cond = icmp ule i16 0, %and
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%cond.fr = freeze i1 %cond
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br i1 %cond.fr, label %A, label %B
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A:
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ret i32 10
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B:
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ret i32 20
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}
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define i32 @f_true4(i16* %p) {
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; CHECK-LABEL: f_true4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: testb %al, %al
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; CHECK-NEXT: jne .LBB8_2
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; CHECK-NEXT: # %bb.1: # %A
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; CHECK-NEXT: movl $10, %eax
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB8_2: # %B
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; CHECK-NEXT: movl $20, %eax
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; CHECK-NEXT: retq
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%v = load i16, i16* %p, align 2
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%and = and i16 %v, 2048
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%cond = icmp ule i16 %and, 65535
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%cond.fr = freeze i1 %cond
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br i1 %cond.fr, label %A, label %B
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A:
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ret i32 10
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B:
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ret i32 20
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}
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