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[WebAssembly] Adding 64-bit version of R_WASM_MEMORY_ADDR_* relocs
This adds 4 new reloc types. A lot of code that previously assumed any memory or offset values could be contained in a uint32_t (and often truncated results from functions returning 64-bit values) have been upgraded to uint64_t. This is not comprehensive: it is only the values that come in contact with the new relocation values and their dependents. A new tablegen mapping was added to automatically upgrade loads/stores in the assembler, which otherwise has no way to select for these instructions (since they are indentical other than for the offset immediate). It follows a similar technique to https://reviews.llvm.org/D53307 Differential Revision: https://reviews.llvm.org/D81704
This commit is contained in:
Wouter van Oortmerssen
parent
0fa32417a7
commit
2eaa4e6cf6
@ -159,8 +159,8 @@ struct WasmElemSegment {
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// the index of the segment, and the offset and size within the segment.
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struct WasmDataReference {
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uint32_t Segment;
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uint32_t Offset;
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uint32_t Size;
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uint64_t Offset;
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uint64_t Size;
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};
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struct WasmRelocation {
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@ -2,17 +2,21 @@
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#error "WASM_RELOC must be defined"
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#endif
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WASM_RELOC(R_WASM_FUNCTION_INDEX_LEB, 0)
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WASM_RELOC(R_WASM_TABLE_INDEX_SLEB, 1)
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WASM_RELOC(R_WASM_TABLE_INDEX_I32, 2)
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WASM_RELOC(R_WASM_MEMORY_ADDR_LEB, 3)
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WASM_RELOC(R_WASM_MEMORY_ADDR_SLEB, 4)
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WASM_RELOC(R_WASM_MEMORY_ADDR_I32, 5)
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WASM_RELOC(R_WASM_TYPE_INDEX_LEB, 6)
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WASM_RELOC(R_WASM_GLOBAL_INDEX_LEB, 7)
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WASM_RELOC(R_WASM_FUNCTION_OFFSET_I32, 8)
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WASM_RELOC(R_WASM_SECTION_OFFSET_I32, 9)
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WASM_RELOC(R_WASM_EVENT_INDEX_LEB, 10)
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WASM_RELOC(R_WASM_MEMORY_ADDR_REL_SLEB, 11)
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WASM_RELOC(R_WASM_TABLE_INDEX_REL_SLEB, 12)
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WASM_RELOC(R_WASM_GLOBAL_INDEX_I32, 13)
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WASM_RELOC(R_WASM_FUNCTION_INDEX_LEB, 0)
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WASM_RELOC(R_WASM_TABLE_INDEX_SLEB, 1)
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WASM_RELOC(R_WASM_TABLE_INDEX_I32, 2)
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WASM_RELOC(R_WASM_MEMORY_ADDR_LEB, 3)
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WASM_RELOC(R_WASM_MEMORY_ADDR_SLEB, 4)
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WASM_RELOC(R_WASM_MEMORY_ADDR_I32, 5)
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WASM_RELOC(R_WASM_TYPE_INDEX_LEB, 6)
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WASM_RELOC(R_WASM_GLOBAL_INDEX_LEB, 7)
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WASM_RELOC(R_WASM_FUNCTION_OFFSET_I32, 8)
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WASM_RELOC(R_WASM_SECTION_OFFSET_I32, 9)
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WASM_RELOC(R_WASM_EVENT_INDEX_LEB, 10)
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WASM_RELOC(R_WASM_MEMORY_ADDR_REL_SLEB, 11)
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WASM_RELOC(R_WASM_TABLE_INDEX_REL_SLEB, 12)
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WASM_RELOC(R_WASM_GLOBAL_INDEX_I32, 13)
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WASM_RELOC(R_WASM_MEMORY_ADDR_LEB64, 14)
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WASM_RELOC(R_WASM_MEMORY_ADDR_SLEB64, 15)
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WASM_RELOC(R_WASM_MEMORY_ADDR_I64, 16)
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WASM_RELOC(R_WASM_MEMORY_ADDR_REL_SLEB64, 17)
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@ -107,8 +107,10 @@ struct Function {
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struct Relocation {
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RelocType Type;
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uint32_t Index;
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// TODO(wvo): this would strictly be better as Hex64, but that will change
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// all existing obj2yaml output.
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yaml::Hex32 Offset;
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int32_t Addend;
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int64_t Addend;
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};
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struct DataSegment {
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@ -39,9 +39,13 @@ std::string llvm::wasm::relocTypetoString(uint32_t Type) {
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bool llvm::wasm::relocTypeHasAddend(uint32_t Type) {
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switch (Type) {
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case R_WASM_MEMORY_ADDR_LEB:
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case R_WASM_MEMORY_ADDR_LEB64:
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case R_WASM_MEMORY_ADDR_SLEB:
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case R_WASM_MEMORY_ADDR_SLEB64:
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case R_WASM_MEMORY_ADDR_REL_SLEB:
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case R_WASM_MEMORY_ADDR_REL_SLEB64:
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case R_WASM_MEMORY_ADDR_I32:
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case R_WASM_MEMORY_ADDR_I64:
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case R_WASM_FUNCTION_OFFSET_I32:
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case R_WASM_SECTION_OFFSET_I32:
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return true;
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@ -185,21 +185,21 @@ raw_ostream &operator<<(raw_ostream &OS, const WasmRelocationEntry &Rel) {
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// Write X as an (unsigned) LEB value at offset Offset in Stream, padded
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// to allow patching.
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static void writePatchableLEB(raw_pwrite_stream &Stream, uint32_t X,
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uint64_t Offset) {
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uint8_t Buffer[5];
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unsigned SizeLen = encodeULEB128(X, Buffer, 5);
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assert(SizeLen == 5);
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template <int W>
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void writePatchableLEB(raw_pwrite_stream &Stream, uint64_t X, uint64_t Offset) {
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uint8_t Buffer[W];
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unsigned SizeLen = encodeULEB128(X, Buffer, W);
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assert(SizeLen == W);
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Stream.pwrite((char *)Buffer, SizeLen, Offset);
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}
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// Write X as an signed LEB value at offset Offset in Stream, padded
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// to allow patching.
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static void writePatchableSLEB(raw_pwrite_stream &Stream, int32_t X,
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uint64_t Offset) {
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uint8_t Buffer[5];
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unsigned SizeLen = encodeSLEB128(X, Buffer, 5);
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assert(SizeLen == 5);
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template <int W>
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void writePatchableSLEB(raw_pwrite_stream &Stream, int64_t X, uint64_t Offset) {
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uint8_t Buffer[W];
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unsigned SizeLen = encodeSLEB128(X, Buffer, W);
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assert(SizeLen == W);
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Stream.pwrite((char *)Buffer, SizeLen, Offset);
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}
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@ -210,6 +210,12 @@ static void patchI32(raw_pwrite_stream &Stream, uint32_t X, uint64_t Offset) {
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Stream.pwrite((char *)Buffer, sizeof(Buffer), Offset);
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}
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static void patchI64(raw_pwrite_stream &Stream, uint64_t X, uint64_t Offset) {
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uint8_t Buffer[8];
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support::endian::write64le(Buffer, X);
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Stream.pwrite((char *)Buffer, sizeof(Buffer), Offset);
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}
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class WasmObjectWriter : public MCObjectWriter {
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support::endian::Writer W;
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@ -347,7 +353,7 @@ private:
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updateCustomSectionRelocations(const SmallVector<WasmFunction, 4> &Functions,
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const MCAsmLayout &Layout);
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uint32_t getProvisionalValue(const WasmRelocationEntry &RelEntry);
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uint64_t getProvisionalValue(const WasmRelocationEntry &RelEntry);
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void applyRelocations(ArrayRef<WasmRelocationEntry> Relocations,
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uint64_t ContentsOffset);
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@ -410,8 +416,8 @@ void WasmObjectWriter::endSection(SectionBookkeeping &Section) {
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// Write the final section size to the payload_len field, which follows
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// the section id byte.
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writePatchableLEB(static_cast<raw_pwrite_stream &>(W.OS), Size,
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Section.SizeOffset);
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writePatchableLEB<5>(static_cast<raw_pwrite_stream &>(W.OS), Size,
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Section.SizeOffset);
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}
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// Emit the Wasm header.
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@ -549,7 +555,7 @@ static const MCSymbolWasm *resolveSymbol(const MCSymbolWasm &Symbol) {
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// by RelEntry. This value isn't used by the static linker; it just serves
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// to make the object format more readable and more likely to be directly
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// useable.
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uint32_t
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uint64_t
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WasmObjectWriter::getProvisionalValue(const WasmRelocationEntry &RelEntry) {
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if ((RelEntry.Type == wasm::R_WASM_GLOBAL_INDEX_LEB ||
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RelEntry.Type == wasm::R_WASM_GLOBAL_INDEX_I32) &&
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@ -587,9 +593,13 @@ WasmObjectWriter::getProvisionalValue(const WasmRelocationEntry &RelEntry) {
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return Section.getSectionOffset() + RelEntry.Addend;
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}
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case wasm::R_WASM_MEMORY_ADDR_LEB:
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case wasm::R_WASM_MEMORY_ADDR_I32:
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case wasm::R_WASM_MEMORY_ADDR_LEB64:
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case wasm::R_WASM_MEMORY_ADDR_SLEB:
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case wasm::R_WASM_MEMORY_ADDR_SLEB64:
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case wasm::R_WASM_MEMORY_ADDR_REL_SLEB:
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case wasm::R_WASM_MEMORY_ADDR_SLEB: {
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case wasm::R_WASM_MEMORY_ADDR_REL_SLEB64:
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case wasm::R_WASM_MEMORY_ADDR_I32:
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case wasm::R_WASM_MEMORY_ADDR_I64: {
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// Provisional value is address of the global
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const MCSymbolWasm *Sym = resolveSymbol(*RelEntry.Symbol);
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// For undefined symbols, use zero
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@ -666,7 +676,7 @@ void WasmObjectWriter::applyRelocations(
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RelEntry.Offset;
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LLVM_DEBUG(dbgs() << "applyRelocation: " << RelEntry << "\n");
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uint32_t Value = getProvisionalValue(RelEntry);
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auto Value = getProvisionalValue(RelEntry);
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switch (RelEntry.Type) {
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case wasm::R_WASM_FUNCTION_INDEX_LEB:
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@ -674,7 +684,10 @@ void WasmObjectWriter::applyRelocations(
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case wasm::R_WASM_GLOBAL_INDEX_LEB:
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case wasm::R_WASM_MEMORY_ADDR_LEB:
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case wasm::R_WASM_EVENT_INDEX_LEB:
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writePatchableLEB(Stream, Value, Offset);
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writePatchableLEB<5>(Stream, Value, Offset);
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break;
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case wasm::R_WASM_MEMORY_ADDR_LEB64:
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writePatchableLEB<10>(Stream, Value, Offset);
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break;
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case wasm::R_WASM_TABLE_INDEX_I32:
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case wasm::R_WASM_MEMORY_ADDR_I32:
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@ -683,11 +696,18 @@ void WasmObjectWriter::applyRelocations(
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case wasm::R_WASM_GLOBAL_INDEX_I32:
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patchI32(Stream, Value, Offset);
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break;
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case wasm::R_WASM_MEMORY_ADDR_I64:
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patchI64(Stream, Value, Offset);
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break;
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case wasm::R_WASM_TABLE_INDEX_SLEB:
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case wasm::R_WASM_TABLE_INDEX_REL_SLEB:
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case wasm::R_WASM_MEMORY_ADDR_SLEB:
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case wasm::R_WASM_MEMORY_ADDR_REL_SLEB:
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writePatchableSLEB(Stream, Value, Offset);
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writePatchableSLEB<5>(Stream, Value, Offset);
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break;
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case wasm::R_WASM_MEMORY_ADDR_SLEB64:
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case wasm::R_WASM_MEMORY_ADDR_REL_SLEB64:
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writePatchableSLEB<10>(Stream, Value, Offset);
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break;
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default:
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llvm_unreachable("invalid relocation type");
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@ -1420,9 +1440,8 @@ uint64_t WasmObjectWriter::writeObject(MCAssembler &Asm,
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// For each data symbol, export it in the symtab as a reference to the
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// corresponding Wasm data segment.
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wasm::WasmDataReference Ref = wasm::WasmDataReference{
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DataSection.getSegmentIndex(),
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static_cast<uint32_t>(Layout.getSymbolOffset(WS)),
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static_cast<uint32_t>(Size)};
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DataSection.getSegmentIndex(), Layout.getSymbolOffset(WS),
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static_cast<uint64_t>(Size)};
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DataLocations[&WS] = Ref;
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LLVM_DEBUG(dbgs() << " -> segment index: " << Ref.Segment << "\n");
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@ -505,6 +505,17 @@ static bool supportsWasm32(uint64_t Type) {
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}
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}
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static bool supportsWasm64(uint64_t Type) {
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switch (Type) {
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case wasm::R_WASM_MEMORY_ADDR_LEB64:
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case wasm::R_WASM_MEMORY_ADDR_SLEB64:
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case wasm::R_WASM_MEMORY_ADDR_I64:
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return true;
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default:
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return supportsWasm32(Type);
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}
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}
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static uint64_t resolveWasm32(RelocationRef R, uint64_t S, uint64_t A) {
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switch (R.getType()) {
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case wasm::R_WASM_FUNCTION_INDEX_LEB:
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@ -526,6 +537,18 @@ static uint64_t resolveWasm32(RelocationRef R, uint64_t S, uint64_t A) {
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}
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}
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static uint64_t resolveWasm64(RelocationRef R, uint64_t S, uint64_t A) {
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switch (R.getType()) {
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case wasm::R_WASM_MEMORY_ADDR_LEB64:
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case wasm::R_WASM_MEMORY_ADDR_SLEB64:
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case wasm::R_WASM_MEMORY_ADDR_I64:
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// For wasm section, its offset at 0 -- ignoring Value
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return A;
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default:
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return resolveWasm32(R, S, A);
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}
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}
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std::pair<bool (*)(uint64_t), RelocationResolver>
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getRelocationResolver(const ObjectFile &Obj) {
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if (Obj.isCOFF()) {
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@ -607,6 +630,8 @@ getRelocationResolver(const ObjectFile &Obj) {
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} else if (Obj.isWasm()) {
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if (Obj.getArch() == Triple::wasm32)
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return {supportsWasm32, resolveWasm32};
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if (Obj.getArch() == Triple::wasm64)
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return {supportsWasm64, resolveWasm64};
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return {nullptr, nullptr};
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}
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@ -156,6 +156,10 @@ static int64_t readVarint64(WasmObjectFile::ReadContext &Ctx) {
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return readLEB128(Ctx);
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}
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static uint64_t readVaruint64(WasmObjectFile::ReadContext &Ctx) {
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return readULEB128(Ctx);
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}
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static uint8_t readOpcode(WasmObjectFile::ReadContext &Ctx) {
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return readUint8(Ctx);
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}
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@ -558,12 +562,12 @@ Error WasmObjectFile::parseLinkingSectionSymtab(ReadContext &Ctx) {
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case wasm::WASM_SYMBOL_TYPE_DATA:
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Info.Name = readString(Ctx);
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if (IsDefined) {
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uint32_t Index = readVaruint32(Ctx);
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auto Index = readVaruint32(Ctx);
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if (Index >= DataSegments.size())
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return make_error<GenericBinaryError>("invalid data symbol index",
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object_error::parse_failed);
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uint32_t Offset = readVaruint32(Ctx);
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uint32_t Size = readVaruint32(Ctx);
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auto Offset = readVaruint64(Ctx);
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auto Size = readVaruint64(Ctx);
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if (Offset + Size > DataSegments[Index].Data.Content.size())
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return make_error<GenericBinaryError>("invalid data symbol offset",
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object_error::parse_failed);
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@ -818,6 +822,15 @@ Error WasmObjectFile::parseRelocSection(StringRef Name, ReadContext &Ctx) {
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object_error::parse_failed);
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Reloc.Addend = readVarint32(Ctx);
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break;
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case wasm::R_WASM_MEMORY_ADDR_LEB64:
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case wasm::R_WASM_MEMORY_ADDR_SLEB64:
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case wasm::R_WASM_MEMORY_ADDR_I64:
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case wasm::R_WASM_MEMORY_ADDR_REL_SLEB64:
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if (!isValidDataSymbol(Reloc.Index))
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return make_error<GenericBinaryError>("Bad relocation data index",
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object_error::parse_failed);
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Reloc.Addend = readVarint64(Ctx);
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break;
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case wasm::R_WASM_FUNCTION_OFFSET_I32:
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if (!isValidFunctionSymbol(Reloc.Index))
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return make_error<GenericBinaryError>("Bad relocation function index",
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@ -840,12 +853,18 @@ Error WasmObjectFile::parseRelocSection(StringRef Name, ReadContext &Ctx) {
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// also shouldn't overlap a function/element boundary, but we don't bother
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// to check that.
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uint64_t Size = 5;
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if (Reloc.Type == wasm::R_WASM_MEMORY_ADDR_LEB64 ||
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Reloc.Type == wasm::R_WASM_MEMORY_ADDR_SLEB64 ||
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Reloc.Type == wasm::R_WASM_MEMORY_ADDR_REL_SLEB64)
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Size = 10;
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if (Reloc.Type == wasm::R_WASM_TABLE_INDEX_I32 ||
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Reloc.Type == wasm::R_WASM_MEMORY_ADDR_I32 ||
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Reloc.Type == wasm::R_WASM_SECTION_OFFSET_I32 ||
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Reloc.Type == wasm::R_WASM_FUNCTION_OFFSET_I32 ||
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Reloc.Type == wasm::R_WASM_GLOBAL_INDEX_I32)
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Size = 4;
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if (Reloc.Type == wasm::R_WASM_MEMORY_ADDR_I64)
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Size = 8;
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if (Reloc.Offset + Size > EndOffset)
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return make_error<GenericBinaryError>("Bad relocation offset",
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object_error::parse_failed);
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@ -1331,8 +1350,13 @@ uint64_t WasmObjectFile::getWasmSymbolValue(const WasmSymbol &Sym) const {
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// offset within the segment.
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uint32_t SegmentIndex = Sym.Info.DataRef.Segment;
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const wasm::WasmDataSegment &Segment = DataSegments[SegmentIndex].Data;
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assert(Segment.Offset.Opcode == wasm::WASM_OPCODE_I32_CONST);
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return Segment.Offset.Value.Int32 + Sym.Info.DataRef.Offset;
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if (Segment.Offset.Opcode == wasm::WASM_OPCODE_I32_CONST) {
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return Segment.Offset.Value.Int32 + Sym.Info.DataRef.Offset;
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} else if (Segment.Offset.Opcode == wasm::WASM_OPCODE_I64_CONST) {
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return Segment.Offset.Value.Int64 + Sym.Info.DataRef.Offset;
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} else {
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llvm_unreachable("unknown init expr opcode");
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}
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}
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case wasm::WASM_SYMBOL_TYPE_SECTION:
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return 0;
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@ -532,8 +532,11 @@ void WasmWriter::writeRelocSection(raw_ostream &OS, WasmYAML::Section &Sec,
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encodeULEB128(Reloc.Index, OS);
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switch (Reloc.Type) {
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case wasm::R_WASM_MEMORY_ADDR_LEB:
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case wasm::R_WASM_MEMORY_ADDR_LEB64:
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case wasm::R_WASM_MEMORY_ADDR_SLEB:
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case wasm::R_WASM_MEMORY_ADDR_SLEB64:
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case wasm::R_WASM_MEMORY_ADDR_I32:
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case wasm::R_WASM_MEMORY_ADDR_I64:
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case wasm::R_WASM_FUNCTION_OFFSET_I32:
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case wasm::R_WASM_SECTION_OFFSET_I32:
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encodeULEB128(Reloc.Addend, OS);
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@ -846,6 +846,16 @@ public:
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if (Op0.getImm() == -1)
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Op0.setImm(Align);
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}
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if (getSTI().getTargetTriple().isArch64Bit()) {
|
||||
// Upgrade 32-bit loads/stores to 64-bit. These mostly differ by having
|
||||
// an offset64 arg instead of offset32, but to the assembler matcher
|
||||
// they're both immediates so don't get selected for.
|
||||
auto Opc64 = WebAssembly::getWasm64Opcode(
|
||||
static_cast<uint16_t>(Inst.getOpcode()));
|
||||
if (Opc64 >= 0) {
|
||||
Inst.setOpcode(Opc64);
|
||||
}
|
||||
}
|
||||
Out.emitInstruction(Inst, getSTI());
|
||||
if (CurrentState == EndFunction) {
|
||||
onEndOfFunction();
|
||||
|
||||
@ -101,9 +101,6 @@ void WebAssemblyMCCodeEmitter::encodeInstruction(
|
||||
case WebAssembly::OPERAND_I64IMM:
|
||||
encodeSLEB128(int64_t(MO.getImm()), OS);
|
||||
break;
|
||||
case WebAssembly::OPERAND_OFFSET64:
|
||||
encodeULEB128(uint64_t(MO.getImm()), OS);
|
||||
break;
|
||||
case WebAssembly::OPERAND_SIGNATURE:
|
||||
OS << uint8_t(MO.getImm());
|
||||
break;
|
||||
@ -163,6 +160,7 @@ void WebAssemblyMCCodeEmitter::encodeInstruction(
|
||||
break;
|
||||
case WebAssembly::OPERAND_OFFSET64:
|
||||
FixupKind = MCFixupKind(WebAssembly::fixup_uleb128_i64);
|
||||
PaddedSize = 10;
|
||||
break;
|
||||
default:
|
||||
llvm_unreachable("unexpected symbolic operand kind");
|
||||
|
||||
@ -78,7 +78,8 @@ unsigned WebAssemblyWasmObjectWriter::getRelocType(const MCValue &Target,
|
||||
return wasm::R_WASM_TABLE_INDEX_REL_SLEB;
|
||||
case MCSymbolRefExpr::VK_WASM_MBREL:
|
||||
assert(SymA.isData());
|
||||
return wasm::R_WASM_MEMORY_ADDR_REL_SLEB;
|
||||
return is64Bit() ? wasm::R_WASM_MEMORY_ADDR_REL_SLEB64
|
||||
: wasm::R_WASM_MEMORY_ADDR_REL_SLEB;
|
||||
case MCSymbolRefExpr::VK_WASM_TYPEINDEX:
|
||||
return wasm::R_WASM_TYPE_INDEX_LEB;
|
||||
default:
|
||||
@ -87,12 +88,13 @@ unsigned WebAssemblyWasmObjectWriter::getRelocType(const MCValue &Target,
|
||||
|
||||
switch (unsigned(Fixup.getKind())) {
|
||||
case WebAssembly::fixup_sleb128_i32:
|
||||
case WebAssembly::fixup_sleb128_i64:
|
||||
if (SymA.isFunction())
|
||||
return wasm::R_WASM_TABLE_INDEX_SLEB;
|
||||
return wasm::R_WASM_MEMORY_ADDR_SLEB;
|
||||
case WebAssembly::fixup_sleb128_i64:
|
||||
assert(SymA.isData());
|
||||
return wasm::R_WASM_MEMORY_ADDR_SLEB64;
|
||||
case WebAssembly::fixup_uleb128_i32:
|
||||
case WebAssembly::fixup_uleb128_i64:
|
||||
if (SymA.isGlobal())
|
||||
return wasm::R_WASM_GLOBAL_INDEX_LEB;
|
||||
if (SymA.isFunction())
|
||||
@ -100,6 +102,9 @@ unsigned WebAssemblyWasmObjectWriter::getRelocType(const MCValue &Target,
|
||||
if (SymA.isEvent())
|
||||
return wasm::R_WASM_EVENT_INDEX_LEB;
|
||||
return wasm::R_WASM_MEMORY_ADDR_LEB;
|
||||
case WebAssembly::fixup_uleb128_i64:
|
||||
assert(SymA.isData());
|
||||
return wasm::R_WASM_MEMORY_ADDR_LEB64;
|
||||
case FK_Data_4:
|
||||
if (SymA.isFunction())
|
||||
return wasm::R_WASM_TABLE_INDEX_I32;
|
||||
@ -113,6 +118,9 @@ unsigned WebAssemblyWasmObjectWriter::getRelocType(const MCValue &Target,
|
||||
return wasm::R_WASM_SECTION_OFFSET_I32;
|
||||
}
|
||||
return wasm::R_WASM_MEMORY_ADDR_I32;
|
||||
case FK_Data_8:
|
||||
assert(SymA.isData());
|
||||
return wasm::R_WASM_MEMORY_ADDR_I64;
|
||||
default:
|
||||
llvm_unreachable("unimplemented fixup kind");
|
||||
}
|
||||
|
||||
@ -32,3 +32,9 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyTargetInfo() {
|
||||
RegisterTarget<Triple::wasm64> Y(getTheWebAssemblyTarget64(), "wasm64",
|
||||
"WebAssembly 64-bit", "WebAssembly");
|
||||
}
|
||||
|
||||
// Defines llvm::WebAssembly::getWasm64Opcode llvm::WebAssembly::getStackOpcode
|
||||
// which have to be in a shared location between CodeGen and MC.
|
||||
#define GET_INSTRMAP_INFO 1
|
||||
#define GET_INSTRINFO_ENUM 1
|
||||
#include "WebAssemblyGenInstrInfo.inc"
|
||||
|
||||
@ -21,6 +21,13 @@ class Target;
|
||||
Target &getTheWebAssemblyTarget32();
|
||||
Target &getTheWebAssemblyTarget64();
|
||||
|
||||
namespace WebAssembly {
|
||||
|
||||
int getStackOpcode(unsigned short Opcode);
|
||||
int getWasm64Opcode(unsigned short Opcode);
|
||||
|
||||
} // namespace WebAssembly
|
||||
|
||||
} // namespace llvm
|
||||
|
||||
#endif // LLVM_LIB_TARGET_WEBASSEMBLY_TARGETINFO_WEBASSEMBLYTARGETINFO_H
|
||||
|
||||
@ -14,9 +14,10 @@
|
||||
let UseNamedOperandTable = 1 in
|
||||
multiclass ATOMIC_I<dag oops_r, dag iops_r, dag oops_s, dag iops_s,
|
||||
list<dag> pattern_r, string asmstr_r,
|
||||
string asmstr_s, bits<32> atomic_op> {
|
||||
string asmstr_s, bits<32> atomic_op,
|
||||
string is64 = "false"> {
|
||||
defm "" : I<oops_r, iops_r, oops_s, iops_s, pattern_r, asmstr_r, asmstr_s,
|
||||
!or(0xfe00, !and(0xff, atomic_op))>,
|
||||
!or(0xfe00, !and(0xff, atomic_op)), is64>,
|
||||
Requires<[HasAtomics]>;
|
||||
}
|
||||
|
||||
@ -37,13 +38,13 @@ defm ATOMIC_NOTIFY_A32 :
|
||||
(ins P2Align:$p2align, offset32_op:$off, I32:$addr, I32:$count),
|
||||
(outs), (ins P2Align:$p2align, offset32_op:$off), [],
|
||||
"atomic.notify \t$dst, ${off}(${addr})${p2align}, $count",
|
||||
"atomic.notify \t${off}${p2align}", 0x00>;
|
||||
"atomic.notify \t${off}${p2align}", 0x00, "false">;
|
||||
defm ATOMIC_NOTIFY_A64 :
|
||||
ATOMIC_I<(outs I32:$dst),
|
||||
(ins P2Align:$p2align, offset64_op:$off, I64:$addr, I32:$count),
|
||||
(outs), (ins P2Align:$p2align, offset64_op:$off), [],
|
||||
"atomic.notify \t$dst, ${off}(${addr})${p2align}, $count",
|
||||
"atomic.notify \t${off}${p2align}", 0x00>;
|
||||
"atomic.notify \t${off}${p2align}", 0x00, "true">;
|
||||
let mayLoad = 1 in {
|
||||
defm ATOMIC_WAIT_I32_A32 :
|
||||
ATOMIC_I<(outs I32:$dst),
|
||||
@ -51,28 +52,28 @@ defm ATOMIC_WAIT_I32_A32 :
|
||||
I64:$timeout),
|
||||
(outs), (ins P2Align:$p2align, offset32_op:$off), [],
|
||||
"i32.atomic.wait \t$dst, ${off}(${addr})${p2align}, $exp, $timeout",
|
||||
"i32.atomic.wait \t${off}${p2align}", 0x01>;
|
||||
"i32.atomic.wait \t${off}${p2align}", 0x01, "false">;
|
||||
defm ATOMIC_WAIT_I32_A64 :
|
||||
ATOMIC_I<(outs I32:$dst),
|
||||
(ins P2Align:$p2align, offset64_op:$off, I64:$addr, I32:$exp,
|
||||
I64:$timeout),
|
||||
(outs), (ins P2Align:$p2align, offset64_op:$off), [],
|
||||
"i32.atomic.wait \t$dst, ${off}(${addr})${p2align}, $exp, $timeout",
|
||||
"i32.atomic.wait \t${off}${p2align}", 0x01>;
|
||||
"i32.atomic.wait \t${off}${p2align}", 0x01, "true">;
|
||||
defm ATOMIC_WAIT_I64_A32 :
|
||||
ATOMIC_I<(outs I32:$dst),
|
||||
(ins P2Align:$p2align, offset32_op:$off, I32:$addr, I64:$exp,
|
||||
I64:$timeout),
|
||||
(outs), (ins P2Align:$p2align, offset32_op:$off), [],
|
||||
"i64.atomic.wait \t$dst, ${off}(${addr})${p2align}, $exp, $timeout",
|
||||
"i64.atomic.wait \t${off}${p2align}", 0x02>;
|
||||
"i64.atomic.wait \t${off}${p2align}", 0x02, "false">;
|
||||
defm ATOMIC_WAIT_I64_A64 :
|
||||
ATOMIC_I<(outs I32:$dst),
|
||||
(ins P2Align:$p2align, offset64_op:$off, I64:$addr, I64:$exp,
|
||||
I64:$timeout),
|
||||
(outs), (ins P2Align:$p2align, offset64_op:$off), [],
|
||||
"i64.atomic.wait \t$dst, ${off}(${addr})${p2align}, $exp, $timeout",
|
||||
"i64.atomic.wait \t${off}${p2align}", 0x02>;
|
||||
"i64.atomic.wait \t${off}${p2align}", 0x02, "true">;
|
||||
} // mayLoad = 1
|
||||
} // hasSideEffects = 1
|
||||
|
||||
@ -350,8 +351,8 @@ defm : LoadPatGlobalAddrOffOnly<i64, sext_aload_16_64, "ATOMIC_LOAD16_U_I64">;
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
multiclass AtomicStore<WebAssemblyRegClass rc, string name, int atomic_op> {
|
||||
defm "" : WebAssemblyStore<rc, name, !or(0xfe00, !and(0xff, atomic_op))>,
|
||||
Requires<[HasAtomics]>;
|
||||
defm "" : WebAssemblyStore<rc, name, !or(0xfe00, !and(0xff, atomic_op)),
|
||||
[HasAtomics]>;
|
||||
}
|
||||
|
||||
defm ATOMIC_STORE_I32 : AtomicStore<I32, "i32.atomic.store", 0x17>;
|
||||
@ -486,13 +487,13 @@ multiclass WebAssemblyBinRMW<WebAssemblyRegClass rc, string name,
|
||||
(ins P2Align:$p2align, offset32_op:$off, I32:$addr, rc:$val),
|
||||
(outs), (ins P2Align:$p2align, offset32_op:$off), [],
|
||||
!strconcat(name, "\t$dst, ${off}(${addr})${p2align}, $val"),
|
||||
!strconcat(name, "\t${off}${p2align}"), atomic_op>;
|
||||
!strconcat(name, "\t${off}${p2align}"), atomic_op, "false">;
|
||||
defm "_A64" :
|
||||
ATOMIC_I<(outs rc:$dst),
|
||||
(ins P2Align:$p2align, offset64_op:$off, I64:$addr, rc:$val),
|
||||
(outs), (ins P2Align:$p2align, offset64_op:$off), [],
|
||||
!strconcat(name, "\t$dst, ${off}(${addr})${p2align}, $val"),
|
||||
!strconcat(name, "\t${off}${p2align}"), atomic_op>;
|
||||
!strconcat(name, "\t${off}${p2align}"), atomic_op, "true">;
|
||||
}
|
||||
|
||||
defm ATOMIC_RMW_ADD_I32 : WebAssemblyBinRMW<I32, "i32.atomic.rmw.add", 0x1e>;
|
||||
@ -797,14 +798,14 @@ multiclass WebAssemblyTerRMW<WebAssemblyRegClass rc, string name,
|
||||
rc:$new_),
|
||||
(outs), (ins P2Align:$p2align, offset32_op:$off), [],
|
||||
!strconcat(name, "\t$dst, ${off}(${addr})${p2align}, $exp, $new_"),
|
||||
!strconcat(name, "\t${off}${p2align}"), atomic_op>;
|
||||
!strconcat(name, "\t${off}${p2align}"), atomic_op, "false">;
|
||||
defm "_A64" :
|
||||
ATOMIC_I<(outs rc:$dst),
|
||||
(ins P2Align:$p2align, offset64_op:$off, I64:$addr, rc:$exp,
|
||||
rc:$new_),
|
||||
(outs), (ins P2Align:$p2align, offset64_op:$off), [],
|
||||
!strconcat(name, "\t$dst, ${off}(${addr})${p2align}, $exp, $new_"),
|
||||
!strconcat(name, "\t${off}${p2align}"), atomic_op>;
|
||||
!strconcat(name, "\t${off}${p2align}"), atomic_op, "true">;
|
||||
}
|
||||
|
||||
defm ATOMIC_RMW_CMPXCHG_I32 :
|
||||
|
||||
@ -14,11 +14,13 @@
|
||||
// WebAssembly Instruction Format.
|
||||
// We instantiate 2 of these for every actual instruction (register based
|
||||
// and stack based), see below.
|
||||
class WebAssemblyInst<bits<32> inst, string asmstr, string stack> : StackRel,
|
||||
Instruction {
|
||||
class WebAssemblyInst<bits<32> inst, string asmstr, string stack, string is64>
|
||||
: StackRel, Wasm64Rel, Instruction {
|
||||
bits<32> Inst = inst; // Instruction encoding.
|
||||
string StackBased = stack;
|
||||
string BaseName = NAME;
|
||||
string IsWasm64 = is64;
|
||||
string Wasm32Name = !subst("_A64", "_A32", NAME);
|
||||
let Namespace = "WebAssembly";
|
||||
let Pattern = [];
|
||||
let AsmString = asmstr;
|
||||
@ -29,8 +31,8 @@ class WebAssemblyInst<bits<32> inst, string asmstr, string stack> : StackRel,
|
||||
|
||||
// Normal instructions. Default instantiation of a WebAssemblyInst.
|
||||
class NI<dag oops, dag iops, list<dag> pattern, string stack,
|
||||
string asmstr = "", bits<32> inst = -1>
|
||||
: WebAssemblyInst<inst, asmstr, stack> {
|
||||
string asmstr = "", bits<32> inst = -1, string is64 = "false">
|
||||
: WebAssemblyInst<inst, asmstr, stack, is64> {
|
||||
dag OutOperandList = oops;
|
||||
dag InOperandList = iops;
|
||||
let Pattern = pattern;
|
||||
@ -52,11 +54,11 @@ class NI<dag oops, dag iops, list<dag> pattern, string stack,
|
||||
// there is always an equivalent pair of instructions.
|
||||
multiclass I<dag oops_r, dag iops_r, dag oops_s, dag iops_s,
|
||||
list<dag> pattern_r, string asmstr_r = "", string asmstr_s = "",
|
||||
bits<32> inst = -1> {
|
||||
bits<32> inst = -1, string is64 = "false"> {
|
||||
let isCodeGenOnly = 1 in
|
||||
def "" : NI<oops_r, iops_r, pattern_r, "false", asmstr_r, inst>;
|
||||
def "" : NI<oops_r, iops_r, pattern_r, "false", asmstr_r, inst, is64>;
|
||||
let BaseName = NAME in
|
||||
def _S : NI<oops_s, iops_s, [], "true", asmstr_s, inst>;
|
||||
def _S : NI<oops_s, iops_s, [], "true", asmstr_s, inst, is64>;
|
||||
}
|
||||
|
||||
// For instructions that have no register ops, so both sets are the same.
|
||||
|
||||
@ -202,6 +202,19 @@ def getStackOpcode : InstrMapping {
|
||||
let ValueCols = [["true"]];
|
||||
}
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
// WebAssembly 32 to 64-bit instruction mapping
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
class Wasm64Rel;
|
||||
def getWasm64Opcode : InstrMapping {
|
||||
let FilterClass = "Wasm64Rel";
|
||||
let RowFields = ["Wasm32Name"];
|
||||
let ColFields = ["IsWasm64"];
|
||||
let KeyCol = ["false"];
|
||||
let ValueCols = [["true"]];
|
||||
}
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
// WebAssembly Instruction Format Definitions.
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
@ -41,19 +41,19 @@ def or_is_add : PatFrag<(ops node:$lhs, node:$rhs), (or node:$lhs, node:$rhs),[{
|
||||
|
||||
// Defines atomic and non-atomic loads, regular and extending.
|
||||
multiclass WebAssemblyLoad<WebAssemblyRegClass rc, string Name, int Opcode,
|
||||
list<Predicate> reqs> {
|
||||
list<Predicate> reqs = []> {
|
||||
let mayLoad = 1, UseNamedOperandTable = 1 in {
|
||||
defm "_A32": I<(outs rc:$dst),
|
||||
(ins P2Align:$p2align, offset32_op:$off, I32:$addr),
|
||||
(outs), (ins P2Align:$p2align, offset32_op:$off),
|
||||
[], !strconcat(Name, "\t$dst, ${off}(${addr})${p2align}"),
|
||||
!strconcat(Name, "\t${off}${p2align}"), Opcode>,
|
||||
!strconcat(Name, "\t${off}${p2align}"), Opcode, "false">,
|
||||
Requires<reqs>;
|
||||
defm "_A64": I<(outs rc:$dst),
|
||||
(ins P2Align:$p2align, offset64_op:$off, I64:$addr),
|
||||
(outs), (ins P2Align:$p2align, offset64_op:$off),
|
||||
[], !strconcat(Name, "\t$dst, ${off}(${addr})${p2align}"),
|
||||
!strconcat(Name, "\t${off}${p2align}"), Opcode>,
|
||||
!strconcat(Name, "\t${off}${p2align}"), Opcode, "true">,
|
||||
Requires<reqs>;
|
||||
}
|
||||
}
|
||||
@ -236,21 +236,24 @@ defm : LoadPatGlobalAddrOffOnly<i64, extloadi16, "LOAD16_U_I64">;
|
||||
defm : LoadPatGlobalAddrOffOnly<i64, extloadi32, "LOAD32_U_I64">;
|
||||
|
||||
// Defines atomic and non-atomic stores, regular and truncating
|
||||
multiclass WebAssemblyStore<WebAssemblyRegClass rc, string Name, int Opcode> {
|
||||
multiclass WebAssemblyStore<WebAssemblyRegClass rc, string Name, int Opcode,
|
||||
list<Predicate> reqs = []> {
|
||||
let mayStore = 1, UseNamedOperandTable = 1 in
|
||||
defm "_A32" : I<(outs),
|
||||
(ins P2Align:$p2align, offset32_op:$off, I32:$addr, rc:$val),
|
||||
(outs),
|
||||
(ins P2Align:$p2align, offset32_op:$off), [],
|
||||
!strconcat(Name, "\t${off}(${addr})${p2align}, $val"),
|
||||
!strconcat(Name, "\t${off}${p2align}"), Opcode>;
|
||||
!strconcat(Name, "\t${off}${p2align}"), Opcode, "false">,
|
||||
Requires<reqs>;
|
||||
let mayStore = 1, UseNamedOperandTable = 1 in
|
||||
defm "_A64" : I<(outs),
|
||||
(ins P2Align:$p2align, offset64_op:$off, I64:$addr, rc:$val),
|
||||
(outs),
|
||||
(ins P2Align:$p2align, offset64_op:$off), [],
|
||||
!strconcat(Name, "\t${off}(${addr})${p2align}, $val"),
|
||||
!strconcat(Name, "\t${off}${p2align}"), Opcode>;
|
||||
!strconcat(Name, "\t${off}${p2align}"), Opcode, "true">,
|
||||
Requires<reqs>;
|
||||
}
|
||||
|
||||
// Basic store.
|
||||
|
||||
@ -13,10 +13,11 @@
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
#include "WebAssemblyMCInstLower.h"
|
||||
#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
|
||||
#include "TargetInfo/WebAssemblyTargetInfo.h"
|
||||
#include "WebAssemblyAsmPrinter.h"
|
||||
#include "WebAssemblyMachineFunctionInfo.h"
|
||||
#include "WebAssemblyRuntimeLibcallSignatures.h"
|
||||
#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
|
||||
#include "llvm/CodeGen/AsmPrinter.h"
|
||||
#include "llvm/CodeGen/MachineFunction.h"
|
||||
#include "llvm/IR/Constants.h"
|
||||
@ -29,11 +30,6 @@
|
||||
#include "llvm/Support/raw_ostream.h"
|
||||
using namespace llvm;
|
||||
|
||||
// Defines llvm::WebAssembly::getStackOpcode to convert register instructions to
|
||||
// stack instructions
|
||||
#define GET_INSTRMAP_INFO 1
|
||||
#include "WebAssemblyGenInstrInfo.inc"
|
||||
|
||||
// This disables the removal of registers when lowering into MC, as required
|
||||
// by some current tests.
|
||||
cl::opt<bool>
|
||||
|
||||
@ -1,6 +1,5 @@
|
||||
# RUN: llvm-mc -triple=wasm64-unknown-unknown -mattr=+atomics,+unimplemented-simd128,+nontrapping-fptoint,+exception-handling < %s | FileCheck %s
|
||||
# Check that it converts to .o without errors, but don't check any output:
|
||||
# RUN: llvm-mc -triple=wasm64-unknown-unknown -filetype=obj -mattr=+atomics,+unimplemented-simd128,+nontrapping-fptoint,+exception-handling -o %t.o < %s
|
||||
# RUN: llvm-mc -triple=wasm64-unknown-unknown -filetype=obj -mattr=+atomics,+unimplemented-simd128,+nontrapping-fptoint,+exception-handling -o - < %s | obj2yaml | FileCheck %s -check-prefix=BIN
|
||||
|
||||
# Most of our other tests are for wasm32, this one adds some wasm64 specific tests.
|
||||
|
||||
@ -18,14 +17,18 @@ test:
|
||||
f32.load 0
|
||||
drop
|
||||
|
||||
# i64.const .L.str # get i64 relocatable.
|
||||
# f32.load 0
|
||||
# drop
|
||||
i64.const .L.str # get i64 relocatable.
|
||||
f32.load 0
|
||||
drop
|
||||
|
||||
global.get myglob64 # get i64 from global
|
||||
f32.load 0
|
||||
drop
|
||||
|
||||
i64.const 0
|
||||
f32.load .L.str # relocatable offset!
|
||||
drop
|
||||
|
||||
### basic stores
|
||||
|
||||
f32.const 0.0
|
||||
@ -36,21 +39,27 @@ test:
|
||||
local.get 0 # get i64 from local.
|
||||
f32.store 0
|
||||
|
||||
# f32.const 0.0
|
||||
# i64.const .L.str # get i64 relocatable.
|
||||
# f32.store 0
|
||||
f32.const 0.0
|
||||
i64.const .L.str # get i64 relocatable.
|
||||
f32.store 0
|
||||
|
||||
f32.const 0.0
|
||||
global.get myglob64 # get i64 from global
|
||||
f32.store 0
|
||||
|
||||
f32.const 0.0
|
||||
i64.const 0
|
||||
f32.store .L.str # relocatable offset!
|
||||
|
||||
end_function
|
||||
|
||||
.section .rodata..L.str,"",@
|
||||
.hidden .L.str
|
||||
.type .L.str,@object
|
||||
.L.str:
|
||||
.asciz "Hello, World!"
|
||||
.asciz "Hello, World!!!"
|
||||
.int64 .L.str # relocatable inside data.
|
||||
.size .L.str, 24
|
||||
|
||||
.globaltype myglob64, i64
|
||||
|
||||
@ -68,14 +77,18 @@ test:
|
||||
# CHECK-NEXT: f32.load 0
|
||||
# CHECK-NEXT: drop
|
||||
|
||||
# NCHECK: i64.const .L.str
|
||||
# NCHECK-NEXT: f32.load 0
|
||||
# NCHECK-NEXT: drop
|
||||
# CHECK: i64.const .L.str
|
||||
# CHECK-NEXT: f32.load 0
|
||||
# CHECK-NEXT: drop
|
||||
|
||||
# CHECK: global.get myglob64
|
||||
# CHECK-NEXT: f32.load 0
|
||||
# CHECK-NEXT: drop
|
||||
|
||||
# CHECK: i64.const 0
|
||||
# CHECK-NEXT: f32.load .L.str
|
||||
# CHECK-NEXT: drop
|
||||
|
||||
|
||||
# CHECK: f32.const 0x0p0
|
||||
# CHECK-NEXT: i64.const 0
|
||||
@ -85,14 +98,18 @@ test:
|
||||
# CHECK-NEXT: local.get 0
|
||||
# CHECK-NEXT: f32.store 0
|
||||
|
||||
# NCHECK: f32.const 0x0p0
|
||||
# NCHECK-NEXT: i64.const .L.str
|
||||
# NCHECK-NEXT: f32.store 0
|
||||
# CHECK: f32.const 0x0p0
|
||||
# CHECK-NEXT: i64.const .L.str
|
||||
# CHECK-NEXT: f32.store 0
|
||||
|
||||
# CHECK: f32.const 0x0p0
|
||||
# CHECK-NEXT: global.get myglob64
|
||||
# CHECK-NEXT: f32.store 0
|
||||
|
||||
# CHECK: f32.const 0x0p0
|
||||
# CHECK-NEXT: i64.const 0
|
||||
# CHECK-NEXT: f32.store .L.str
|
||||
|
||||
|
||||
# CHECK: end_function
|
||||
# CHECK-NEXT: .Ltmp0:
|
||||
@ -101,6 +118,108 @@ test:
|
||||
# CHECK: .section .rodata..L.str,"",@
|
||||
# CHECK-NEXT: .hidden .L.str
|
||||
# CHECK-NEXT: .L.str:
|
||||
# CHECK-NEXT: .asciz "Hello, World!"
|
||||
# CHECK-NEXT: .asciz "Hello, World!!!"
|
||||
# CHECK-NEXT: .int64 .L.str
|
||||
# CHECK-NEXT: .size .L.str, 24
|
||||
|
||||
# CHECK: .globaltype myglob64, i64
|
||||
|
||||
|
||||
|
||||
# BIN: --- !WASM
|
||||
# BIN-NEXT: FileHeader:
|
||||
# BIN-NEXT: Version: 0x00000001
|
||||
# BIN-NEXT: Sections:
|
||||
# BIN-NEXT: - Type: TYPE
|
||||
# BIN-NEXT: Signatures:
|
||||
# BIN-NEXT: - Index: 0
|
||||
# BIN-NEXT: ParamTypes:
|
||||
# BIN-NEXT: - I64
|
||||
# BIN-NEXT: ReturnTypes: []
|
||||
# BIN-NEXT: - Type: IMPORT
|
||||
# BIN-NEXT: Imports:
|
||||
# BIN-NEXT: - Module: env
|
||||
# BIN-NEXT: Field: __linear_memory
|
||||
# BIN-NEXT: Kind: MEMORY
|
||||
# BIN-NEXT: Memory:
|
||||
# BIN-NEXT: Initial: 0x00000001
|
||||
# BIN-NEXT: - Module: env
|
||||
# BIN-NEXT: Field: __indirect_function_table
|
||||
# BIN-NEXT: Kind: TABLE
|
||||
# BIN-NEXT: Table:
|
||||
# BIN-NEXT: ElemType: FUNCREF
|
||||
# BIN-NEXT: Limits:
|
||||
# BIN-NEXT: Initial: 0x00000000
|
||||
# BIN-NEXT: - Module: env
|
||||
# BIN-NEXT: Field: myglob64
|
||||
# BIN-NEXT: Kind: GLOBAL
|
||||
# BIN-NEXT: GlobalType: I64
|
||||
# BIN-NEXT: GlobalMutable: true
|
||||
# BIN-NEXT: - Type: FUNCTION
|
||||
# BIN-NEXT: FunctionTypes: [ 0 ]
|
||||
# BIN-NEXT: - Type: DATACOUNT
|
||||
# BIN-NEXT: Count: 1
|
||||
# BIN-NEXT: - Type: CODE
|
||||
# BIN-NEXT: Relocations:
|
||||
# BIN-NEXT: - Type: R_WASM_MEMORY_ADDR_SLEB64
|
||||
# BIN-NEXT: Index: 1
|
||||
# BIN-NEXT: Offset: 0x00000013
|
||||
# BIN-NEXT: - Type: R_WASM_GLOBAL_INDEX_LEB
|
||||
# BIN-NEXT: Index: 2
|
||||
# BIN-NEXT: Offset: 0x00000022
|
||||
# BIN-NEXT: - Type: R_WASM_MEMORY_ADDR_LEB64
|
||||
# BIN-NEXT: Index: 1
|
||||
# BIN-NEXT: Offset: 0x0000002F
|
||||
# BIN-NEXT: - Type: R_WASM_MEMORY_ADDR_SLEB64
|
||||
# BIN-NEXT: Index: 1
|
||||
# BIN-NEXT: Offset: 0x00000054
|
||||
# BIN-NEXT: - Type: R_WASM_GLOBAL_INDEX_LEB
|
||||
# BIN-NEXT: Index: 2
|
||||
# BIN-NEXT: Offset: 0x00000067
|
||||
# BIN-NEXT: - Type: R_WASM_MEMORY_ADDR_LEB64
|
||||
# BIN-NEXT: Index: 1
|
||||
# BIN-NEXT: Offset: 0x00000078
|
||||
# BIN-NEXT: Functions:
|
||||
# BIN-NEXT: - Index: 0
|
||||
# BIN-NEXT: Locals:
|
||||
# BIN-NEXT: - Type: I64
|
||||
# BIN-NEXT: Count: 1
|
||||
# BIN-NEXT: Body: 42002A02001A20002A02001A42808080808080808080002A02001A2380808080002A02001A42002A02808080808080808080001A4300000000420038020043000000002000380200430000000042808080808080808080003802004300000000238080808000380200430000000042003802808080808080808080000B
|
||||
# BIN-NEXT: - Type: DATA
|
||||
# BIN-NEXT: Relocations:
|
||||
# BIN-NEXT: - Type: R_WASM_MEMORY_ADDR_I64
|
||||
# BIN-NEXT: Index: 1
|
||||
# BIN-NEXT: Offset: 0x00000016
|
||||
# BIN-NEXT: Segments:
|
||||
# BIN-NEXT: - SectionOffset: 6
|
||||
# BIN-NEXT: InitFlags: 0
|
||||
# BIN-NEXT: Offset:
|
||||
# BIN-NEXT: Opcode: I32_CONST
|
||||
# BIN-NEXT: Value: 0
|
||||
# BIN-NEXT: Content: 48656C6C6F2C20576F726C64212121000000000000000000
|
||||
# BIN-NEXT: - Type: CUSTOM
|
||||
# BIN-NEXT: Name: linking
|
||||
# BIN-NEXT: Version: 2
|
||||
# BIN-NEXT: SymbolTable:
|
||||
# BIN-NEXT: - Index: 0
|
||||
# BIN-NEXT: Kind: FUNCTION
|
||||
# BIN-NEXT: Name: test
|
||||
# BIN-NEXT: Flags: [ BINDING_LOCAL ]
|
||||
# BIN-NEXT: Function: 0
|
||||
# BIN-NEXT: - Index: 1
|
||||
# BIN-NEXT: Kind: DATA
|
||||
# BIN-NEXT: Name: .L.str
|
||||
# BIN-NEXT: Flags: [ BINDING_LOCAL, VISIBILITY_HIDDEN ]
|
||||
# BIN-NEXT: Segment: 0
|
||||
# BIN-NEXT: Size: 24
|
||||
# BIN-NEXT: - Index: 2
|
||||
# BIN-NEXT: Kind: GLOBAL
|
||||
# BIN-NEXT: Name: myglob64
|
||||
# BIN-NEXT: Flags: [ UNDEFINED ]
|
||||
# BIN-NEXT: Global: 0
|
||||
# BIN-NEXT: SegmentInfo:
|
||||
# BIN-NEXT: - Index: 0
|
||||
# BIN-NEXT: Name: .rodata..L.str
|
||||
# BIN-NEXT: Alignment: 0
|
||||
# BIN-NEXT: Flags: [ ]
|
||||
# BIN-NEXT: ...
|
||||
|
||||
@ -182,6 +182,10 @@ void WasmDumper::printSectionHeaders() {
|
||||
W.printNumber("Size", static_cast<uint64_t>(Seg.Content.size()));
|
||||
if (Seg.Offset.Opcode == wasm::WASM_OPCODE_I32_CONST)
|
||||
W.printNumber("Offset", Seg.Offset.Value.Int32);
|
||||
else if (Seg.Offset.Opcode == wasm::WASM_OPCODE_I64_CONST)
|
||||
W.printNumber("Offset", Seg.Offset.Value.Int64);
|
||||
else
|
||||
llvm_unreachable("unknown init expr opcode");
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user