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Dix the 80-columns and remove unsupported v8i16 type from the list of legal vselect types.

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llvm-svn: 139324
This commit is contained in:
Nadav Rotem 2011-09-08 22:17:35 +00:00
parent 9f150bfedf
commit 2f256b7f9f
1 changed files with 12 additions and 9 deletions
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21
lib/Target/X86/X86ISelLowering.cpp
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@ -920,7 +920,6 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM)
setOperationAction(ISD::VSELECT, MVT::v2f64, Custom);
setOperationAction(ISD::VSELECT, MVT::v2i64, Custom);
setOperationAction(ISD::VSELECT, MVT::v16i8, Custom);
setOperationAction(ISD::VSELECT, MVT::v8i16, Custom);
setOperationAction(ISD::VSELECT, MVT::v4i32, Custom);
setOperationAction(ISD::VSELECT, MVT::v4f32, Custom);
@ -8703,16 +8702,20 @@ SDValue X86TargetLowering::LowerVSELECT(SDValue Op, SelectionDAG &DAG) const {
assert(Op2.getValueType().isVector() && "Op2 must be a vector");
assert(Cond.getValueType().isVector() && "Cond must be a vector");
assert(Op1.getValueType() == Op2.getValueType() && "Type mismatch");
switch (Op1.getValueType().getSimpleVT().SimpleTy) {
EVT VT = Op1.getValueType();
switch (VT.getSimpleVT().SimpleTy) {
default: break;
case MVT::v2i64: return DAG.getNode(X86ISD::BLENDVPD, DL, Op1.getValueType(), Ops, array_lengthof(Ops));
case MVT::v2f64: return DAG.getNode(X86ISD::BLENDVPD, DL, Op1.getValueType(), Ops, array_lengthof(Ops));
case MVT::v4i32: return DAG.getNode(X86ISD::BLENDVPS, DL, Op1.getValueType(), Ops, array_lengthof(Ops));
case MVT::v4f32: return DAG.getNode(X86ISD::BLENDVPS, DL, Op1.getValueType(), Ops, array_lengthof(Ops));
case MVT::v16i8: return DAG.getNode(X86ISD::PBLENDVB, DL, Op1.getValueType(), Ops, array_lengthof(Ops));
case MVT::v2i64:
case MVT::v2f64:
return DAG.getNode(X86ISD::BLENDVPD, DL, VT, Ops, array_lengthof(Ops));
case MVT::v4i32:
case MVT::v4f32:
return DAG.getNode(X86ISD::BLENDVPS, DL, VT , Ops, array_lengthof(Ops));
case MVT::v16i8:
return DAG.getNode(X86ISD::PBLENDVB, DL, VT , Ops, array_lengthof(Ops));
}
return SDValue();
}