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[CodeGenPrepare] Fix ModifiedDT flag in optimizeSelectInst

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r44412 fixed a huge compile time regression but it needed ModifiedDT flag to be
maintained correctly in optimizations in optimizeBlock() and optimizeInst().
Function optimizeSelectInst() does not update the flag.
This patch propagates the flag in optimizeSelectInst() back to
optimizeBlock().

This patch also removes ModifiedDT in CodeGenPrepare class (which is not used).
The property of ModifiedDT is now recorded in a ref parameter.

Differential Revision: https://reviews.llvm.org/D59139

llvm-svn: 355751
This commit is contained in:
Rong Xu 2019-03-08 22:46:18 +00:00
parent 480d945801
commit 2fcb4b4d81
2 changed files with 44 additions and 16 deletions
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26
lib/CodeGen/CodeGenPrepare.cpp
View File

@ -291,9 +291,6 @@ class TypePromotionTransaction;
/// Keep track of SExt promoted.
ValueToSExts ValToSExtendedUses;
/// True if CFG is modified in any way.
bool ModifiedDT;
/// True if optimizing for size.
bool OptSize;
@ -354,11 +351,11 @@ class TypePromotionTransaction;
bool optimizeExt(Instruction *&I);
bool optimizeExtUses(Instruction *I);
bool optimizeLoadExt(LoadInst *Load);
bool optimizeSelectInst(SelectInst *SI);
bool optimizeSelectInst(SelectInst *SI, bool &ModifiedDT);
bool optimizeShuffleVectorInst(ShuffleVectorInst *SVI);
bool optimizeSwitchInst(SwitchInst *SI);
bool optimizeExtractElementInst(Instruction *Inst);
bool dupRetToEnableTailCallOpts(BasicBlock *BB);
bool dupRetToEnableTailCallOpts(BasicBlock *BB, bool &ModifiedDT);
bool placeDbgValues(Function &F);
bool canFormExtLd(const SmallVectorImpl<Instruction *> &MovedExts,
LoadInst *&LI, Instruction *&Inst, bool HasPromoted);
@ -373,7 +370,7 @@ class TypePromotionTransaction;
bool AllowPromotionWithoutCommonHeader,
bool HasPromoted, TypePromotionTransaction &TPT,
SmallVectorImpl<Instruction *> &SpeculativelyMovedExts);
bool splitBranchCondition(Function &F);
bool splitBranchCondition(Function &F, bool &ModifiedDT);
bool simplifyOffsetableRelocate(Instruction &I);
bool tryToSinkFreeOperands(Instruction *I);
@ -402,7 +399,6 @@ bool CodeGenPrepare::runOnFunction(Function &F) {
InsertedInsts.clear();
PromotedInsts.clear();
ModifiedDT = false;
if (auto *TPC = getAnalysisIfAvailable<TargetPassConfig>()) {
TM = &TPC->getTM<TargetMachine>();
SubtargetInfo = TM->getSubtargetImpl(F);
@ -445,8 +441,9 @@ bool CodeGenPrepare::runOnFunction(Function &F) {
// unconditional branch.
EverMadeChange |= eliminateMostlyEmptyBlocks(F);
bool ModifiedDT = false;
if (!DisableBranchOpts)
EverMadeChange |= splitBranchCondition(F);
EverMadeChange |= splitBranchCondition(F, ModifiedDT);
// Split some critical edges where one of the sources is an indirect branch,
// to help generate sane code for PHIs involving such edges.
@ -1956,7 +1953,7 @@ bool CodeGenPrepare::optimizeCallInst(CallInst *CI, bool &ModifiedDT) {
/// %tmp2 = tail call i32 @f2()
/// ret i32 %tmp2
/// @endcode
bool CodeGenPrepare::dupRetToEnableTailCallOpts(BasicBlock *BB) {
bool CodeGenPrepare::dupRetToEnableTailCallOpts(BasicBlock *BB, bool &ModifiedDT) {
if (!TLI)
return false;
@ -5863,7 +5860,7 @@ static Value *getTrueOrFalseValue(
/// If we have a SelectInst that will likely profit from branch prediction,
/// turn it into a branch.
bool CodeGenPrepare::optimizeSelectInst(SelectInst *SI) {
bool CodeGenPrepare::optimizeSelectInst(SelectInst *SI, bool &ModifiedDT) {
// If branch conversion isn't desirable, exit early.
if (DisableSelectToBranch || OptSize || !TLI)
return false;
@ -6957,7 +6954,7 @@ bool CodeGenPrepare::optimizeInst(Instruction *I, DominatorTree &DT,
return optimizeCallInst(CI, ModifiedDT);
if (SelectInst *SI = dyn_cast<SelectInst>(I))
return optimizeSelectInst(SI);
return optimizeSelectInst(SI, ModifiedDT);
if (ShuffleVectorInst *SVI = dyn_cast<ShuffleVectorInst>(I))
return optimizeShuffleVectorInst(SVI);
@ -7015,7 +7012,7 @@ bool CodeGenPrepare::optimizeBlock(BasicBlock &BB, DominatorTree &DT,
}
}
}
MadeChange |= dupRetToEnableTailCallOpts(&BB);
MadeChange |= dupRetToEnableTailCallOpts(&BB, ModifiedDT);
return MadeChange;
}
@ -7091,7 +7088,7 @@ static void scaleWeights(uint64_t &NewTrue, uint64_t &NewFalse) {
///
/// FIXME: Remove the (equivalent?) implementation in SelectionDAG.
///
bool CodeGenPrepare::splitBranchCondition(Function &F) {
bool CodeGenPrepare::splitBranchCondition(Function &F, bool &ModifiedDT) {
if (!TM || !TM->Options.EnableFastISel || !TLI || TLI->isJumpExpensive())
return false;
@ -7248,10 +7245,7 @@ bool CodeGenPrepare::splitBranchCondition(Function &F) {
}
}
// Note: No point in getting fancy here, since the DT info is never
// available to CodeGenPrepare.
ModifiedDT = true;
MadeChange = true;
LLVM_DEBUG(dbgs() << "After branch condition splitting\n"; BB.dump();

34
test/Transforms/CodeGenPrepare/X86/optimizeSelect-DT.ll Normal file
View File

@ -0,0 +1,34 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -codegenprepare < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
define i1 @PR41004(i32 %x, i32 %y, i32 %t1) {
; CHECK-LABEL: @PR41004(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[T0:%.*]] = icmp eq i32 [[Y:%.*]], 1
; CHECK-NEXT: br i1 [[T0]], label [[SELECT_TRUE_SINK:%.*]], label [[SELECT_END:%.*]]
; CHECK: select.true.sink:
; CHECK-NEXT: [[REM:%.*]] = srem i32 [[X:%.*]], 2
; CHECK-NEXT: br label [[SELECT_END]]
; CHECK: select.end:
; CHECK-NEXT: [[MUL:%.*]] = phi i32 [ [[REM]], [[SELECT_TRUE_SINK]] ], [ 0, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[TMP0:%.*]] = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 [[T1:%.*]], i32 1)
; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i32, i1 } [[TMP0]], 0
; CHECK-NEXT: [[OV:%.*]] = extractvalue { i32, i1 } [[TMP0]], 1
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[MATH]], [[MUL]]
; CHECK-NEXT: ret i1 [[OV]]
;
entry:
%rem = srem i32 %x, 2
%t0 = icmp eq i32 %y, 1
%mul = select i1 %t0, i32 %rem, i32 0
%neg = add i32 %t1, -1
%add = add i32 %neg, %mul
br label %if
if:
%tobool = icmp eq i32 %t1, 0
ret i1 %tobool
}