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It turns out that the testcase in question uncovered subreg-handling bug.

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Add assert in asmprinter to catch such cases and xfail the tests.
PR is to be filled.

llvm-svn: 86375
This commit is contained in:
Anton Korobeynikov 2009-11-07 15:20:32 +00:00
parent cdefc1c441
commit 30095499fc
3 changed files with 3 additions and 3 deletions
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4
lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
View File

@ -347,9 +347,7 @@ void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
&ARM::DPR_VFP2RegClass);
O << getRegisterName(DReg) << '[' << (RegNum & 1) << ']';
} else {
if (unsigned SubReg = MO.getSubReg())
Reg = TRI->getSubReg(Reg, SubReg);
assert(!MO.getSubReg() && "Subregs should be eliminated!");
O << getRegisterName(Reg);
}
break;

1
lib/Target/ARM/AsmPrinter/ARMMCInstLower.cpp
View File

@ -137,6 +137,7 @@ void ARMMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
case MachineOperand::MO_Register:
// Ignore all implicit register operands.
if (MO.isImplicit()) continue;
assert(!MO.getSubReg() && "Subregs should be eliminated!");
MCOp = MCOperand::CreateReg(MO.getReg());
break;
case MachineOperand::MO_Immediate:

1
test/CodeGen/ARM/2009-11-07-SubRegAsmPrinting.ll
View File

@ -1,4 +1,5 @@
; RUN: llc -mcpu=cortex-a8 < %s | FileCheck %s
; XFAIL: *
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "armv7-eabi"