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[WebAssembly] Prototype i8x16 to i32x4 widening instructions

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As proposed in https://github.com/WebAssembly/simd/pull/395 and matching the
opcodes used in V8:
https://chromium-review.googlesource.com/c/v8/v8/+/2617385/4/src/wasm/wasm-opcodes.h

Differential Revision: https://reviews.llvm.org/D95557
This commit is contained in:
Thomas Lively 2021-01-28 10:59:32 -08:00
parent 73c25457d6
commit 30175dd5d9
4 changed files with 54 additions and 1 deletions
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8
include/llvm/IR/IntrinsicsWebAssembly.td
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@ -348,6 +348,14 @@ def int_wasm_promote_low :
Intrinsic<[llvm_v2f64_ty], [llvm_v4f32_ty],
[IntrNoMem, IntrSpeculatable]>;
// TODO: Remove these if possible if they are merged to the spec.
def int_wasm_widen_signed :
Intrinsic<[llvm_v4i32_ty], [llvm_v16i8_ty, llvm_i32_ty],
[IntrNoMem, IntrSpeculatable, ImmArg<ArgIndex<1>>]>;
def int_wasm_widen_unsigned :
Intrinsic<[llvm_v4i32_ty], [llvm_v16i8_ty, llvm_i32_ty],
[IntrNoMem, IntrSpeculatable, ImmArg<ArgIndex<1>>]>;
//===----------------------------------------------------------------------===//
// Thread-local storage intrinsics
//===----------------------------------------------------------------------===//

20
lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
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@ -1256,7 +1256,6 @@ defm "" : SIMDConvert<I32x4, I16x8, int_wasm_extadd_pairwise_signed,
defm "" : SIMDConvert<I32x4, I16x8, int_wasm_extadd_pairwise_unsigned,
"extadd_pairwise_i16x8_u", 0xa6>;
// Prototype f64x2 conversions
defm "" : SIMDConvert<F64x2, I32x4, int_wasm_convert_low_signed,
"convert_low_i32x4_s", 0x53>;
@ -1271,6 +1270,25 @@ defm "" : SIMDConvert<F32x4, F64x2, int_wasm_demote_zero,
defm "" : SIMDConvert<F64x2, F32x4, int_wasm_promote_low,
"promote_low_f32x4", 0x69>;
// Prototype i8x16 to i32x4 widening
defm WIDEN_I8x16_TO_I32x4_S :
SIMD_I<(outs V128:$dst), (ins V128:$vec, vec_i8imm_op:$idx),
(outs), (ins vec_i8imm_op:$idx),
[(set (I32x4.vt V128:$dst),
(I32x4.vt (int_wasm_widen_signed
(I8x16.vt V128:$vec), (i32 timm:$idx))))],
"i32x4.widen_i8x16_s\t$dst, $vec, $idx",
"i32x4.widen_i8x16_s\t$idx", 0x67>;
defm WIDEN_I8x16_TO_I32x4_U :
SIMD_I<(outs V128:$dst), (ins V128:$vec, vec_i8imm_op:$idx),
(outs), (ins vec_i8imm_op:$idx),
[(set (I32x4.vt V128:$dst),
(I32x4.vt (int_wasm_widen_unsigned
(I8x16.vt V128:$vec), (i32 timm:$idx))))],
"i32x4.widen_i8x16_u\t$dst, $vec, $idx",
"i32x4.widen_i8x16_u\t$idx", 0x68>;
//===----------------------------------------------------------------------===//
// Quasi-Fused Multiply- Add and Subtract (QFMA/QFMS)
//===----------------------------------------------------------------------===//

21
test/CodeGen/WebAssembly/simd-intrinsics.ll
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@ -586,6 +586,27 @@ define <4 x i32> @trunc_sat_zero_unsigned_v4i32(<2 x double> %a) {
ret <4 x i32> %v
}
; CHECK-LABEL: widen_signed_v4i32:
; SIMD128-NEXT: .functype widen_signed_v4i32 (v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.widen_i8x16_s $push[[R:[0-9]+]]=, $0, 1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <4 x i32> @llvm.wasm.widen.signed(<16 x i8>, i32 immarg)
define <4 x i32> @widen_signed_v4i32(<16 x i8> %x) {
%v = call <4 x i32> @llvm.wasm.widen.signed(<16 x i8> %x, i32 1)
ret <4 x i32> %v
}
; CHECK-LABEL: widen_unsigned_v4i32:
; SIMD128-NEXT: .functype widen_unsigned_v4i32 (v128) -> (v128){{$}}
; SIMD128-NEXT: i32x4.widen_i8x16_u $push[[R:[0-9]+]]=, $0, 1{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <4 x i32> @llvm.wasm.widen.unsigned(<16 x i8>, i32 immarg)
define <4 x i32> @widen_unsigned_v4i32(<16 x i8> %x) {
%v = call <4 x i32> @llvm.wasm.widen.unsigned(<16 x i8> %x, i32 1)
ret <4 x i32> %v
}
; ==============================================================================
; 2 x i64
; ==============================================================================

6
test/MC/WebAssembly/simd-encodings.s
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@ -760,4 +760,10 @@ main:
# CHECK: f64x2.promote_low_f32x4 # encoding: [0xfd,0x69]
f64x2.promote_low_f32x4
# CHECK: i32x4.widen_i8x16_s 3 # encoding: [0xfd,0x67,0x03]
i32x4.widen_i8x16_s 3
# CHECK: i32x4.widen_i8x16_u 3 # encoding: [0xfd,0x68,0x03]
i32x4.widen_i8x16_u 3
end_function