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[X86] Add CPU string output to getIntelProcessorTypeAndSubtype/getAMDProcessorTypeAndSubtype in Host.cpp
Rather than converting type/subtype into strings, just directly select the string as part of family/model decoding. This avoids the need for creating fake Type/SubTypes for CPUs not supported by compiler-rtl. I've left the Type/SubType in place where it matches compiler-rt so that the code can be diffed, but the Type/SubType is no longer used by Host.cpp. compiler-rt was already updated to select strings that aren't used so the code will look similar.
This commit is contained in:
Craig Topper
parent
049a760130
commit
308f9cdf77
@ -48,25 +48,6 @@ X86_CPU_TYPE_COMPAT("knm", INTEL_KNM, "knm")
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X86_CPU_TYPE_COMPAT("goldmont", INTEL_GOLDMONT, "goldmont")
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X86_CPU_TYPE_COMPAT("goldmont-plus", INTEL_GOLDMONT_PLUS, "goldmont-plus")
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X86_CPU_TYPE_COMPAT("tremont", INTEL_TREMONT, "tremont")
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// Entries below this are not in libgcc/compiler-rt.
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X86_CPU_TYPE ("i386", INTEL_i386)
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X86_CPU_TYPE ("i486", INTEL_i486)
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X86_CPU_TYPE ("pentium", INTEL_PENTIUM)
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X86_CPU_TYPE ("pentium-mmx", INTEL_PENTIUM_MMX)
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X86_CPU_TYPE ("pentiumpro", INTEL_PENTIUM_PRO)
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X86_CPU_TYPE ("pentium2", INTEL_PENTIUM_II)
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X86_CPU_TYPE ("pentium3", INTEL_PENTIUM_III)
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X86_CPU_TYPE ("pentium4", INTEL_PENTIUM_IV)
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X86_CPU_TYPE ("pentium-m", INTEL_PENTIUM_M)
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X86_CPU_TYPE ("yonah", INTEL_CORE_DUO)
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X86_CPU_TYPE ("nocona", INTEL_NOCONA)
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X86_CPU_TYPE ("prescott", INTEL_PRESCOTT)
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X86_CPU_TYPE ("i486", AMD_i486)
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X86_CPU_TYPE ("pentium", AMDPENTIUM)
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X86_CPU_TYPE ("athlon", AMD_ATHLON)
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X86_CPU_TYPE ("athlon-xp", AMD_ATHLON_XP)
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X86_CPU_TYPE ("k8", AMD_K8)
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X86_CPU_TYPE ("k8-sse3", AMD_K8SSE3)
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// Alternate names supported by __builtin_cpu_is and target multiversioning.
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X86_CPU_TYPE_COMPAT_ALIAS(INTEL_BONNELL, "atom")
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@ -112,13 +93,6 @@ X86_CPU_SUBTYPE_COMPAT("znver2", AMDFAM17H_ZNVER2, "znver2")
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X86_CPU_SUBTYPE_COMPAT("cascadelake", INTEL_COREI7_CASCADELAKE, "cascadelake")
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X86_CPU_SUBTYPE_COMPAT("tigerlake", INTEL_COREI7_TIGERLAKE, "tigerlake")
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X86_CPU_SUBTYPE_COMPAT("cooperlake", INTEL_COREI7_COOPERLAKE, "cooperlake")
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// Entries below this are not in libgcc/compiler-rt.
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X86_CPU_SUBTYPE ("core2", INTEL_CORE2_65)
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X86_CPU_SUBTYPE ("penryn", INTEL_CORE2_45)
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X86_CPU_SUBTYPE ("k6", AMDPENTIUM_K6)
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X86_CPU_SUBTYPE ("k6-2", AMDPENTIUM_K62)
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X86_CPU_SUBTYPE ("k6-3", AMDPENTIUM_K63)
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X86_CPU_SUBTYPE ("geode", AMDPENTIUM_GEODE)
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#undef X86_CPU_SUBTYPE_COMPAT
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#undef X86_CPU_SUBTYPE
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@ -583,7 +583,7 @@ static void detectX86FamilyModel(unsigned EAX, unsigned *Family,
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}
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}
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static void
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static StringRef
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getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
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const unsigned *Features,
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unsigned *Type, unsigned *Subtype) {
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@ -591,31 +591,33 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
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return (Features[F / 32] & (1U << (F % 32))) != 0;
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};
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StringRef CPU;
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switch (Family) {
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case 3:
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*Type = X86::INTEL_i386;
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CPU = "i386";
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break;
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case 4:
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*Type = X86::INTEL_i486;
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CPU = "i486";
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break;
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case 5:
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if (testFeature(X86::FEATURE_MMX)) {
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*Type = X86::INTEL_PENTIUM_MMX;
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CPU = "pentium-mmx";
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break;
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}
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*Type = X86::INTEL_PENTIUM;
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CPU = "pentium";
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break;
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case 6:
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switch (Model) {
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case 0x01: // Pentium Pro processor
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*Type = X86::INTEL_PENTIUM_PRO;
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CPU = "pentiumpro";
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break;
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case 0x03: // Intel Pentium II OverDrive processor, Pentium II processor,
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// model 03
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case 0x05: // Pentium II processor, model 05, Pentium II Xeon processor,
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// model 05, and Intel Celeron processor, model 05
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case 0x06: // Celeron processor, model 06
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*Type = X86::INTEL_PENTIUM_II;
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CPU = "pentium2";
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break;
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case 0x07: // Pentium III processor, model 07, and Pentium III Xeon
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// processor, model 07
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@ -623,19 +625,19 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
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// model 08, and Celeron processor, model 08
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case 0x0a: // Pentium III Xeon processor, model 0Ah
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case 0x0b: // Pentium III processor, model 0Bh
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*Type = X86::INTEL_PENTIUM_III;
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CPU = "pentium3";
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break;
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case 0x09: // Intel Pentium M processor, Intel Celeron M processor model 09.
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case 0x0d: // Intel Pentium M processor, Intel Celeron M processor, model
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// 0Dh. All processors are manufactured using the 90 nm process.
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case 0x15: // Intel EP80579 Integrated Processor and Intel EP80579
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// Integrated Processor with Intel QuickAssist Technology
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*Type = X86::INTEL_PENTIUM_M;
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CPU = "pentium-m";
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break;
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case 0x0e: // Intel Core Duo processor, Intel Core Solo processor, model
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// 0Eh. All processors are manufactured using the 65 nm process.
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*Type = X86::INTEL_CORE_DUO;
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break; // yonah
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CPU = "yonah";
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break;
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case 0x0f: // Intel Core 2 Duo processor, Intel Core 2 Duo mobile
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// processor, Intel Core 2 Quad processor, Intel Core 2 Quad
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// mobile processor, Intel Core 2 Extreme processor, Intel
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@ -643,8 +645,8 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
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// 0Fh. All processors are manufactured using the 65 nm process.
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case 0x16: // Intel Celeron processor model 16h. All processors are
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// manufactured using the 65 nm process
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*Type = X86::INTEL_CORE2; // "core2"
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*Subtype = X86::INTEL_CORE2_65;
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CPU = "core2";
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*Type = X86::INTEL_CORE2;
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break;
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case 0x17: // Intel Core 2 Extreme processor, Intel Xeon processor, model
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// 17h. All processors are manufactured using the 45 nm process.
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@ -652,34 +654,38 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
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// 45nm: Penryn , Wolfdale, Yorkfield (XE)
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case 0x1d: // Intel Xeon processor MP. All processors are manufactured using
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// the 45 nm process.
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*Type = X86::INTEL_CORE2; // "penryn"
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*Subtype = X86::INTEL_CORE2_45;
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CPU = "penryn";
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*Type = X86::INTEL_CORE2;
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break;
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case 0x1a: // Intel Core i7 processor and Intel Xeon processor. All
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// processors are manufactured using the 45 nm process.
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case 0x1e: // Intel(R) Core(TM) i7 CPU 870 @ 2.93GHz.
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// As found in a Summer 2010 model iMac.
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case 0x1f:
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case 0x2e: // Nehalem EX
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*Type = X86::INTEL_COREI7; // "nehalem"
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case 0x2e: // Nehalem EX
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CPU = "nehalem";
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*Type = X86::INTEL_COREI7;
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*Subtype = X86::INTEL_COREI7_NEHALEM;
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break;
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case 0x25: // Intel Core i7, laptop version.
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case 0x2c: // Intel Core i7 processor and Intel Xeon processor. All
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// processors are manufactured using the 32 nm process.
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case 0x2f: // Westmere EX
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*Type = X86::INTEL_COREI7; // "westmere"
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CPU = "westmere";
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*Type = X86::INTEL_COREI7;
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*Subtype = X86::INTEL_COREI7_WESTMERE;
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break;
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case 0x2a: // Intel Core i7 processor. All processors are manufactured
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// using the 32 nm process.
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case 0x2d:
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*Type = X86::INTEL_COREI7; //"sandybridge"
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CPU = "sandybridge";
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*Type = X86::INTEL_COREI7;
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*Subtype = X86::INTEL_COREI7_SANDYBRIDGE;
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break;
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case 0x3a:
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case 0x3e: // Ivy Bridge EP
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*Type = X86::INTEL_COREI7; // "ivybridge"
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case 0x3e: // Ivy Bridge EP
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CPU = "ivybridge";
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*Type = X86::INTEL_COREI7;
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*Subtype = X86::INTEL_COREI7_IVYBRIDGE;
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break;
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@ -688,7 +694,8 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
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case 0x3f:
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case 0x45:
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case 0x46:
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*Type = X86::INTEL_COREI7; // "haswell"
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CPU = "haswell";
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*Type = X86::INTEL_COREI7;
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*Subtype = X86::INTEL_COREI7_HASWELL;
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break;
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@ -697,7 +704,8 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
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case 0x47:
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case 0x4f:
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case 0x56:
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*Type = X86::INTEL_COREI7; // "broadwell"
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CPU = "broadwell";
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*Type = X86::INTEL_COREI7;
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*Subtype = X86::INTEL_COREI7_BROADWELL;
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break;
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@ -708,39 +716,47 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
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case 0x9e: // Kaby Lake desktop
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case 0xa5: // Comet Lake-H/S
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case 0xa6: // Comet Lake-U
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*Type = X86::INTEL_COREI7; // "skylake"
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CPU = "skylake";
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*Type = X86::INTEL_COREI7;
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*Subtype = X86::INTEL_COREI7_SKYLAKE;
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break;
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// Skylake Xeon:
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case 0x55:
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*Type = X86::INTEL_COREI7;
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if (testFeature(X86::FEATURE_AVX512BF16))
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*Subtype = X86::INTEL_COREI7_COOPERLAKE; // "cooperlake"
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else if (testFeature(X86::FEATURE_AVX512VNNI))
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*Subtype = X86::INTEL_COREI7_CASCADELAKE; // "cascadelake"
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else
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*Subtype = X86::INTEL_COREI7_SKYLAKE_AVX512; // "skylake-avx512"
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if (testFeature(X86::FEATURE_AVX512BF16)) {
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CPU = "cooperlake";
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*Subtype = X86::INTEL_COREI7_COOPERLAKE;
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} else if (testFeature(X86::FEATURE_AVX512VNNI)) {
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CPU = "cascadelake";
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*Subtype = X86::INTEL_COREI7_CASCADELAKE;
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} else {
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CPU = "skylake-avx512";
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*Subtype = X86::INTEL_COREI7_SKYLAKE_AVX512;
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}
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break;
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// Cannonlake:
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case 0x66:
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CPU = "cannonlake";
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*Type = X86::INTEL_COREI7;
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*Subtype = X86::INTEL_COREI7_CANNONLAKE; // "cannonlake"
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*Subtype = X86::INTEL_COREI7_CANNONLAKE;
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break;
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// Icelake:
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case 0x7d:
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case 0x7e:
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CPU = "icelake-client";
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*Type = X86::INTEL_COREI7;
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*Subtype = X86::INTEL_COREI7_ICELAKE_CLIENT; // "icelake-client"
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*Subtype = X86::INTEL_COREI7_ICELAKE_CLIENT;
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break;
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// Icelake Xeon:
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case 0x6a:
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case 0x6c:
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CPU = "icelake-server";
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*Type = X86::INTEL_COREI7;
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*Subtype = X86::INTEL_COREI7_ICELAKE_SERVER; // "icelake-server"
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*Subtype = X86::INTEL_COREI7_ICELAKE_SERVER;
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break;
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case 0x1c: // Most 45 nm Intel Atom processors
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@ -748,8 +764,9 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
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case 0x27: // 32 nm Atom Medfield
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case 0x35: // 32 nm Atom Midview
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case 0x36: // 32 nm Atom Midview
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CPU = "bonnell";
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*Type = X86::INTEL_BONNELL;
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break; // "bonnell"
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break;
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// Atom Silvermont codes from the Intel software optimization guide.
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case 0x37:
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@ -758,14 +775,17 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
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case 0x5a:
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case 0x5d:
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case 0x4c: // really airmont
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CPU = "silvermont";
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*Type = X86::INTEL_SILVERMONT;
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break; // "silvermont"
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break;
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// Goldmont:
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case 0x5c: // Apollo Lake
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case 0x5f: // Denverton
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CPU = "goldmont";
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*Type = X86::INTEL_GOLDMONT;
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break; // "goldmont"
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break;
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case 0x7a:
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CPU = "goldmont-plus";
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*Type = X86::INTEL_GOLDMONT_PLUS;
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break;
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case 0x86:
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@ -773,193 +793,140 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
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break;
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case 0x57:
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*Type = X86::INTEL_KNL; // knl
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CPU = "tremont";
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*Type = X86::INTEL_KNL;
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break;
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case 0x85:
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*Type = X86::INTEL_KNM; // knm
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CPU = "knm";
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*Type = X86::INTEL_KNM;
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break;
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default: // Unknown family 6 CPU, try to guess.
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// Don't both with Type/Subtype here, they aren't used by the caller.
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// They're used above to keep the code in sync with compiler-rt.
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// TODO detect tigerlake host from model
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if (testFeature(X86::FEATURE_AVX512VP2INTERSECT)) {
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*Type = X86::INTEL_COREI7;
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*Subtype = X86::INTEL_COREI7_TIGERLAKE;
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break;
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CPU = "tigerlake";
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} else if (testFeature(X86::FEATURE_AVX512VBMI2)) {
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CPU = "icelake-client";
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} else if (testFeature(X86::FEATURE_AVX512VBMI)) {
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CPU = "cannonlake";
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} else if (testFeature(X86::FEATURE_AVX512BF16)) {
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CPU = "cooperlake";
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} else if (testFeature(X86::FEATURE_AVX512VNNI)) {
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CPU = "cascadelake";
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} else if (testFeature(X86::FEATURE_AVX512VL)) {
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CPU = "skylake-avx512";
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} else if (testFeature(X86::FEATURE_AVX512ER)) {
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CPU = "knl";
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} else if (testFeature(X86::FEATURE_CLFLUSHOPT)) {
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if (testFeature(X86::FEATURE_SHA))
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CPU = "goldmont";
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else
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CPU = "skylake";
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} else if (testFeature(X86::FEATURE_ADX)) {
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CPU = "broadwell";
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} else if (testFeature(X86::FEATURE_AVX2)) {
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CPU = "haswell";
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} else if (testFeature(X86::FEATURE_AVX)) {
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CPU = "sandybridge";
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} else if (testFeature(X86::FEATURE_SSE4_2)) {
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if (testFeature(X86::FEATURE_MOVBE))
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CPU = "silvermont";
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else
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CPU = "nehalem";
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} else if (testFeature(X86::FEATURE_SSE4_1)) {
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CPU = "penryn";
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} else if (testFeature(X86::FEATURE_SSSE3)) {
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if (testFeature(X86::FEATURE_MOVBE))
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CPU = "bonnell";
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else
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CPU = "core2";
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} else if (testFeature(X86::FEATURE_64BIT)) {
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CPU = "core2";
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} else if (testFeature(X86::FEATURE_SSE3)) {
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CPU = "yonah";
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} else if (testFeature(X86::FEATURE_SSE2)) {
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CPU = "pentium-m";
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} else if (testFeature(X86::FEATURE_SSE)) {
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CPU = "pentium3";
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} else if (testFeature(X86::FEATURE_MMX)) {
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CPU = "pentium2";
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} else {
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CPU = "pentiumpro";
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}
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if (testFeature(X86::FEATURE_AVX512VBMI2)) {
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*Type = X86::INTEL_COREI7;
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*Subtype = X86::INTEL_COREI7_ICELAKE_CLIENT;
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break;
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}
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if (testFeature(X86::FEATURE_AVX512VBMI)) {
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*Type = X86::INTEL_COREI7;
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*Subtype = X86::INTEL_COREI7_CANNONLAKE;
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break;
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}
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if (testFeature(X86::FEATURE_AVX512BF16)) {
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*Type = X86::INTEL_COREI7;
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*Subtype = X86::INTEL_COREI7_COOPERLAKE;
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break;
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}
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if (testFeature(X86::FEATURE_AVX512VNNI)) {
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*Type = X86::INTEL_COREI7;
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*Subtype = X86::INTEL_COREI7_CASCADELAKE;
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break;
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}
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if (testFeature(X86::FEATURE_AVX512VL)) {
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*Type = X86::INTEL_COREI7;
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*Subtype = X86::INTEL_COREI7_SKYLAKE_AVX512;
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break;
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}
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if (testFeature(X86::FEATURE_AVX512ER)) {
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*Type = X86::INTEL_KNL; // knl
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break;
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}
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if (testFeature(X86::FEATURE_CLFLUSHOPT)) {
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if (testFeature(X86::FEATURE_SHA)) {
|
||||
*Type = X86::INTEL_GOLDMONT;
|
||||
} else {
|
||||
*Type = X86::INTEL_COREI7;
|
||||
*Subtype = X86::INTEL_COREI7_SKYLAKE;
|
||||
}
|
||||
break;
|
||||
}
|
||||
if (testFeature(X86::FEATURE_ADX)) {
|
||||
*Type = X86::INTEL_COREI7;
|
||||
*Subtype = X86::INTEL_COREI7_BROADWELL;
|
||||
break;
|
||||
}
|
||||
if (testFeature(X86::FEATURE_AVX2)) {
|
||||
*Type = X86::INTEL_COREI7;
|
||||
*Subtype = X86::INTEL_COREI7_HASWELL;
|
||||
break;
|
||||
}
|
||||
if (testFeature(X86::FEATURE_AVX)) {
|
||||
*Type = X86::INTEL_COREI7;
|
||||
*Subtype = X86::INTEL_COREI7_SANDYBRIDGE;
|
||||
break;
|
||||
}
|
||||
if (testFeature(X86::FEATURE_SSE4_2)) {
|
||||
if (testFeature(X86::FEATURE_MOVBE)) {
|
||||
*Type = X86::INTEL_SILVERMONT;
|
||||
} else {
|
||||
*Type = X86::INTEL_COREI7;
|
||||
*Subtype = X86::INTEL_COREI7_NEHALEM;
|
||||
}
|
||||
break;
|
||||
}
|
||||
if (testFeature(X86::FEATURE_SSE4_1)) {
|
||||
*Type = X86::INTEL_CORE2; // "penryn"
|
||||
*Subtype = X86::INTEL_CORE2_45;
|
||||
break;
|
||||
}
|
||||
if (testFeature(X86::FEATURE_SSSE3)) {
|
||||
if (testFeature(X86::FEATURE_MOVBE)) {
|
||||
*Type = X86::INTEL_BONNELL; // "bonnell"
|
||||
} else {
|
||||
*Type = X86::INTEL_CORE2; // "core2"
|
||||
*Subtype = X86::INTEL_CORE2_65;
|
||||
}
|
||||
break;
|
||||
}
|
||||
if (testFeature(X86::FEATURE_64BIT)) {
|
||||
*Type = X86::INTEL_CORE2; // "core2"
|
||||
*Subtype = X86::INTEL_CORE2_65;
|
||||
break;
|
||||
}
|
||||
if (testFeature(X86::FEATURE_SSE3)) {
|
||||
*Type = X86::INTEL_CORE_DUO;
|
||||
break;
|
||||
}
|
||||
if (testFeature(X86::FEATURE_SSE2)) {
|
||||
*Type = X86::INTEL_PENTIUM_M;
|
||||
break;
|
||||
}
|
||||
if (testFeature(X86::FEATURE_SSE)) {
|
||||
*Type = X86::INTEL_PENTIUM_III;
|
||||
break;
|
||||
}
|
||||
if (testFeature(X86::FEATURE_MMX)) {
|
||||
*Type = X86::INTEL_PENTIUM_II;
|
||||
break;
|
||||
}
|
||||
*Type = X86::INTEL_PENTIUM_PRO;
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case 15: {
|
||||
if (testFeature(X86::FEATURE_64BIT)) {
|
||||
*Type = X86::INTEL_NOCONA;
|
||||
CPU = "nocona";
|
||||
break;
|
||||
}
|
||||
if (testFeature(X86::FEATURE_SSE3)) {
|
||||
*Type = X86::INTEL_PRESCOTT;
|
||||
CPU = "prescott";
|
||||
break;
|
||||
}
|
||||
*Type = X86::INTEL_PENTIUM_IV;
|
||||
CPU = "pentium4";
|
||||
break;
|
||||
}
|
||||
default:
|
||||
break; /*"generic"*/
|
||||
break; // Unknown.
|
||||
}
|
||||
|
||||
return CPU;
|
||||
}
|
||||
|
||||
static void getAMDProcessorTypeAndSubtype(unsigned Family, unsigned Model,
|
||||
const unsigned *Features,
|
||||
unsigned *Type, unsigned *Subtype) {
|
||||
static StringRef
|
||||
getAMDProcessorTypeAndSubtype(unsigned Family, unsigned Model,
|
||||
const unsigned *Features,
|
||||
unsigned *Type, unsigned *Subtype) {
|
||||
auto testFeature = [&](unsigned F) {
|
||||
return (Features[F / 32] & (1U << (F % 32))) != 0;
|
||||
};
|
||||
|
||||
// FIXME: this poorly matches the generated SubtargetFeatureKV table. There
|
||||
// appears to be no way to generate the wide variety of AMD-specific targets
|
||||
// from the information returned from CPUID.
|
||||
StringRef CPU;
|
||||
|
||||
switch (Family) {
|
||||
case 4:
|
||||
*Type = X86::AMD_i486;
|
||||
CPU = "i486";
|
||||
break;
|
||||
case 5:
|
||||
*Type = X86::AMDPENTIUM;
|
||||
CPU = "pentium";
|
||||
switch (Model) {
|
||||
case 6:
|
||||
case 7:
|
||||
*Subtype = X86::AMDPENTIUM_K6;
|
||||
break; // "k6"
|
||||
CPU = "k6";
|
||||
break;
|
||||
case 8:
|
||||
*Subtype = X86::AMDPENTIUM_K62;
|
||||
break; // "k6-2"
|
||||
CPU = "k6-2";
|
||||
break;
|
||||
case 9:
|
||||
case 13:
|
||||
*Subtype = X86::AMDPENTIUM_K63;
|
||||
break; // "k6-3"
|
||||
CPU = "k6-3";
|
||||
break;
|
||||
case 10:
|
||||
*Subtype = X86::AMDPENTIUM_GEODE;
|
||||
break; // "geode"
|
||||
CPU = "geode";
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case 6:
|
||||
if (testFeature(X86::FEATURE_SSE)) {
|
||||
*Type = X86::AMD_ATHLON_XP;
|
||||
break; // "athlon-xp"
|
||||
CPU = "athlon-xp";
|
||||
break;
|
||||
}
|
||||
*Type = X86::AMD_ATHLON;
|
||||
break; // "athlon"
|
||||
CPU = "athlon";
|
||||
break;
|
||||
case 15:
|
||||
if (testFeature(X86::FEATURE_SSE3)) {
|
||||
*Type = X86::AMD_K8SSE3;
|
||||
break; // "k8-sse3"
|
||||
CPU = "k8-sse3";
|
||||
break;
|
||||
}
|
||||
*Type = X86::AMD_K8;
|
||||
break; // "k8"
|
||||
CPU = "k8";
|
||||
break;
|
||||
case 16:
|
||||
CPU = "amdfam10";
|
||||
*Type = X86::AMDFAM10H; // "amdfam10"
|
||||
switch (Model) {
|
||||
case 2:
|
||||
@ -974,44 +941,54 @@ static void getAMDProcessorTypeAndSubtype(unsigned Family, unsigned Model,
|
||||
}
|
||||
break;
|
||||
case 20:
|
||||
CPU = "btver1";
|
||||
*Type = X86::AMD_BTVER1;
|
||||
break; // "btver1";
|
||||
break;
|
||||
case 21:
|
||||
CPU = "bdver1";
|
||||
*Type = X86::AMDFAM15H;
|
||||
if (Model >= 0x60 && Model <= 0x7f) {
|
||||
CPU = "bdver4";
|
||||
*Subtype = X86::AMDFAM15H_BDVER4;
|
||||
break; // "bdver4"; 60h-7Fh: Excavator
|
||||
break; // 60h-7Fh: Excavator
|
||||
}
|
||||
if (Model >= 0x30 && Model <= 0x3f) {
|
||||
CPU = "bdver3";
|
||||
*Subtype = X86::AMDFAM15H_BDVER3;
|
||||
break; // "bdver3"; 30h-3Fh: Steamroller
|
||||
break; // 30h-3Fh: Steamroller
|
||||
}
|
||||
if ((Model >= 0x10 && Model <= 0x1f) || Model == 0x02) {
|
||||
CPU = "bdver2";
|
||||
*Subtype = X86::AMDFAM15H_BDVER2;
|
||||
break; // "bdver2"; 02h, 10h-1Fh: Piledriver
|
||||
break; // 02h, 10h-1Fh: Piledriver
|
||||
}
|
||||
if (Model <= 0x0f) {
|
||||
*Subtype = X86::AMDFAM15H_BDVER1;
|
||||
break; // "bdver1"; 00h-0Fh: Bulldozer
|
||||
break; // 00h-0Fh: Bulldozer
|
||||
}
|
||||
break;
|
||||
case 22:
|
||||
CPU = "btver2";
|
||||
*Type = X86::AMD_BTVER2;
|
||||
break; // "btver2"
|
||||
break;
|
||||
case 23:
|
||||
CPU = "znver1";
|
||||
*Type = X86::AMDFAM17H;
|
||||
if ((Model >= 0x30 && Model <= 0x3f) || Model == 0x71) {
|
||||
CPU = "znver2";
|
||||
*Subtype = X86::AMDFAM17H_ZNVER2;
|
||||
break; // "znver2"; 30h-3fh, 71h: Zen2
|
||||
break; // 30h-3fh, 71h: Zen2
|
||||
}
|
||||
if (Model <= 0x0f) {
|
||||
*Subtype = X86::AMDFAM17H_ZNVER1;
|
||||
break; // "znver1"; 00h-0Fh: Zen1
|
||||
break; // 00h-0Fh: Zen1
|
||||
}
|
||||
break;
|
||||
default:
|
||||
break; // "generic"
|
||||
break; // Unknown AMD CPU.
|
||||
}
|
||||
|
||||
return CPU;
|
||||
}
|
||||
|
||||
static void getAvailableFeatures(unsigned ECX, unsigned EDX, unsigned MaxLeaf,
|
||||
@ -1161,26 +1138,23 @@ StringRef sys::getHostCPUName() {
|
||||
detectX86FamilyModel(EAX, &Family, &Model);
|
||||
getAvailableFeatures(ECX, EDX, MaxLeaf, Features);
|
||||
|
||||
// These aren't consumed in this file, but we try to keep some source code the
|
||||
// same or similar to compiler-rt.
|
||||
unsigned Type = 0;
|
||||
unsigned Subtype = 0;
|
||||
|
||||
StringRef CPU;
|
||||
|
||||
if (Vendor == SIG_INTEL) {
|
||||
getIntelProcessorTypeAndSubtype(Family, Model, Features, &Type, &Subtype);
|
||||
CPU = getIntelProcessorTypeAndSubtype(Family, Model, Features, &Type,
|
||||
&Subtype);
|
||||
} else if (Vendor == SIG_AMD) {
|
||||
getAMDProcessorTypeAndSubtype(Family, Model, Features, &Type, &Subtype);
|
||||
CPU = getAMDProcessorTypeAndSubtype(Family, Model, Features, &Type,
|
||||
&Subtype);
|
||||
}
|
||||
|
||||
// Check subtypes first since those are more specific.
|
||||
#define X86_CPU_SUBTYPE(ARCHNAME, ENUM) \
|
||||
if (Subtype == X86::ENUM) \
|
||||
return ARCHNAME;
|
||||
#include "llvm/Support/X86TargetParser.def"
|
||||
|
||||
// Now check types.
|
||||
#define X86_CPU_TYPE(ARCHNAME, ENUM) \
|
||||
if (Type == X86::ENUM) \
|
||||
return ARCHNAME;
|
||||
#include "llvm/Support/X86TargetParser.def"
|
||||
if (!CPU.empty())
|
||||
return CPU;
|
||||
|
||||
return "generic";
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user