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If there are multiple register classes that a register belongs to, return the super-class (e.g. on x86, returns GR32, not GR32_).
llvm-svn: 48220
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6a30fc4e94
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@ -33,6 +33,17 @@ TargetRegisterInfo::TargetRegisterInfo(const TargetRegisterDesc *D, unsigned NR,
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TargetRegisterInfo::~TargetRegisterInfo() {}
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namespace {
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// Sort according to super- / sub- class relations.
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// i.e. super- register class < sub- register class.
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struct RCCompare {
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bool operator()(const TargetRegisterClass* const &LHS,
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const TargetRegisterClass* const &RHS) {
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return RHS->hasSuperClass(LHS);
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}
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};
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}
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/// getPhysicalRegisterRegClass - Returns the Register Class of a physical
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/// register of the given type. If type is MVT::Other, then just return any
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/// register class the register belongs to.
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@ -40,11 +51,23 @@ const TargetRegisterClass *
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TargetRegisterInfo::getPhysicalRegisterRegClass(unsigned reg,
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MVT::ValueType VT) const {
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assert(isPhysicalRegister(reg) && "reg must be a physical register");
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// Pick the register class of the right type that contains this physreg.
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for (regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I)
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if ((VT == MVT::Other || (*I)->hasType(VT))
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&& (*I)->contains(reg))
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return *I;
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SmallVector<const TargetRegisterClass*, 4> RCs;
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for (regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I) {
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if ((VT == MVT::Other || (*I)->hasType(VT)) && (*I)->contains(reg))
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RCs.push_back(*I);
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}
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if (RCs.size() == 1)
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return RCs[0];
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if (RCs.size()) {
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// Multiple compatible register classes. Get the super- class.
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std::stable_sort(RCs.begin(), RCs.end(), RCCompare());
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return RCs[0];
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}
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assert(false && "Couldn't find the register class");
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return 0;
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}
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