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[PowerPC] Add the missing InstrAliasing for 64-bit rotate instructions

We have the InstAlias rules for 32-bit rotate but missing the 64-bit one.
Rotate left immediate rotlwi ra,rs,n rlwinm ra,rs,n,0,31
Rotate left rotlw ra,rs,rb rlwnm ra,rs,rb,0,31

Differential Revision: https://reviews.llvm.org/D72676
This commit is contained in:
QingShan Zhang 2020-02-17 05:42:49 +00:00
parent b05eadcb6d
commit 31dbc630ba
2 changed files with 5 additions and 1 deletions

View File

@ -909,6 +909,10 @@ def ISEL8 : AForm_4<31, 15,
} // hasSideEffects = 0
} // End FXU Operations.
def : InstAlias<"rotlwi $rA, $rS, $n", (RLWINM8 g8rc:$rA, g8rc:$rS, u5imm:$n, 0, 31)>;
def : InstAlias<"rotlwi. $rA, $rS, $n", (RLWINM8_rec g8rc:$rA, g8rc:$rS, u5imm:$n, 0, 31)>;
def : InstAlias<"rotlw $rA, $rS, $rB", (RLWNM8 g8rc:$rA, g8rc:$rS, g8rc:$rB, 0, 31)>;
def : InstAlias<"rotlw. $rA, $rS, $rB", (RLWNM8_rec g8rc:$rA, g8rc:$rS, g8rc:$rB, 0, 31)>;
//===----------------------------------------------------------------------===//
// Load/Store instructions.

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@ -9,7 +9,7 @@ entry:
ret i32 %0
; CHECK-LABEL: @bs4
; CHECK: rlwinm [[REG1:[0-9]+]], 3, 8, 0, 31
; CHECK: rotlwi [[REG1:[0-9]+]], 3, 8
; CHECK: rlwimi [[REG1]], 3, 24, 16, 23
; CHECK: rlwimi [[REG1]], 3, 24, 0, 7
; CHECK: mr 3, [[REG1]]