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Revert "[IR] Clean up dead instructions after simplifying a conditional branch"
This reverts commit 69bdfb075b293c4b3363f2dc0ac732ca03c3c9ca. Reverting to investigate https://bugs.llvm.org/show_bug.cgi?id=46343
This commit is contained in:
parent
1f28eba554
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32716ad2d8
@ -22,7 +22,6 @@
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#include "llvm/IR/Instruction.h"
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#include "llvm/IR/SymbolTableListTraits.h"
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#include "llvm/IR/Value.h"
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#include "llvm/IR/ValueHandle.h"
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#include "llvm/Support/CBindingWrapping.h"
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#include "llvm/Support/Casting.h"
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#include "llvm/Support/Compiler.h"
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@ -377,13 +376,7 @@ public:
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/// If \p KeepOneInputPHIs is true then don't remove PHIs that are left with
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/// zero or one incoming values, and don't simplify PHIs with all incoming
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/// values the same.
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///
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/// If \p MaybeDeadInstrs is not nullptr then whenever we drop a reference to
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/// an instruction, append it to the vector. The caller should check whether
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/// these instructions are now trivially dead, and if so delete them.
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void
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removePredecessor(BasicBlock *Pred, bool KeepOneInputPHIs = false,
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SmallVectorImpl<WeakTrackingVH> *MaybeDeadInstrs = nullptr);
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void removePredecessor(BasicBlock *Pred, bool KeepOneInputPHIs = false);
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bool canSplitPredecessors() const;
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@ -323,13 +323,8 @@ iterator_range<BasicBlock::phi_iterator> BasicBlock::phis() {
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/// If \p KeepOneInputPHIs is true then don't remove PHIs that are left with
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/// zero or one incoming values, and don't simplify PHIs with all incoming
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/// values the same.
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///
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/// If \p MaybeDeadInstrs is not nullptr then whenever we drop a reference to
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/// an instruction, append it to the vector. The caller should check whether
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/// these instructions are now trivially dead, and if so delete them.
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void BasicBlock::removePredecessor(
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BasicBlock *Pred, bool KeepOneInputPHIs,
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SmallVectorImpl<WeakTrackingVH> *MaybeDeadInstrs) {
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void BasicBlock::removePredecessor(BasicBlock *Pred,
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bool KeepOneInputPHIs) {
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// Use hasNUsesOrMore to bound the cost of this assertion for complex CFGs.
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assert((hasNUsesOrMore(16) ||
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find(pred_begin(this), pred_end(this), Pred) != pred_end(this)) &&
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@ -343,11 +338,7 @@ void BasicBlock::removePredecessor(
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// Update all PHI nodes.
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for (iterator II = begin(); isa<PHINode>(II);) {
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PHINode *PN = cast<PHINode>(II++);
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Value *V = PN->removeIncomingValue(Pred, !KeepOneInputPHIs);
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if (MaybeDeadInstrs) {
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if (auto *I = dyn_cast<Instruction>(V))
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MaybeDeadInstrs->push_back(I);
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}
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PN->removeIncomingValue(Pred, !KeepOneInputPHIs);
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if (!KeepOneInputPHIs) {
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// If we have a single predecessor, removeIncomingValue erased the PHI
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// node itself.
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@ -126,11 +126,8 @@ bool llvm::ConstantFoldTerminator(BasicBlock *BB, bool DeleteDeadConditions,
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BasicBlock *OldDest = Cond->getZExtValue() ? Dest2 : Dest1;
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// Let the basic block know that we are letting go of it. Based on this,
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// it will adjust its PHI nodes.
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SmallVector<WeakTrackingVH, 8> MaybeDeadInstrs;
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OldDest->removePredecessor(BB, false, &MaybeDeadInstrs);
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RecursivelyDeleteTriviallyDeadInstructionsPermissive(MaybeDeadInstrs,
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TLI);
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// it will adjust it's PHI nodes.
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OldDest->removePredecessor(BB);
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// Replace the conditional branch with an unconditional one.
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Builder.CreateBr(Destination);
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@ -473,8 +470,8 @@ bool llvm::RecursivelyDeleteTriviallyDeadInstructionsPermissive(
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MemorySSAUpdater *MSSAU) {
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unsigned S = 0, E = DeadInsts.size(), Alive = 0;
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for (; S != E; ++S) {
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auto *I = dyn_cast<Instruction>(DeadInsts[S]);
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if (!I || !isInstructionTriviallyDead(I)) {
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auto *I = cast<Instruction>(DeadInsts[S]);
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if (!isInstructionTriviallyDead(I)) {
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DeadInsts[S] = nullptr;
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++Alive;
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}
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@ -448,33 +448,34 @@ define i32 @test_chr_5(i32* %i, i32 %sum0) !prof !14 {
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; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[I:%.*]], align 4
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; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 15
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 15
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; CHECK-NEXT: br i1 [[TMP2]], label [[BB1:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
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; CHECK: bb1:
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; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[SUM0:%.*]], 173
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; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
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; CHECK: bb0:
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; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[SUM0:%.*]], 85
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; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[SUM0]], 173
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; CHECK-NEXT: br label [[BB3:%.*]]
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; CHECK: entry.split.nonchr:
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; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[TMP0]], 255
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; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 0
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; CHECK-NEXT: br i1 [[TMP5]], label [[BB3]], label [[BB0_NONCHR:%.*]], !prof !16
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; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[TMP0]], 255
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; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i32 [[TMP5]], 0
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; CHECK-NEXT: br i1 [[TMP6]], label [[BB3]], label [[BB0_NONCHR:%.*]], !prof !16
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; CHECK: bb0.nonchr:
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; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[TMP0]], 1
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; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP6]], 0
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; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[SUM0]], 42
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; CHECK-NEXT: [[SUM1_NONCHR:%.*]] = select i1 [[TMP7]], i32 [[SUM0]], i32 [[TMP8]], !prof !16
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; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[TMP0]], 2
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; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP9]], 0
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; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[SUM1_NONCHR]], 43
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; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[TMP10]], i32 [[SUM1_NONCHR]], i32 [[TMP11]], !prof !16
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; CHECK-NEXT: [[TMP12:%.*]] = and i32 [[TMP0]], 4
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; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i32 [[TMP12]], 0
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; CHECK-NEXT: [[TMP14:%.*]] = and i32 [[TMP0]], 8
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; CHECK-NEXT: [[TMP15:%.*]] = icmp eq i32 [[TMP14]], 0
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; CHECK-NEXT: [[SUM4_NONCHR_V:%.*]] = select i1 [[TMP15]], i32 44, i32 88
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; CHECK-NEXT: [[TMP7:%.*]] = and i32 [[TMP0]], 1
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; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 0
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; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[SUM0]], 42
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; CHECK-NEXT: [[SUM1_NONCHR:%.*]] = select i1 [[TMP8]], i32 [[SUM0]], i32 [[TMP9]], !prof !16
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; CHECK-NEXT: [[TMP10:%.*]] = and i32 [[TMP0]], 2
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; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i32 [[TMP10]], 0
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; CHECK-NEXT: [[TMP12:%.*]] = add i32 [[SUM1_NONCHR]], 43
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; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[TMP11]], i32 [[SUM1_NONCHR]], i32 [[TMP12]], !prof !16
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; CHECK-NEXT: [[TMP13:%.*]] = and i32 [[TMP0]], 4
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; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i32 [[TMP13]], 0
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; CHECK-NEXT: [[TMP15:%.*]] = and i32 [[TMP0]], 8
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; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i32 [[TMP15]], 0
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; CHECK-NEXT: [[SUM4_NONCHR_V:%.*]] = select i1 [[TMP16]], i32 44, i32 88
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; CHECK-NEXT: [[SUM4_NONCHR:%.*]] = add i32 [[SUM2_NONCHR]], [[SUM4_NONCHR_V]]
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; CHECK-NEXT: [[SUM5_NONCHR:%.*]] = select i1 [[TMP13]], i32 [[SUM2_NONCHR]], i32 [[SUM4_NONCHR]], !prof !16
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; CHECK-NEXT: [[SUM5_NONCHR:%.*]] = select i1 [[TMP14]], i32 [[SUM2_NONCHR]], i32 [[SUM4_NONCHR]], !prof !16
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; CHECK-NEXT: br label [[BB3]]
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; CHECK: bb3:
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; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[TMP3]], [[BB1]] ], [ [[SUM0]], [[ENTRY_SPLIT_NONCHR]] ], [ [[SUM5_NONCHR]], [[BB0_NONCHR]] ]
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; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[TMP4]], [[BB0]] ], [ [[SUM0]], [[ENTRY_SPLIT_NONCHR]] ], [ [[SUM5_NONCHR]], [[BB0_NONCHR]] ]
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; CHECK-NEXT: ret i32 [[SUM6]]
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;
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entry:
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@ -547,33 +548,34 @@ define i32 @test_chr_5_1(i32* %i, i32 %sum0) !prof !14 {
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; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP0]], 11
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; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP3]], 11
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; CHECK-NEXT: [[TMP5:%.*]] = and i1 [[TMP4]], [[TMP2]]
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; CHECK-NEXT: br i1 [[TMP5]], label [[BB1:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
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; CHECK: bb1:
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; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[SUM0]], 173
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; CHECK-NEXT: br i1 [[TMP5]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
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; CHECK: bb0:
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; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[SUM0]], 85
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; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[SUM0]], 173
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; CHECK-NEXT: br label [[BB3:%.*]]
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; CHECK: entry.split.nonchr:
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; CHECK-NEXT: [[TMP7:%.*]] = and i32 [[TMP0]], 255
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; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 0
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; CHECK-NEXT: br i1 [[TMP8]], label [[BB3]], label [[BB0_NONCHR:%.*]], !prof !16
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; CHECK-NEXT: [[TMP8:%.*]] = and i32 [[TMP0]], 255
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; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], 0
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; CHECK-NEXT: br i1 [[TMP9]], label [[BB3]], label [[BB0_NONCHR:%.*]], !prof !16
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; CHECK: bb0.nonchr:
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; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[TMP0]], 1
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; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP9]], 0
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; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[SUM0]], 42
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; CHECK-NEXT: [[SUM1_NONCHR:%.*]] = select i1 [[TMP10]], i32 [[SUM0]], i32 [[TMP11]], !prof !16
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; CHECK-NEXT: [[TMP12:%.*]] = and i32 [[TMP0]], 2
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; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i32 [[TMP12]], 0
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; CHECK-NEXT: [[TMP14:%.*]] = add i32 [[SUM1_NONCHR]], 43
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; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[TMP13]], i32 [[SUM1_NONCHR]], i32 [[TMP14]], !prof !16
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; CHECK-NEXT: [[TMP15:%.*]] = and i32 [[SUM0]], 4
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; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i32 [[TMP15]], 0
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; CHECK-NEXT: [[TMP17:%.*]] = and i32 [[TMP0]], 8
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; CHECK-NEXT: [[TMP18:%.*]] = icmp eq i32 [[TMP17]], 0
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; CHECK-NEXT: [[SUM4_NONCHR_V:%.*]] = select i1 [[TMP18]], i32 44, i32 88
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; CHECK-NEXT: [[TMP10:%.*]] = and i32 [[TMP0]], 1
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; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i32 [[TMP10]], 0
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; CHECK-NEXT: [[TMP12:%.*]] = add i32 [[SUM0]], 42
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; CHECK-NEXT: [[SUM1_NONCHR:%.*]] = select i1 [[TMP11]], i32 [[SUM0]], i32 [[TMP12]], !prof !16
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; CHECK-NEXT: [[TMP13:%.*]] = and i32 [[TMP0]], 2
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; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i32 [[TMP13]], 0
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; CHECK-NEXT: [[TMP15:%.*]] = add i32 [[SUM1_NONCHR]], 43
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; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[TMP14]], i32 [[SUM1_NONCHR]], i32 [[TMP15]], !prof !16
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; CHECK-NEXT: [[TMP16:%.*]] = and i32 [[SUM0]], 4
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; CHECK-NEXT: [[TMP17:%.*]] = icmp eq i32 [[TMP16]], 0
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; CHECK-NEXT: [[TMP18:%.*]] = and i32 [[TMP0]], 8
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; CHECK-NEXT: [[TMP19:%.*]] = icmp eq i32 [[TMP18]], 0
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; CHECK-NEXT: [[SUM4_NONCHR_V:%.*]] = select i1 [[TMP19]], i32 44, i32 88
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; CHECK-NEXT: [[SUM4_NONCHR:%.*]] = add i32 [[SUM2_NONCHR]], [[SUM4_NONCHR_V]]
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; CHECK-NEXT: [[SUM5_NONCHR:%.*]] = select i1 [[TMP16]], i32 [[SUM2_NONCHR]], i32 [[SUM4_NONCHR]], !prof !16
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; CHECK-NEXT: [[SUM5_NONCHR:%.*]] = select i1 [[TMP17]], i32 [[SUM2_NONCHR]], i32 [[SUM4_NONCHR]], !prof !16
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; CHECK-NEXT: br label [[BB3]]
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; CHECK: bb3:
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; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[TMP6]], [[BB1]] ], [ [[SUM0]], [[ENTRY_SPLIT_NONCHR]] ], [ [[SUM5_NONCHR]], [[BB0_NONCHR]] ]
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; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[TMP7]], [[BB0]] ], [ [[SUM0]], [[ENTRY_SPLIT_NONCHR]] ], [ [[SUM5_NONCHR]], [[BB0_NONCHR]] ]
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; CHECK-NEXT: ret i32 [[SUM6]]
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;
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entry:
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@ -647,9 +649,10 @@ define i32 @test_chr_6(i32* %i, i32* %j, i32 %sum0) !prof !14 {
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; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[I0]], 10
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; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 10
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; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[V10]]
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; CHECK-NEXT: br i1 [[TMP2]], label [[BB1:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
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; CHECK: bb1:
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; CHECK-NEXT: [[V13:%.*]] = add i32 [[SUM0:%.*]], 131
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; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
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; CHECK: bb0:
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; CHECK-NEXT: [[V8:%.*]] = add i32 [[SUM0:%.*]], 43
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; CHECK-NEXT: [[V13:%.*]] = add i32 [[SUM0]], 131
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; CHECK-NEXT: br label [[BB3:%.*]]
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; CHECK: entry.split.nonchr:
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; CHECK-NEXT: [[V1:%.*]] = and i32 [[I0]], 255
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@ -669,7 +672,7 @@ define i32 @test_chr_6(i32* %i, i32* %j, i32 %sum0) !prof !14 {
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; CHECK-NEXT: [[SUM5_NONCHR:%.*]] = select i1 [[V10_NONCHR]], i32 [[SUM2_NONCHR]], i32 [[SUM4_NONCHR]], !prof !16
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; CHECK-NEXT: br label [[BB3]]
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; CHECK: bb3:
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; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[V13]], [[BB1]] ], [ [[SUM0]], [[ENTRY_SPLIT_NONCHR]] ], [ [[SUM5_NONCHR]], [[BB0_NONCHR]] ]
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; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[V13]], [[BB0]] ], [ [[SUM0]], [[ENTRY_SPLIT_NONCHR]] ], [ [[SUM5_NONCHR]], [[BB0_NONCHR]] ]
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; CHECK-NEXT: ret i32 [[SUM6]]
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;
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entry:
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@ -1734,27 +1737,28 @@ define i32 @test_chr_19(i32* %i, i32 %sum0) !prof !14 {
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; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[I:%.*]], align 4
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; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 9
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 9
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; CHECK-NEXT: br i1 [[TMP2]], label [[BB1:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
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; CHECK: bb1:
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; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[SUM0:%.*]], 173
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; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
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; CHECK: bb0:
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; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[SUM0:%.*]], 85
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; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[SUM0]], 173
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; CHECK-NEXT: br label [[BB3:%.*]]
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; CHECK: entry.split.nonchr:
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; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[TMP0]], 255
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; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 0
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; CHECK-NEXT: br i1 [[TMP5]], label [[BB3]], label [[BB0_NONCHR:%.*]], !prof !16
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; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[TMP0]], 255
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; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i32 [[TMP5]], 0
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; CHECK-NEXT: br i1 [[TMP6]], label [[BB3]], label [[BB0_NONCHR:%.*]], !prof !16
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; CHECK: bb0.nonchr:
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; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[TMP0]], 1
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; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP6]], 0
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; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[SUM0]], 85
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; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[TMP7]], i32 [[SUM0]], i32 [[TMP8]], !prof !16
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; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[TMP0]], 8
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; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP9]], 0
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; CHECK-NEXT: [[SUM4_NONCHR_V:%.*]] = select i1 [[TMP10]], i32 44, i32 88
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; CHECK-NEXT: [[TMP7:%.*]] = and i32 [[TMP0]], 1
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; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 0
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; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[SUM0]], 85
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; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[TMP8]], i32 [[SUM0]], i32 [[TMP9]], !prof !16
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; CHECK-NEXT: [[TMP10:%.*]] = and i32 [[TMP0]], 8
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; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i32 [[TMP10]], 0
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; CHECK-NEXT: [[SUM4_NONCHR_V:%.*]] = select i1 [[TMP11]], i32 44, i32 88
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; CHECK-NEXT: [[SUM4_NONCHR:%.*]] = add i32 [[SUM2_NONCHR]], [[SUM4_NONCHR_V]]
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; CHECK-NEXT: [[SUM5_NONCHR:%.*]] = select i1 [[TMP7]], i32 [[SUM2_NONCHR]], i32 [[SUM4_NONCHR]], !prof !16
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; CHECK-NEXT: [[SUM5_NONCHR:%.*]] = select i1 [[TMP8]], i32 [[SUM2_NONCHR]], i32 [[SUM4_NONCHR]], !prof !16
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; CHECK-NEXT: br label [[BB3]]
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; CHECK: bb3:
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; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[TMP3]], [[BB1]] ], [ [[SUM0]], [[ENTRY_SPLIT_NONCHR]] ], [ [[SUM5_NONCHR]], [[BB0_NONCHR]] ]
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; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[TMP4]], [[BB0]] ], [ [[SUM0]], [[ENTRY_SPLIT_NONCHR]] ], [ [[SUM5_NONCHR]], [[BB0_NONCHR]] ]
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; CHECK-NEXT: ret i32 [[SUM6]]
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;
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entry:
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