diff --git a/test/Transforms/InstCombine/X86/x86-sse.ll b/test/Transforms/InstCombine/X86/x86-sse.ll index d58b083df2b..d7eb0dfe716 100644 --- a/test/Transforms/InstCombine/X86/x86-sse.ll +++ b/test/Transforms/InstCombine/X86/x86-sse.ll @@ -119,6 +119,17 @@ define float @test_add_ss_1(float %a, float %b) { ret float %7 } +define float @test_add_ss_2(float %a) { +; CHECK-LABEL: @test_add_ss_2( +; CHECK-NEXT: [[TMP1:%.*]] = fadd float [[A:%.*]], [[A]] +; CHECK-NEXT: ret float [[TMP1]] +; + %1 = insertelement <4 x float> zeroinitializer, float %a, i32 0 + %2 = tail call <4 x float> @llvm.x86.sse.add.ss(<4 x float> %1, <4 x float> %1) + %3 = extractelement <4 x float> %2, i32 0 + ret float %3 +} + define float @test_sub_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_sub_ss_0( ; CHECK-NEXT: [[TMP1:%.*]] = fsub float [[A:%.*]], [[B:%.*]] @@ -151,6 +162,17 @@ define float @test_sub_ss_2(float %a, float %b) { ret float %7 } +define float @test_sub_ss_3(float %a) { +; CHECK-LABEL: @test_sub_ss_3( +; CHECK-NEXT: [[TMP1:%.*]] = fsub float [[A:%.*]], [[A]] +; CHECK-NEXT: ret float [[TMP1]] +; + %1 = insertelement <4 x float> zeroinitializer, float %a, i32 0 + %2 = tail call <4 x float> @llvm.x86.sse.sub.ss(<4 x float> %1, <4 x float> %1) + %3 = extractelement <4 x float> %2, i32 0 + ret float %3 +} + define float @test_mul_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_mul_ss_0( ; CHECK-NEXT: [[TMP1:%.*]] = fmul float [[A:%.*]], [[B:%.*]] @@ -183,6 +205,17 @@ define float @test_mul_ss_3(float %a, float %b) { ret float %7 } +define float @test_mul_ss_4(float %a) { +; CHECK-LABEL: @test_mul_ss_4( +; CHECK-NEXT: [[TMP1:%.*]] = fmul float [[A:%.*]], [[A]] +; CHECK-NEXT: ret float [[TMP1]] +; + %1 = insertelement <4 x float> zeroinitializer, float %a, i32 0 + %2 = tail call <4 x float> @llvm.x86.sse.mul.ss(<4 x float> %1, <4 x float> %1) + %3 = extractelement <4 x float> %2, i32 0 + ret float %3 +} + define float @test_div_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_div_ss_0( ; CHECK-NEXT: [[TMP1:%.*]] = fdiv float [[A:%.*]], [[B:%.*]] @@ -215,6 +248,17 @@ define float @test_div_ss_1(float %a, float %b) { ret float %7 } +define float @test_div_ss_2(float %a) { +; CHECK-LABEL: @test_div_ss_2( +; CHECK-NEXT: [[TMP1:%.*]] = fdiv float [[A:%.*]], [[A]] +; CHECK-NEXT: ret float [[TMP1]] +; + %1 = insertelement <4 x float> zeroinitializer, float %a, i32 0 + %2 = tail call <4 x float> @llvm.x86.sse.div.ss(<4 x float> %1, <4 x float> %1) + %3 = extractelement <4 x float> %2, i32 0 + ret float %3 +} + define <4 x float> @test_min_ss(<4 x float> %a, <4 x float> %b) { ; CHECK-LABEL: @test_min_ss( ; CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.x86.sse.min.ss(<4 x float> [[A:%.*]], <4 x float> [[B:%.*]]) @@ -262,6 +306,19 @@ define float @test_min_ss_2(float %a, float %b) { ret float %7 } +define float @test_min_ss_3(float %a) { +; CHECK-LABEL: @test_min_ss_3( +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> , float [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse.min.ss(<4 x float> [[TMP1]], <4 x float> [[TMP1]]) +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 0 +; CHECK-NEXT: ret float [[TMP3]] +; + %1 = insertelement <4 x float> zeroinitializer, float %a, i32 0 + %2 = tail call <4 x float> @llvm.x86.sse.min.ss(<4 x float> %1, <4 x float> %1) + %3 = extractelement <4 x float> %2, i32 0 + ret float %3 +} + define <4 x float> @test_max_ss(<4 x float> %a, <4 x float> %b) { ; CHECK-LABEL: @test_max_ss( ; CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.x86.sse.max.ss(<4 x float> [[A:%.*]], <4 x float> [[B:%.*]]) @@ -309,6 +366,19 @@ define float @test_max_ss_3(float %a, float %b) { ret float %7 } +define float @test_max_ss_4(float %a) { +; CHECK-LABEL: @test_max_ss_4( +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> , float [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse.max.ss(<4 x float> [[TMP1]], <4 x float> [[TMP1]]) +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 0 +; CHECK-NEXT: ret float [[TMP3]] +; + %1 = insertelement <4 x float> zeroinitializer, float %a, i32 0 + %2 = tail call <4 x float> @llvm.x86.sse.max.ss(<4 x float> %1, <4 x float> %1) + %3 = extractelement <4 x float> %2, i32 0 + ret float %3 +} + define <4 x float> @test_cmp_ss(<4 x float> %a, <4 x float> %b) { ; CHECK-LABEL: @test_cmp_ss( ; CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.x86.sse.cmp.ss(<4 x float> [[A:%.*]], <4 x float> [[B:%.*]], i8 0) @@ -356,6 +426,19 @@ define float @test_cmp_ss_1(float %a, float %b) { ret float %7 } +define float @test_cmp_ss_2(float %a) { +; CHECK-LABEL: @test_cmp_ss_2( +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> , float [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse.cmp.ss(<4 x float> [[TMP1]], <4 x float> [[TMP1]], i8 3) +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 0 +; CHECK-NEXT: ret float [[TMP3]] +; + %1 = insertelement <4 x float> zeroinitializer, float %a, i32 0 + %2 = tail call <4 x float> @llvm.x86.sse.cmp.ss(<4 x float> %1, <4 x float> %1, i8 3) + %3 = extractelement <4 x float> %2, i32 0 + ret float %3 +} + define i32 @test_comieq_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_comieq_ss_0( ; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[A:%.*]], i32 0 diff --git a/test/Transforms/InstCombine/X86/x86-sse2.ll b/test/Transforms/InstCombine/X86/x86-sse2.ll index 698c04ccf60..dee3da0b0e1 100644 --- a/test/Transforms/InstCombine/X86/x86-sse2.ll +++ b/test/Transforms/InstCombine/X86/x86-sse2.ll @@ -52,6 +52,17 @@ define double @test_add_sd_1(double %a, double %b) { ret double %6 } +define double @test_add_sd_2(double %a) { +; CHECK-LABEL: @test_add_sd_2( +; CHECK-NEXT: [[TMP1:%.*]] = fadd double [[A:%.*]], [[A]] +; CHECK-NEXT: ret double [[TMP1]] +; + %1 = insertelement <2 x double> zeroinitializer, double %a, i32 0 + %2 = tail call <2 x double> @llvm.x86.sse2.add.sd(<2 x double> %1, <2 x double> %1) + %3 = extractelement <2 x double> %2, i32 0 + ret double %3 +} + define double @test_sub_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_sub_sd_0( ; CHECK-NEXT: [[TMP1:%.*]] = fsub double [[A:%.*]], [[B:%.*]] @@ -79,6 +90,17 @@ define double @test_sub_sd_1(double %a, double %b) { ret double %6 } +define double @test_sub_sd_2(double %a) { +; CHECK-LABEL: @test_sub_sd_2( +; CHECK-NEXT: [[TMP1:%.*]] = fsub double [[A:%.*]], [[A]] +; CHECK-NEXT: ret double [[TMP1]] +; + %1 = insertelement <2 x double> zeroinitializer, double %a, i32 0 + %2 = tail call <2 x double> @llvm.x86.sse2.sub.sd(<2 x double> %1, <2 x double> %1) + %3 = extractelement <2 x double> %2, i32 0 + ret double %3 +} + define double @test_mul_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_mul_sd_0( ; CHECK-NEXT: [[TMP1:%.*]] = fmul double [[A:%.*]], [[B:%.*]] @@ -106,6 +128,17 @@ define double @test_mul_sd_1(double %a, double %b) { ret double %6 } +define double @test_mul_sd_2(double %a) { +; CHECK-LABEL: @test_mul_sd_2( +; CHECK-NEXT: [[TMP1:%.*]] = fmul double [[A:%.*]], [[A]] +; CHECK-NEXT: ret double [[TMP1]] +; + %1 = insertelement <2 x double> zeroinitializer, double %a, i32 0 + %2 = tail call <2 x double> @llvm.x86.sse2.mul.sd(<2 x double> %1, <2 x double> %1) + %3 = extractelement <2 x double> %2, i32 0 + ret double %3 +} + define double @test_div_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_div_sd_0( ; CHECK-NEXT: [[TMP1:%.*]] = fdiv double [[A:%.*]], [[B:%.*]] @@ -133,6 +166,17 @@ define double @test_div_sd_1(double %a, double %b) { ret double %6 } +define double @test_div_sd_2(double %a) { +; CHECK-LABEL: @test_div_sd_2( +; CHECK-NEXT: [[TMP1:%.*]] = fdiv double [[A:%.*]], [[A]] +; CHECK-NEXT: ret double [[TMP1]] +; + %1 = insertelement <2 x double> zeroinitializer, double %a, i32 0 + %2 = tail call <2 x double> @llvm.x86.sse2.div.sd(<2 x double> %1, <2 x double> %1) + %3 = extractelement <2 x double> %2, i32 0 + ret double %3 +} + define <2 x double> @test_min_sd(<2 x double> %a, <2 x double> %b) { ; CHECK-LABEL: @test_min_sd( ; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.x86.sse2.min.sd(<2 x double> [[A:%.*]], <2 x double> [[B:%.*]]) @@ -173,6 +217,19 @@ define double @test_min_sd_1(double %a, double %b) { ret double %6 } +define double @test_min_sd_2(double %a) { +; CHECK-LABEL: @test_min_sd_2( +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> , double [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.x86.sse2.min.sd(<2 x double> [[TMP1]], <2 x double> [[TMP1]]) +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i32 0 +; CHECK-NEXT: ret double [[TMP3]] +; + %1 = insertelement <2 x double> zeroinitializer, double %a, i32 0 + %2 = tail call <2 x double> @llvm.x86.sse2.min.sd(<2 x double> %1, <2 x double> %1) + %3 = extractelement <2 x double> %2, i32 0 + ret double %3 +} + define <2 x double> @test_max_sd(<2 x double> %a, <2 x double> %b) { ; CHECK-LABEL: @test_max_sd( ; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.x86.sse2.max.sd(<2 x double> [[A:%.*]], <2 x double> [[B:%.*]]) @@ -213,6 +270,19 @@ define double @test_max_sd_1(double %a, double %b) { ret double %6 } +define double @test_max_sd_2(double %a) { +; CHECK-LABEL: @test_max_sd_2( +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> , double [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.x86.sse2.max.sd(<2 x double> [[TMP1]], <2 x double> [[TMP1]]) +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i32 0 +; CHECK-NEXT: ret double [[TMP3]] +; + %1 = insertelement <2 x double> zeroinitializer, double %a, i32 0 + %2 = tail call <2 x double> @llvm.x86.sse2.max.sd(<2 x double> %1, <2 x double> %1) + %3 = extractelement <2 x double> %2, i32 0 + ret double %3 +} + define <2 x double> @test_cmp_sd(<2 x double> %a, <2 x double> %b) { ; CHECK-LABEL: @test_cmp_sd( ; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> [[A:%.*]], <2 x double> [[B:%.*]], i8 0) @@ -253,6 +323,19 @@ define double @test_cmp_sd_1(double %a, double %b) { ret double %6 } +define double @test_cmp_sd_2(double %a) { +; CHECK-LABEL: @test_cmp_sd_2( +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> , double [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> [[TMP1]], <2 x double> [[TMP1]], i8 3) +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i32 0 +; CHECK-NEXT: ret double [[TMP3]] +; + %1 = insertelement <2 x double> zeroinitializer, double %a, i32 0 + %2 = tail call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> %1, <2 x double> %1, i8 3) + %3 = extractelement <2 x double> %2, i32 0 + ret double %3 +} + define i32 @test_comieq_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_comieq_sd_0( ; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> undef, double [[A:%.*]], i32 0 diff --git a/test/Transforms/InstCombine/X86/x86-sse41.ll b/test/Transforms/InstCombine/X86/x86-sse41.ll index f95b1b4d552..eb4a011b130 100644 --- a/test/Transforms/InstCombine/X86/x86-sse41.ll +++ b/test/Transforms/InstCombine/X86/x86-sse41.ll @@ -42,6 +42,19 @@ define double @test_round_sd_1(double %a, double %b) { ret double %6 } +define double @test_round_sd_2(double %a) { +; CHECK-LABEL: @test_round_sd_2( +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> undef, double [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> undef, <2 x double> [[TMP1]], i32 10) +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i32 0 +; CHECK-NEXT: ret double [[TMP3]] +; + %1 = insertelement <2 x double> zeroinitializer, double %a, i32 0 + %2 = tail call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> %1, <2 x double> %1, i32 10) + %3 = extractelement <2 x double> %2, i32 0 + ret double %3 +} + define <4 x float> @test_round_ss(<4 x float> %a, <4 x float> %b) { ; CHECK-LABEL: @test_round_ss( ; CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> , <4 x float> [[B:%.*]], i32 10) @@ -94,5 +107,18 @@ define float @test_round_ss_2(float %a, float %b) { ret float %r } +define float @test_round_ss_3(float %a) { +; CHECK-LABEL: @test_round_ss_3( +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[A:%.*]], i32 0 +; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> undef, <4 x float> [[TMP1]], i32 10) +; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 0 +; CHECK-NEXT: ret float [[TMP3]] +; + %1 = insertelement <4 x float> zeroinitializer, float %a, i32 0 + %2 = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %1, <4 x float> %1, i32 10) + %3 = extractelement <4 x float> %2, i32 0 + ret float %3 +} + declare <2 x double> @llvm.x86.sse41.round.sd(<2 x double>, <2 x double>, i32) nounwind readnone declare <4 x float> @llvm.x86.sse41.round.ss(<4 x float>, <4 x float>, i32) nounwind readnone