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Fix normalization and de-normalization of non-affine SCEVs.

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llvm-svn: 105480
This commit is contained in:
Dan Gohman 2010-06-04 19:16:34 +00:00
parent 90af6a44c3
commit 332b06bd4f
2 changed files with 32 additions and 6 deletions
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15
lib/Analysis/ScalarEvolutionNormalization.cpp
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@ -105,22 +105,25 @@ const SCEV *llvm::TransformForPostIncUse(TransformKind Kind,
case NormalizeAutodetect:
if (Instruction *OI = dyn_cast<Instruction>(OperandValToReplace))
if (IVUseShouldUsePostIncValue(User, OI, L, &DT)) {
Result = SE.getMinusSCEV(Result, AR->getStepRecurrence(SE));
const SCEV *TransformedStep =
TransformForPostIncUse(Kind, AR->getStepRecurrence(SE),
User, OperandValToReplace, Loops, SE, DT);
Result = SE.getMinusSCEV(Result, TransformedStep);
Loops.insert(L);
}
break;
case Normalize:
if (Loops.count(L))
Result = SE.getMinusSCEV(Result, AR->getStepRecurrence(SE));
break;
case Denormalize:
if (Loops.count(L)) {
const SCEV *TransformedStep =
TransformForPostIncUse(Kind, AR->getStepRecurrence(SE),
User, OperandValToReplace, Loops, SE, DT);
Result = SE.getAddExpr(Result, TransformedStep);
Result = SE.getMinusSCEV(Result, TransformedStep);
}
break;
case Denormalize:
if (Loops.count(L))
Result = SE.getAddExpr(Result, AR->getStepRecurrence(SE));
break;
}
return Result;
}

23
test/CodeGen/X86/lsr-nonaffine.ll Normal file
View File

@ -0,0 +1,23 @@
; RUN: llc -march=x86-64 < %s | FileCheck %s
; LSR should compute the correct starting values for this loop. Note that
; it's not necessarily LSR's job to compute loop exit expressions; that's
; indvars' job.
; CHECK: movl $12
; CHECK: movl $42
define i32 @real_symmetric_eigen(i32 %n) nounwind {
while.body127: ; preds = %while.cond122
br label %while.cond141
while.cond141: ; preds = %while.cond141, %while.body127
%0 = phi i32 [ 7, %while.body127 ], [ %indvar.next67, %while.cond141 ] ; <i32> [#uses=3]
%indvar.next67 = add i32 %0, 1 ; <i32> [#uses=1]
%t = icmp slt i32 %indvar.next67, %n
br i1 %t, label %if.then171, label %while.cond141
if.then171: ; preds = %while.cond141
%mul150 = mul i32 %0, %0 ; <i32> [#uses=1]
%add174 = add i32 %mul150, %0 ; <i32> [#uses=1]
ret i32 %add174
}