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Move more to raw_ostream, provide support for writing MachineBasicBlock,
LiveInterval, etc to raw_ostream. llvm-svn: 76965
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parent
ea6955ce65
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@ -32,6 +32,7 @@ namespace llvm {
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class MachineInstr;
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class MachineRegisterInfo;
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class TargetRegisterInfo;
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class raw_ostream;
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/// VNInfo - Value Number Information.
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/// This class holds information about a machine level values, including
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@ -192,12 +193,15 @@ namespace llvm {
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void dump() const;
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void print(std::ostream &os) const;
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void print(std::ostream *os) const { if (os) print(*os); }
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void print(raw_ostream &os) const;
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void print(raw_ostream *os) const { if (os) print(*os); }
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private:
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LiveRange(); // DO NOT IMPLEMENT
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};
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std::ostream& operator<<(std::ostream& os, const LiveRange &LR);
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raw_ostream& operator<<(raw_ostream& os, const LiveRange &LR);
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inline bool operator<(unsigned V, const LiveRange &LR) {
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@ -584,6 +588,10 @@ namespace llvm {
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void print(std::ostream *OS, const TargetRegisterInfo *TRI = 0) const {
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if (OS) print(*OS, TRI);
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}
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void print(raw_ostream &OS, const TargetRegisterInfo *TRI = 0) const;
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void print(raw_ostream *OS, const TargetRegisterInfo *TRI = 0) const {
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if (OS) print(*OS, TRI);
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}
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void dump() const;
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private:
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@ -599,6 +607,10 @@ namespace llvm {
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LI.print(OS);
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return OS;
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}
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inline raw_ostream &operator<<(raw_ostream &OS, const LiveInterval &LI) {
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LI.print(OS);
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return OS;
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}
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}
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#endif
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@ -21,6 +21,7 @@ namespace llvm {
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class BasicBlock;
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class MachineFunction;
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class raw_ostream;
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template <>
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struct ilist_traits<MachineInstr> : public ilist_default_traits<MachineInstr> {
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@ -311,6 +312,8 @@ public:
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void dump() const;
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void print(std::ostream &OS) const;
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void print(std::ostream *OS) const { if (OS) print(*OS); }
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void print(raw_ostream &OS) const;
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void print(raw_ostream *OS) const { if (OS) print(*OS); }
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/// getNumber - MachineBasicBlocks are uniquely numbered at the function
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/// level, unless they're not in a MachineFunction yet, in which case this
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@ -339,6 +342,7 @@ private: // Methods used to maintain doubly linked list of blocks...
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};
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std::ostream& operator<<(std::ostream &OS, const MachineBasicBlock &MBB);
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raw_ostream& operator<<(raw_ostream &OS, const MachineBasicBlock &MBB);
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//===--------------------------------------------------------------------===//
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// GraphTraits specializations for machine basic block graphs (machine-CFGs)
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@ -24,6 +24,7 @@
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#include "llvm/ADT/SmallSet.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/Support/Streams.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include <algorithm>
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#include <ostream>
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@ -819,6 +820,9 @@ void LiveInterval::ComputeJoinedWeight(const LiveInterval &Other) {
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std::ostream& llvm::operator<<(std::ostream& os, const LiveRange &LR) {
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return os << '[' << LR.start << ',' << LR.end << ':' << LR.valno->id << ")";
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}
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raw_ostream& llvm::operator<<(raw_ostream& os, const LiveRange &LR) {
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return os << '[' << LR.start << ',' << LR.end << ':' << LR.valno->id << ")";
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}
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void LiveRange::dump() const {
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cerr << *this << "\n";
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@ -826,6 +830,12 @@ void LiveRange::dump() const {
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void LiveInterval::print(std::ostream &OS,
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const TargetRegisterInfo *TRI) const {
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raw_os_ostream RawOS(OS);
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print(RawOS, TRI);
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}
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void LiveInterval::print(raw_ostream &OS,
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const TargetRegisterInfo *TRI) const {
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if (isStackSlot())
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OS << "SS#" << getStackSlotIndex();
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else if (TRI && TargetRegisterInfo::isPhysicalRegister(reg))
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@ -890,3 +900,6 @@ void LiveInterval::dump() const {
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void LiveRange::print(std::ostream &os) const {
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os << *this;
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}
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void LiveRange::print(raw_ostream &os) const {
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os << *this;
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}
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@ -19,6 +19,7 @@
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#include "llvm/Target/TargetInstrDesc.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Support/LeakDetector.h"
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#include "llvm/Support/raw_ostream.h"
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#include <algorithm>
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using namespace llvm;
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@ -35,6 +36,10 @@ std::ostream& llvm::operator<<(std::ostream &OS, const MachineBasicBlock &MBB) {
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MBB.print(OS);
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return OS;
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}
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raw_ostream& llvm::operator<<(raw_ostream &OS, const MachineBasicBlock &MBB) {
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MBB.print(OS);
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return OS;
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}
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/// addNodeToList (MBB) - When an MBB is added to an MF, we need to update the
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/// parent pointer of the MBB, the MBB numbering, and any instructions in the
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@ -137,7 +142,7 @@ void MachineBasicBlock::dump() const {
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print(*cerr.stream());
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}
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static inline void OutputReg(std::ostream &os, unsigned RegNo,
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static inline void OutputReg(raw_ostream &os, unsigned RegNo,
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const TargetRegisterInfo *TRI = 0) {
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if (!RegNo || TargetRegisterInfo::isPhysicalRegister(RegNo)) {
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if (TRI)
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@ -149,6 +154,11 @@ static inline void OutputReg(std::ostream &os, unsigned RegNo,
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}
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void MachineBasicBlock::print(std::ostream &OS) const {
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raw_os_ostream RawOS(OS);
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print(RawOS);
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}
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void MachineBasicBlock::print(raw_ostream &OS) const {
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const MachineFunction *MF = getParent();
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if(!MF) {
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OS << "Can't print out MachineBasicBlock because parent MachineFunction"
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@ -276,19 +276,19 @@ unsigned ScheduleDAGSDNodes::ComputeMemOperandsEnd(SDNode *Node) {
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void ScheduleDAGSDNodes::dumpNode(const SUnit *SU) const {
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if (!SU->getNode()) {
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cerr << "PHYS REG COPY\n";
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errs() << "PHYS REG COPY\n";
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return;
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}
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SU->getNode()->dump(DAG);
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cerr << "\n";
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errs() << "\n";
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SmallVector<SDNode *, 4> FlaggedNodes;
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for (SDNode *N = SU->getNode()->getFlaggedNode(); N; N = N->getFlaggedNode())
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FlaggedNodes.push_back(N);
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while (!FlaggedNodes.empty()) {
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cerr << " ";
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errs() << " ";
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FlaggedNodes.back()->dump(DAG);
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cerr << "\n";
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errs() << "\n";
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FlaggedNodes.pop_back();
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}
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}
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@ -30,6 +30,7 @@
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/ADT/BitVector.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/DepthFirstIterator.h"
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@ -259,6 +260,11 @@ bool VirtRegMap::FindUnusedRegisters(LiveIntervals* LIs) {
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}
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void VirtRegMap::print(std::ostream &OS, const Module* M) const {
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raw_os_ostream RawOS(OS);
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print(RawOS, M);
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}
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void VirtRegMap::print(raw_ostream &OS, const Module* M) const {
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const TargetRegisterInfo* TRI = MF->getTarget().getRegisterInfo();
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OS << "********** REGISTER MAP **********\n";
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@ -34,6 +34,7 @@ namespace llvm {
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class MachineRegisterInfo;
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class TargetInstrInfo;
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class TargetRegisterInfo;
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class raw_ostream;
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class VirtRegMap : public MachineFunctionPass {
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public:
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@ -483,6 +484,8 @@ namespace llvm {
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void print(std::ostream &OS, const Module* M = 0) const;
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void print(std::ostream *OS) const { if (OS) print(*OS); }
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void print(raw_ostream &OS, const Module* M = 0) const;
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void print(raw_ostream *OS) const { if (OS) print(*OS); }
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void dump() const;
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};
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@ -494,6 +497,14 @@ namespace llvm {
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VRM.print(OS);
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return OS;
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}
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inline raw_ostream *operator<<(raw_ostream *OS, const VirtRegMap &VRM) {
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VRM.print(OS);
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return OS;
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}
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inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
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VRM.print(OS);
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return OS;
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}
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} // End llvm namespace
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#endif
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@ -109,8 +109,8 @@ bool LowerSwitch::runOnFunction(Function &F) {
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// operator<< - Used for debugging purposes.
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//
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static std::ostream& operator<<(std::ostream &O,
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const LowerSwitch::CaseVector &C) {
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static raw_ostream& operator<<(raw_ostream &O,
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const LowerSwitch::CaseVector &C) {
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O << "[";
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for (LowerSwitch::CaseVector::const_iterator B = C.begin(),
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@ -123,7 +123,10 @@ static std::ostream& operator<<(std::ostream &O,
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}
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static OStream& operator<<(OStream &O, const LowerSwitch::CaseVector &C) {
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if (O.stream()) *O.stream() << C;
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if (O.stream()) {
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raw_os_ostream OS(*O.stream());
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OS << C;
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}
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return O;
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}
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