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[PowerPC] Spilling to registers does not require frame index scavenging
If spills are to registers instead of to the stack then a copy will be used and frame index scavenging is not required. This patch adds debug info to frame index scavenging and makes sure that spilling to registers does not cause frame index scavenging. Reviewed By: nemanjai, #powerpc Differential Revision: https://reviews.llvm.org/D101360
This commit is contained in:
Stefan Pintilie
parent
3be78fa191
commit
3408e9e758
@ -373,22 +373,32 @@ bool PPCRegisterInfo::requiresFrameIndexScavenging(const MachineFunction &MF) co
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const MachineFrameInfo &MFI = MF.getFrameInfo();
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const std::vector<CalleeSavedInfo> &Info = MFI.getCalleeSavedInfo();
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LLVM_DEBUG(dbgs() << "requiresFrameIndexScavenging for " << MF.getName()
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<< ".\n");
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// If the callee saved info is invalid we have to default to true for safety.
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if (!MFI.isCalleeSavedInfoValid())
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if (!MFI.isCalleeSavedInfoValid()) {
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LLVM_DEBUG(dbgs() << "TRUE - Invalid callee saved info.\n");
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return true;
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}
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// We will require the use of X-Forms because the frame is larger than what
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// can be represented in signed 16 bits that fit in the immediate of a D-Form.
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// If we need an X-Form then we need a register to store the address offset.
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unsigned FrameSize = MFI.getStackSize();
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// Signed 16 bits means that the FrameSize cannot be more than 15 bits.
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if (FrameSize & ~0x7FFF)
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if (FrameSize & ~0x7FFF) {
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LLVM_DEBUG(dbgs() << "TRUE - Frame size is too large for D-Form.\n");
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return true;
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}
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// The callee saved info is valid so it can be traversed.
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// Checking for registers that need saving that do not have load or store
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// forms where the address offset is an immediate.
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for (unsigned i = 0; i < Info.size(); i++) {
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// If the spill is to a register no scavenging is required.
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if (Info[i].isSpilledToReg())
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continue;
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int FrIdx = Info[i].getFrameIdx();
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unsigned Reg = Info[i].getReg();
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@ -397,8 +407,13 @@ bool PPCRegisterInfo::requiresFrameIndexScavenging(const MachineFunction &MF) co
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if (!MFI.isFixedObjectIndex(FrIdx)) {
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// This is not a fixed object. If it requires alignment then we may still
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// need to use the XForm.
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if (offsetMinAlignForOpcode(Opcode) > 1)
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if (offsetMinAlignForOpcode(Opcode) > 1) {
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LLVM_DEBUG(dbgs() << "Memory Operand: " << InstrInfo->getName(Opcode)
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<< " for register " << printReg(Reg, this) << ".\n");
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LLVM_DEBUG(dbgs() << "TRUE - Not fixed frame object that requires "
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<< "alignment.\n");
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return true;
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}
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}
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// This is eiher:
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@ -407,9 +422,14 @@ bool PPCRegisterInfo::requiresFrameIndexScavenging(const MachineFunction &MF) co
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// need to consider the alignment here.
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// 2) A not fixed object but in that case we now know that the min required
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// alignment is no more than 1 based on the previous check.
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if (InstrInfo->isXFormMemOp(Opcode))
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if (InstrInfo->isXFormMemOp(Opcode)) {
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LLVM_DEBUG(dbgs() << "Memory Operand: " << InstrInfo->getName(Opcode)
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<< " for register " << printReg(Reg, this) << ".\n");
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LLVM_DEBUG(dbgs() << "TRUE - Memory operand is X-Form.\n");
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return true;
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}
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}
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LLVM_DEBUG(dbgs() << "FALSE - Scavenging is not required.\n");
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return false;
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}
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143
test/CodeGen/PowerPC/frame_index_scavenging.mir
Normal file
143
test/CodeGen/PowerPC/frame_index_scavenging.mir
Normal file
@ -0,0 +1,143 @@
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# REQUIRES: asserts
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# RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 \
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# RUN: -start-before=prologepilog -debug-only=reginfo --filetype=null \
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# RUN: -verify-machineinstrs %s 2>&1 >/dev/null | FileCheck %s --check-prefix=P8
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# RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 \
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# RUN: -start-before=prologepilog -debug-only=reginfo --filetype=null \
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# RUN: -verify-machineinstrs %s 2>&1 >/dev/null | FileCheck %s --check-prefix=P9
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# RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 \
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# RUN: -start-before=prologepilog -debug-only=reginfo \
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# RUN: --filetype=null -ppc-enable-pe-vector-spills \
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# RUN: -verify-machineinstrs %s 2>&1 >/dev/null | FileCheck %s --check-prefix=P9-REGSPILL
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# RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr10 \
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# RUN: -start-before=prologepilog -debug-only=reginfo --filetype=null \
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# RUN: -verify-machineinstrs %s 2>&1 >/dev/null | FileCheck %s -check-prefix=P10
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---
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name: SpillGPR
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alignment: 16
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tracksRegLiveness: true
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liveins:
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body: |
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bb.0.entry:
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$r14 = IMPLICIT_DEF
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$r15 = IMPLICIT_DEF
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$r16 = IMPLICIT_DEF
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$r17 = IMPLICIT_DEF
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$lr8 = IMPLICIT_DEF
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BLR8 implicit undef $lr8, implicit undef $rm
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## TODO: Calling requiresFrameIndexScavenging from PEI::runOnMachineFunction
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## always returns TRUE because MFI.isCalleeSavedInfoValid() always
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## indicates that the callee saved info is invalid at that point. The
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## info becomes valid for later calls. Can we do better?
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# P8: requiresFrameIndexScavenging for SpillGPR.
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# P8: TRUE - Invalid callee saved info.
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# P8: requiresFrameIndexScavenging for SpillGPR.
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# P8: FALSE - Scavenging is not required.
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# P9: requiresFrameIndexScavenging for SpillGPR.
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# P9: TRUE - Invalid callee saved info.
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# P9: requiresFrameIndexScavenging for SpillGPR.
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# P9: FALSE - Scavenging is not required.
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# P9-REGSPILL: requiresFrameIndexScavenging for SpillGPR.
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# P9-REGSPILL: TRUE - Invalid callee saved info.
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# P9-REGSPILL: requiresFrameIndexScavenging for SpillGPR.
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# P9-REGSPILL: FALSE - Scavenging is not required.
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# P10: requiresFrameIndexScavenging for SpillGPR.
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# P10: TRUE - Invalid callee saved info.
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# P10: requiresFrameIndexScavenging for SpillGPR.
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# P10: FALSE - Scavenging is not required.
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...
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---
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name: SpillFPR
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alignment: 16
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tracksRegLiveness: true
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liveins:
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body: |
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bb.0.entry:
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$f14 = IMPLICIT_DEF
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$f15 = IMPLICIT_DEF
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$f16 = IMPLICIT_DEF
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$f17 = IMPLICIT_DEF
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$lr8 = IMPLICIT_DEF
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BLR8 implicit undef $lr8, implicit undef $rm
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# P8: requiresFrameIndexScavenging for SpillFPR.
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# P8: TRUE - Invalid callee saved info.
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# P8: requiresFrameIndexScavenging for SpillFPR.
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# P8: FALSE - Scavenging is not required.
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# P9: requiresFrameIndexScavenging for SpillFPR.
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# P9: TRUE - Invalid callee saved info.
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# P9: requiresFrameIndexScavenging for SpillFPR.
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# P9: FALSE - Scavenging is not required.
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# P9-REGSPILL: requiresFrameIndexScavenging for SpillFPR.
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# P9-REGSPILL: TRUE - Invalid callee saved info.
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# P9-REGSPILL: requiresFrameIndexScavenging for SpillFPR.
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# P9-REGSPILL: FALSE - Scavenging is not required.
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# P10: requiresFrameIndexScavenging for SpillFPR.
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# P10: TRUE - Invalid callee saved info.
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# P10: requiresFrameIndexScavenging for SpillFPR.
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# P10: FALSE - Scavenging is not required.
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...
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---
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name: SpillVR
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alignment: 16
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tracksRegLiveness: true
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liveins:
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body: |
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bb.0.entry:
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$v20 = IMPLICIT_DEF
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$v21 = IMPLICIT_DEF
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$v22 = IMPLICIT_DEF
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$v23 = IMPLICIT_DEF
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$lr8 = IMPLICIT_DEF
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BLR8 implicit undef $lr8, implicit undef $rm
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# P8: requiresFrameIndexScavenging for SpillVR.
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# P8: TRUE - Invalid callee saved info.
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# P8: requiresFrameIndexScavenging for SpillVR.
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# P8: Memory Operand: STVX for register $v20.
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# P8: TRUE - Memory operand is X-Form.
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# P9: requiresFrameIndexScavenging for SpillVR.
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# P9: TRUE - Invalid callee saved info.
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# P9: requiresFrameIndexScavenging for SpillVR.
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# P9: Memory Operand: STVX for register $v20.
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# P9: TRUE - Memory operand is X-Form.
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# P9-REGSPILL: requiresFrameIndexScavenging for SpillVR.
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# P9-REGSPILL: TRUE - Invalid callee saved info.
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# P9-REGSPILL: requiresFrameIndexScavenging for SpillVR.
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# P9-REGSPILL: Memory Operand: STVX for register $v20.
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# P9-REGSPILL: TRUE - Memory operand is X-Form.
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# P10: requiresFrameIndexScavenging for SpillVR.
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# P10: TRUE - Invalid callee saved info.
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# P10: requiresFrameIndexScavenging for SpillVR.
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# P10: Memory Operand: STVX for register $v20.
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# P10: TRUE - Memory operand is X-Form.
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...
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---
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name: SpillMixed
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alignment: 16
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tracksRegLiveness: true
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liveins:
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body: |
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bb.0.entry:
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$r14 = IMPLICIT_DEF
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$r15 = IMPLICIT_DEF
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$f16 = IMPLICIT_DEF
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$f17 = IMPLICIT_DEF
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$v20 = IMPLICIT_DEF
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$v21 = IMPLICIT_DEF
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$lr8 = IMPLICIT_DEF
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BLR8 implicit undef $lr8, implicit undef $rm
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# P8: requiresFrameIndexScavenging for SpillMixed.
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# P8: TRUE - Invalid callee saved info.
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# P9: requiresFrameIndexScavenging for SpillMixed.
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# P9: TRUE - Invalid callee saved info.
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# P9-REGSPILL: requiresFrameIndexScavenging for SpillMixed.
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# P9-REGSPILL: TRUE - Invalid callee saved info.
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# P10: requiresFrameIndexScavenging for SpillMixed.
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# P10: TRUE - Invalid callee saved info.
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...
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