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[X86][AVX512] Tag AVX5124FMAPS/AVX5124VNNIW with missing scheduler classes

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Necessary for D46276 as even though btver2 doesn't use these instructions, its now flagged as complete so complains if ANY instruction isn't tagged.....

UnsupportedFeatures wouldn't help here as these instructions don't appear to have a feature predicate (like a lot of AVX512).

llvm-svn: 334423
This commit is contained in:
Simon Pilgrim 2018-06-11 17:28:00 +00:00
parent fd600643dc
commit 34fa2d4fd6
1 changed files with 12 additions and 6 deletions
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18
lib/Target/X86/X86InstrAVX512.td
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@ -11333,22 +11333,26 @@ let hasSideEffects = 0, mayLoad = 1, ExeDomain = SSEPackedSingle,
defm V4FMADDPSrm : AVX512_maskable_3src_in_asm<0x9A, MRMSrcMem, v16f32_info,
(outs VR512:$dst), (ins VR512:$src2, f128mem:$src3),
"v4fmaddps", "$src3, $src2", "$src2, $src3",
[]>, EVEX_V512, EVEX_4V, T8XD, EVEX_CD8<32, CD8VQ>;
[]>, EVEX_V512, EVEX_4V, T8XD, EVEX_CD8<32, CD8VQ>,
Sched<[SchedWriteFMA.ZMM.Folded]>;
defm V4FNMADDPSrm : AVX512_maskable_3src_in_asm<0xAA, MRMSrcMem, v16f32_info,
(outs VR512:$dst), (ins VR512:$src2, f128mem:$src3),
"v4fnmaddps", "$src3, $src2", "$src2, $src3",
[]>, EVEX_V512, EVEX_4V, T8XD, EVEX_CD8<32, CD8VQ>;
[]>, EVEX_V512, EVEX_4V, T8XD, EVEX_CD8<32, CD8VQ>,
Sched<[SchedWriteFMA.ZMM.Folded]>;
defm V4FMADDSSrm : AVX512_maskable_3src_in_asm<0x9B, MRMSrcMem, f32x_info,
(outs VR128X:$dst), (ins VR128X:$src2, f128mem:$src3),
"v4fmaddss", "$src3, $src2", "$src2, $src3",
[]>, EVEX_V128, EVEX_4V, T8XD, EVEX_CD8<32, CD8VF>;
[]>, EVEX_V128, EVEX_4V, T8XD, EVEX_CD8<32, CD8VF>,
Sched<[SchedWriteFMA.Scl.Folded]>;
defm V4FNMADDSSrm : AVX512_maskable_3src_in_asm<0xAB, MRMSrcMem, f32x_info,
(outs VR128X:$dst), (ins VR128X:$src2, f128mem:$src3),
"v4fnmaddss", "$src3, $src2", "$src2, $src3",
[]>, EVEX_V128, EVEX_4V, T8XD, EVEX_CD8<32, CD8VF>;
[]>, EVEX_V128, EVEX_4V, T8XD, EVEX_CD8<32, CD8VF>,
Sched<[SchedWriteFMA.Scl.Folded]>;
}
//===----------------------------------------------------------------------===//
@ -11360,11 +11364,13 @@ let hasSideEffects = 0, mayLoad = 1, ExeDomain = SSEPackedInt,
defm VP4DPWSSDrm : AVX512_maskable_3src_in_asm<0x52, MRMSrcMem, v16i32_info,
(outs VR512:$dst), (ins VR512:$src2, f128mem:$src3),
"vp4dpwssd", "$src3, $src2", "$src2, $src3",
[]>, EVEX_V512, EVEX_4V, T8XD, EVEX_CD8<32, CD8VQ>;
[]>, EVEX_V512, EVEX_4V, T8XD, EVEX_CD8<32, CD8VQ>,
Sched<[SchedWriteFMA.ZMM.Folded]>;
defm VP4DPWSSDSrm : AVX512_maskable_3src_in_asm<0x53, MRMSrcMem, v16i32_info,
(outs VR512:$dst), (ins VR512:$src2, f128mem:$src3),
"vp4dpwssds", "$src3, $src2", "$src2, $src3",
[]>, EVEX_V512, EVEX_4V, T8XD, EVEX_CD8<32, CD8VQ>;
[]>, EVEX_V512, EVEX_4V, T8XD, EVEX_CD8<32, CD8VQ>,
Sched<[SchedWriteFMA.ZMM.Folded]>;
}