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Fix formatting and coding style.
llvm-svn: 234084
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4b79b11952
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3552769287
@ -42,15 +42,17 @@ template <typename T> class SmallVectorImpl;
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/// be exposed through a TargetSubtargetInfo-derived class.
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///
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class TargetSubtargetInfo : public MCSubtargetInfo {
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TargetSubtargetInfo(const TargetSubtargetInfo&) = delete;
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void operator=(const TargetSubtargetInfo&) = delete;
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TargetSubtargetInfo(const TargetSubtargetInfo &) = delete;
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void operator=(const TargetSubtargetInfo &) = delete;
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protected: // Can only create subclasses...
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TargetSubtargetInfo();
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public:
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// AntiDepBreakMode - Type of anti-dependence breaking that should
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// be performed before post-RA scheduling.
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typedef enum { ANTIDEP_NONE, ANTIDEP_CRITICAL, ANTIDEP_ALL } AntiDepBreakMode;
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typedef SmallVectorImpl<const TargetRegisterClass*> RegClassVector;
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typedef SmallVectorImpl<const TargetRegisterClass *> RegClassVector;
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virtual ~TargetSubtargetInfo();
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@ -89,8 +91,9 @@ public:
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/// MCSchedClassDesc with the isVariant property. This may return the ID of
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/// another variant SchedClass, but repeated invocation must quickly terminate
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/// in a nonvariant SchedClass.
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virtual unsigned resolveSchedClass(unsigned SchedClass, const MachineInstr *MI,
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const TargetSchedModel* SchedModel) const {
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virtual unsigned resolveSchedClass(unsigned SchedClass,
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const MachineInstr *MI,
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const TargetSchedModel *SchedModel) const {
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return 0;
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}
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@ -128,20 +131,16 @@ public:
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/// scheduling heuristics (no custom MachineSchedStrategy) to make
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/// changes to the generic scheduling policy.
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virtual void overrideSchedPolicy(MachineSchedPolicy &Policy,
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MachineInstr *begin,
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MachineInstr *end,
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MachineInstr *begin, MachineInstr *end,
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unsigned NumRegionInstrs) const {}
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// \brief Perform target specific adjustments to the latency of a schedule
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// dependency.
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virtual void adjustSchedDependency(SUnit *def, SUnit *use,
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SDep& dep) const { }
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virtual void adjustSchedDependency(SUnit *def, SUnit *use, SDep &dep) const {}
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// For use with PostRAScheduling: get the anti-dependence breaking that should
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// be performed before post-RA scheduling.
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virtual AntiDepBreakMode getAntiDepBreakMode() const {
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return ANTIDEP_NONE;
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}
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virtual AntiDepBreakMode getAntiDepBreakMode() const { return ANTIDEP_NONE; }
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// For use with PostRAScheduling: in CriticalPathRCs, return any register
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// classes that should only be considered for anti-dependence breaking if they
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@ -177,9 +176,7 @@ public:
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}
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/// Enable tracking of subregister liveness in register allocator.
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virtual bool enableSubRegLiveness() const {
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return false;
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}
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virtual bool enableSubRegLiveness() const { return false; }
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};
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} // End llvm namespace
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