From 35a599747e16e43cee11c18cb97f8e971d15cd6b Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper@intel.com>
Date: Sun, 1 Apr 2018 06:29:25 +0000
Subject: [PATCH] [X86] Allow i16 subtracts to be promoted if the load is on
 the LHS and its not being stored.

llvm-svn: 328928
---
 lib/Target/X86/X86ISelLowering.cpp | 8 ++++----
 test/CodeGen/X86/promote-i16.ll    | 3 ++-
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 5ee9ff85fdd..c39be22b927 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -38742,12 +38742,12 @@ bool X86TargetLowering::IsDesirableToPromoteOp(SDValue Op, EVT &PVT) const {
   case ISD::SUB: {
     SDValue N0 = Op.getOperand(0);
     SDValue N1 = Op.getOperand(1);
-    if (!Commute && MayFoldLoad(N1))
-      return false;
     // Avoid disabling potential load folding opportunities.
-    if (MayFoldLoad(N0) && (!isa<ConstantSDNode>(N1) || MayFoldIntoStore(Op)))
+    if (MayFoldLoad(N1) &&
+        (!Commute || !isa<ConstantSDNode>(N0) || MayFoldIntoStore(Op)))
       return false;
-    if (MayFoldLoad(N1) && (!isa<ConstantSDNode>(N0) || MayFoldIntoStore(Op)))
+    if (MayFoldLoad(N0) &&
+        ((Commute && !isa<ConstantSDNode>(N1)) || MayFoldIntoStore(Op)))
       return false;
   }
   }
diff --git a/test/CodeGen/X86/promote-i16.ll b/test/CodeGen/X86/promote-i16.ll
index cc6078662d2..b0559f5dd4c 100644
--- a/test/CodeGen/X86/promote-i16.ll
+++ b/test/CodeGen/X86/promote-i16.ll
@@ -49,7 +49,8 @@ define signext i16 @baz(i16* %x, i16 signext %y) nounwind {
 ; X64-LABEL: baz:
 ; X64:       # %bb.0: # %entry
 ; X64-NEXT:    movzwl (%rdi), %eax
-; X64-NEXT:    subw %si, %ax
+; X64-NEXT:    subl %esi, %eax
+; X64-NEXT:    # kill: def $ax killed $ax killed $eax
 ; X64-NEXT:    retq
 entry:
   %0 = load i16, i16* %x