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[Attributor] Update check lines for all AMDGPU attributor tests

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I thought there was only one when I pushed
cdb4cfe8b3ce2b0c50d4855ec260eab07fe63611, these should be all (in the
CodeGen/AMDGPU folder).
This commit is contained in:
Johannes Doerfert 2021-07-27 00:53:56 -05:00
parent 2b8eaac9b5
commit 35ac57a3f1
4 changed files with 81 additions and 47 deletions
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86
test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
View File

@ -405,12 +405,16 @@ define amdgpu_kernel void @use_flat_to_constant_addrspacecast(i32* %ptr) #1 {
}
define amdgpu_kernel void @use_is_shared(i8* %ptr) #1 {
; HSA-LABEL: define {{[^@]+}}@use_is_shared
; HSA-SAME: (i8* [[PTR:%.*]]) #[[ATTR11]] {
; HSA-NEXT: [[IS_SHARED:%.*]] = call i1 @llvm.amdgcn.is.shared(i8* [[PTR]])
; HSA-NEXT: [[EXT:%.*]] = zext i1 [[IS_SHARED]] to i32
; HSA-NEXT: store i32 [[EXT]], i32 addrspace(1)* undef, align 4
; HSA-NEXT: ret void
; AKF_HSA-LABEL: define {{[^@]+}}@use_is_shared
; AKF_HSA-SAME: (i8* [[PTR:%.*]]) #[[ATTR11]] {
; AKF_HSA-NEXT: [[IS_SHARED:%.*]] = call i1 @llvm.amdgcn.is.shared(i8* [[PTR]])
; AKF_HSA-NEXT: [[EXT:%.*]] = zext i1 [[IS_SHARED]] to i32
; AKF_HSA-NEXT: store i32 [[EXT]], i32 addrspace(1)* undef, align 4
; AKF_HSA-NEXT: ret void
;
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@use_is_shared
; ATTRIBUTOR_HSA-SAME: (i8* [[PTR:%.*]]) #[[ATTR1]] {
; ATTRIBUTOR_HSA-NEXT: ret void
;
%is.shared = call i1 @llvm.amdgcn.is.shared(i8* %ptr)
%ext = zext i1 %is.shared to i32
@ -419,12 +423,16 @@ define amdgpu_kernel void @use_is_shared(i8* %ptr) #1 {
}
define amdgpu_kernel void @use_is_private(i8* %ptr) #1 {
; HSA-LABEL: define {{[^@]+}}@use_is_private
; HSA-SAME: (i8* [[PTR:%.*]]) #[[ATTR11]] {
; HSA-NEXT: [[IS_PRIVATE:%.*]] = call i1 @llvm.amdgcn.is.private(i8* [[PTR]])
; HSA-NEXT: [[EXT:%.*]] = zext i1 [[IS_PRIVATE]] to i32
; HSA-NEXT: store i32 [[EXT]], i32 addrspace(1)* undef, align 4
; HSA-NEXT: ret void
; AKF_HSA-LABEL: define {{[^@]+}}@use_is_private
; AKF_HSA-SAME: (i8* [[PTR:%.*]]) #[[ATTR11]] {
; AKF_HSA-NEXT: [[IS_PRIVATE:%.*]] = call i1 @llvm.amdgcn.is.private(i8* [[PTR]])
; AKF_HSA-NEXT: [[EXT:%.*]] = zext i1 [[IS_PRIVATE]] to i32
; AKF_HSA-NEXT: store i32 [[EXT]], i32 addrspace(1)* undef, align 4
; AKF_HSA-NEXT: ret void
;
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@use_is_private
; ATTRIBUTOR_HSA-SAME: (i8* [[PTR:%.*]]) #[[ATTR1]] {
; ATTRIBUTOR_HSA-NEXT: ret void
;
%is.private = call i1 @llvm.amdgcn.is.private(i8* %ptr)
%ext = zext i1 %is.private to i32
@ -433,11 +441,16 @@ define amdgpu_kernel void @use_is_private(i8* %ptr) #1 {
}
define amdgpu_kernel void @use_alloca() #1 {
; HSA-LABEL: define {{[^@]+}}@use_alloca
; HSA-SAME: () #[[ATTR13:[0-9]+]] {
; HSA-NEXT: [[ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
; HSA-NEXT: store i32 0, i32 addrspace(5)* [[ALLOCA]], align 4
; HSA-NEXT: ret void
; AKF_HSA-LABEL: define {{[^@]+}}@use_alloca
; AKF_HSA-SAME: () #[[ATTR13:[0-9]+]] {
; AKF_HSA-NEXT: [[ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
; AKF_HSA-NEXT: store i32 0, i32 addrspace(5)* [[ALLOCA]], align 4
; AKF_HSA-NEXT: ret void
;
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@use_alloca
; ATTRIBUTOR_HSA-SAME: () #[[ATTR13:[0-9]+]] {
; ATTRIBUTOR_HSA-NEXT: [[ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
; ATTRIBUTOR_HSA-NEXT: ret void
;
%alloca = alloca i32, addrspace(5)
store i32 0, i32 addrspace(5)* %alloca
@ -445,14 +458,22 @@ define amdgpu_kernel void @use_alloca() #1 {
}
define amdgpu_kernel void @use_alloca_non_entry_block() #1 {
; HSA-LABEL: define {{[^@]+}}@use_alloca_non_entry_block
; HSA-SAME: () #[[ATTR13]] {
; HSA-NEXT: entry:
; HSA-NEXT: br label [[BB:%.*]]
; HSA: bb:
; HSA-NEXT: [[ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
; HSA-NEXT: store i32 0, i32 addrspace(5)* [[ALLOCA]], align 4
; HSA-NEXT: ret void
; AKF_HSA-LABEL: define {{[^@]+}}@use_alloca_non_entry_block
; AKF_HSA-SAME: () #[[ATTR13]] {
; AKF_HSA-NEXT: entry:
; AKF_HSA-NEXT: br label [[BB:%.*]]
; AKF_HSA: bb:
; AKF_HSA-NEXT: [[ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
; AKF_HSA-NEXT: store i32 0, i32 addrspace(5)* [[ALLOCA]], align 4
; AKF_HSA-NEXT: ret void
;
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@use_alloca_non_entry_block
; ATTRIBUTOR_HSA-SAME: () #[[ATTR13]] {
; ATTRIBUTOR_HSA-NEXT: entry:
; ATTRIBUTOR_HSA-NEXT: br label [[BB:%.*]]
; ATTRIBUTOR_HSA: bb:
; ATTRIBUTOR_HSA-NEXT: [[ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
; ATTRIBUTOR_HSA-NEXT: ret void
;
entry:
br label %bb
@ -464,11 +485,16 @@ bb:
}
define void @use_alloca_func() #1 {
; HSA-LABEL: define {{[^@]+}}@use_alloca_func
; HSA-SAME: () #[[ATTR13]] {
; HSA-NEXT: [[ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
; HSA-NEXT: store i32 0, i32 addrspace(5)* [[ALLOCA]], align 4
; HSA-NEXT: ret void
; AKF_HSA-LABEL: define {{[^@]+}}@use_alloca_func
; AKF_HSA-SAME: () #[[ATTR13]] {
; AKF_HSA-NEXT: [[ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
; AKF_HSA-NEXT: store i32 0, i32 addrspace(5)* [[ALLOCA]], align 4
; AKF_HSA-NEXT: ret void
;
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@use_alloca_func
; ATTRIBUTOR_HSA-SAME: () #[[ATTR13]] {
; ATTRIBUTOR_HSA-NEXT: [[ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
; ATTRIBUTOR_HSA-NEXT: ret void
;
%alloca = alloca i32, addrspace(5)
store i32 0, i32 addrspace(5)* %alloca

2
test/CodeGen/AMDGPU/direct-indirect-call.ll
View File

@ -21,8 +21,6 @@ define internal void @direct() {
;
; ATTRIBUTOR_GCN-LABEL: define {{[^@]+}}@direct
; ATTRIBUTOR_GCN-SAME: () #[[ATTR1:[0-9]+]] {
; ATTRIBUTOR_GCN-NEXT: [[FPTR:%.*]] = alloca void ()*, align 8
; ATTRIBUTOR_GCN-NEXT: store void ()* @indirect, void ()** [[FPTR]], align 8
; ATTRIBUTOR_GCN-NEXT: call void @indirect()
; ATTRIBUTOR_GCN-NEXT: ret void
;

19
test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
View File

@ -14,13 +14,18 @@ define internal void @indirect() {
}
define amdgpu_kernel void @test_simple_indirect_call() #0 {
; GCN-LABEL: define {{[^@]+}}@test_simple_indirect_call
; GCN-SAME: () #[[ATTR1:[0-9]+]] {
; GCN-NEXT: [[FPTR:%.*]] = alloca void ()*, align 8
; GCN-NEXT: store void ()* @indirect, void ()** [[FPTR]], align 8
; GCN-NEXT: [[FP:%.*]] = load void ()*, void ()** [[FPTR]], align 8
; GCN-NEXT: call void [[FP]]()
; GCN-NEXT: ret void
; AKF_GCN-LABEL: define {{[^@]+}}@test_simple_indirect_call
; AKF_GCN-SAME: () #[[ATTR1:[0-9]+]] {
; AKF_GCN-NEXT: [[FPTR:%.*]] = alloca void ()*, align 8
; AKF_GCN-NEXT: store void ()* @indirect, void ()** [[FPTR]], align 8
; AKF_GCN-NEXT: [[FP:%.*]] = load void ()*, void ()** [[FPTR]], align 8
; AKF_GCN-NEXT: call void [[FP]]()
; AKF_GCN-NEXT: ret void
;
; ATTRIBUTOR_GCN-LABEL: define {{[^@]+}}@test_simple_indirect_call
; ATTRIBUTOR_GCN-SAME: () #[[ATTR1:[0-9]+]] {
; ATTRIBUTOR_GCN-NEXT: call void @indirect()
; ATTRIBUTOR_GCN-NEXT: ret void
;
; CHECK-LABEL: define {{[^@]+}}@test_simple_indirect_call
; CHECK-SAME: () #[[ATTR1:[0-9]+]] {

21
test/CodeGen/AMDGPU/simple-indirect-call.ll
View File

@ -43,14 +43,19 @@ define internal void @indirect() {
; GFX9-NEXT: s_swappc_b64 s[30:31], s[18:19]
; GFX9-NEXT: s_endpgm
define amdgpu_kernel void @test_simple_indirect_call() {
; GCN-LABEL: define {{[^@]+}}@test_simple_indirect_call
; GCN-SAME: () #[[ATTR1:[0-9]+]] {
; GCN-NEXT: [[FPTR:%.*]] = alloca void ()*, align 8, addrspace(5)
; GCN-NEXT: [[FPTR_CAST:%.*]] = addrspacecast void ()* addrspace(5)* [[FPTR]] to void ()**
; GCN-NEXT: store void ()* @indirect, void ()** [[FPTR_CAST]], align 8
; GCN-NEXT: [[FP:%.*]] = load void ()*, void ()** [[FPTR_CAST]], align 8
; GCN-NEXT: call void [[FP]]()
; GCN-NEXT: ret void
; AKF_GCN-LABEL: define {{[^@]+}}@test_simple_indirect_call
; AKF_GCN-SAME: () #[[ATTR1:[0-9]+]] {
; AKF_GCN-NEXT: [[FPTR:%.*]] = alloca void ()*, align 8, addrspace(5)
; AKF_GCN-NEXT: [[FPTR_CAST:%.*]] = addrspacecast void ()* addrspace(5)* [[FPTR]] to void ()**
; AKF_GCN-NEXT: store void ()* @indirect, void ()** [[FPTR_CAST]], align 8
; AKF_GCN-NEXT: [[FP:%.*]] = load void ()*, void ()** [[FPTR_CAST]], align 8
; AKF_GCN-NEXT: call void [[FP]]()
; AKF_GCN-NEXT: ret void
;
; ATTRIBUTOR_GCN-LABEL: define {{[^@]+}}@test_simple_indirect_call
; ATTRIBUTOR_GCN-SAME: () #[[ATTR1:[0-9]+]] {
; ATTRIBUTOR_GCN-NEXT: call void @indirect()
; ATTRIBUTOR_GCN-NEXT: ret void
;
%fptr = alloca void()*, addrspace(5)
%fptr.cast = addrspacecast void()* addrspace(5)* %fptr to void()**