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[RISCV] Add B extension tests to make sure RV64 only instructions aren't accepted in RV32.

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Add tests to make sure common instructions are accepted in RV64
and not just RV32.

Reviewed By: asb, frasercrmck

Differential Revision: https://reviews.llvm.org/D95150
This commit is contained in:
Craig Topper 2021-01-22 13:30:12 -08:00
parent 7e2c4e2399
commit 35af3967fc
21 changed files with 248 additions and 1 deletions
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5
test/MC/RISCV/rv32zba-invalid.s
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@ -6,3 +6,8 @@ sh1add t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
sh2add t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# Too few operands
sh3add t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
slli.uw t0, t1, 0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
add.uw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
sh1add.uw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
sh2add.uw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
sh3add.uw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set

3
test/MC/RISCV/rv32zbb-invalid.s
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@ -18,3 +18,6 @@ max t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
minu t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# Too few operands
maxu t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
clzw t0, t1 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
ctzw t0, t1 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
cpopw t0, t1 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set

4
test/MC/RISCV/rv32zbbp-invalid.s
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@ -15,3 +15,7 @@ rori t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# Immediate operand out of range
rori t0, t1, 32 # CHECK: :[[@LINE]]:14: error: immediate must be an integer in the range [0, 31]
rori t0, t1, -1 # CHECK: :[[@LINE]]:14: error: immediate must be an integer in the range [0, 31]
rolw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
rorw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
roriw t0, t1, 31 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
roriw t0, t1, 0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set

2
test/MC/RISCV/rv32zbe-invalid.s
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@ -4,3 +4,5 @@
bdecompress t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# Too few operands
bcompress t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
bdecompressw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
bcompressw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set

1
test/MC/RISCV/rv32zbf-invalid.s
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@ -2,3 +2,4 @@
# Too few operands
bfp t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
bfpw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set

13
test/MC/RISCV/rv32zbp-invalid.s
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@ -54,3 +54,16 @@ xperm.n t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
xperm.b t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# Too few operands
xperm.h t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
slow t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
srow t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
sloiw t0, t1, 0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
sroiw t0, t1, 0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
gorcw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
grevw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
gorciw t0, t1, 0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
greviw t0, t1, 0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
shflw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
unshflw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
packw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
packuw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
xperm.w t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set

3
test/MC/RISCV/rv32zbproposedc-invalid.s
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@ -1,5 +1,6 @@
# RUN: not llvm-mc -triple riscv32 -mattr=+c,+experimental-zbproposedc < %s 2>&1 | FileCheck %s
# RUN: not llvm-mc -triple riscv32 -mattr=+c,+experimental-zbproposedc,+experimental-Zba < %s 2>&1 | FileCheck %s
# Too many operands
c.not s0, s1 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
c.neg s0, s1 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
c.zext.w s0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set

2
test/MC/RISCV/rv32zbr-invalid.s
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@ -12,3 +12,5 @@ crc32c.b t0, t1, t2 # CHECK: :[[@LINE]]:18: error: invalid operand for instructi
crc32c.h t0, t1, t2 # CHECK: :[[@LINE]]:18: error: invalid operand for instruction
# Too many operands
crc32c.w t0, t1, t2 # CHECK: :[[@LINE]]:18: error: invalid operand for instruction
crc32.d t0, t1 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
crc32c.d t0, t1 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set

7
test/MC/RISCV/rv32zbs-invalid.s
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@ -28,3 +28,10 @@ bexti t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# Immediate operand out of range
bexti t0, t1, 32 # CHECK: :[[@LINE]]:15: error: immediate must be an integer in the range [0, 31]
bexti t0, t1, -1 # CHECK: :[[@LINE]]:15: error: immediate must be an integer in the range [0, 31]
bclrw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
bsetw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
binvw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
bextw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
bclriw t0, t1, 0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
bsetiw t0, t1, 0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
binviw t0, t1, 0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set

3
test/MC/RISCV/rv32zbt-invalid.s
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@ -13,3 +13,6 @@ fsri t0, t1, t2 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# Immediate operand out of range
fsri t0, t1, t2, 32 # CHECK: :[[@LINE]]:18: error: immediate must be an integer in the range [0, 31]
fsri t0, t1, t2, -1 # CHECK: :[[@LINE]]:18: error: immediate must be an integer in the range [0, 31]
fslw t0, t1, t2, t3 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
fsrw t0, t1, t2, t3 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
fsriw t0, t1, t2, 0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set

9
test/MC/RISCV/rv64zba-valid.s
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@ -27,3 +27,12 @@ sh2add.uw t0, t1, t2
# CHECK-ASM-AND-OBJ: sh3add.uw t0, t1, t2
# CHECK-ASM: encoding: [0xbb,0x62,0x73,0x20]
sh3add.uw t0, t1, t2
# CHECK-ASM-AND-OBJ: sh1add t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x22,0x73,0x20]
sh1add t0, t1, t2
# CHECK-ASM-AND-OBJ: sh2add t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x42,0x73,0x20]
sh2add t0, t1, t2
# CHECK-ASM-AND-OBJ: sh3add t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x62,0x73,0x20]
sh3add t0, t1, t2

27
test/MC/RISCV/rv64zbb-valid.s
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@ -12,6 +12,33 @@
# RUN: | llvm-objdump --mattr=+experimental-zbb -M no-aliases -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# CHECK-ASM-AND-OBJ: clz t0, t1
# CHECK-ASM: encoding: [0x93,0x12,0x03,0x60]
clz t0, t1
# CHECK-ASM-AND-OBJ: ctz t0, t1
# CHECK-ASM: encoding: [0x93,0x12,0x13,0x60]
ctz t0, t1
# CHECK-ASM-AND-OBJ: cpop t0, t1
# CHECK-ASM: encoding: [0x93,0x12,0x23,0x60]
cpop t0, t1
# CHECK-ASM-AND-OBJ: sext.b t0, t1
# CHECK-ASM: encoding: [0x93,0x12,0x43,0x60]
sext.b t0, t1
# CHECK-ASM-AND-OBJ: sext.h t0, t1
# CHECK-ASM: encoding: [0x93,0x12,0x53,0x60]
sext.h t0, t1
# CHECK-ASM-AND-OBJ: min t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x42,0x73,0x0a]
min t0, t1, t2
# CHECK-ASM-AND-OBJ: minu t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x52,0x73,0x0a]
minu t0, t1, t2
# CHECK-ASM-AND-OBJ: max t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x62,0x73,0x0a]
max t0, t1, t2
# CHECK-ASM-AND-OBJ: maxu t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x72,0x73,0x0a]
maxu t0, t1, t2
# CHECK-ASM-AND-OBJ: clzw t0, t1
# CHECK-ASM: encoding: [0x9b,0x12,0x03,0x60]
clzw t0, t1

21
test/MC/RISCV/rv64zbbp-valid.s
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@ -19,6 +19,27 @@
# RUN: | llvm-objdump --mattr=+experimental-zbp -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# CHECK-ASM-AND-OBJ: andn t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x72,0x73,0x40]
andn t0, t1, t2
# CHECK-ASM-AND-OBJ: orn t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x62,0x73,0x40]
orn t0, t1, t2
# CHECK-ASM-AND-OBJ: xnor t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x42,0x73,0x40]
xnor t0, t1, t2
# CHECK-ASM-AND-OBJ: rol t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x12,0x73,0x60]
rol t0, t1, t2
# CHECK-ASM-AND-OBJ: ror t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x52,0x73,0x60]
ror t0, t1, t2
# CHECK-ASM-AND-OBJ: rori t0, t1, 31
# CHECK-ASM: encoding: [0x93,0x52,0xf3,0x61]
rori t0, t1, 31
# CHECK-ASM-AND-OBJ: rori t0, t1, 0
# CHECK-ASM: encoding: [0x93,0x52,0x03,0x60]
rori t0, t1, 0
# CHECK-ASM-AND-OBJ: rolw t0, t1, t2
# CHECK-ASM: encoding: [0xbb,0x12,0x73,0x60]
rolw t0, t1, t2

23
test/MC/RISCV/rv64zbc-valid.s Normal file
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@ -0,0 +1,23 @@
# With B extension:
# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-b -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-b < %s \
# RUN: | llvm-objdump --mattr=+experimental-b -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# With Bitmanip carry-less multiply extension:
# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zbc -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zbc < %s \
# RUN: | llvm-objdump --mattr=+experimental-zbc -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# CHECK-ASM-AND-OBJ: clmul t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x12,0x73,0x0a]
clmul t0, t1, t2
# CHECK-ASM-AND-OBJ: clmulr t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x22,0x73,0x0a]
clmulr t0, t1, t2
# CHECK-ASM-AND-OBJ: clmulh t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x32,0x73,0x0a]
clmulh t0, t1, t2

6
test/MC/RISCV/rv64zbe-valid.s
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@ -12,6 +12,12 @@
# RUN: | llvm-objdump --mattr=+experimental-zbe -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# CHECK-ASM-AND-OBJ: bdecompress t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x62,0x73,0x48]
bdecompress t0, t1, t2
# CHECK-ASM-AND-OBJ: bcompress t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x62,0x73,0x08]
bcompress t0, t1, t2
# CHECK-ASM-AND-OBJ: bdecompressw t0, t1, t2
# CHECK-ASM: encoding: [0xbb,0x62,0x73,0x48]
bdecompressw t0, t1, t2

3
test/MC/RISCV/rv64zbf-valid.s
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@ -12,6 +12,9 @@
# RUN: | llvm-objdump --mattr=+experimental-zbf -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# CHECK-ASM-AND-OBJ: bfp t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x72,0x73,0x48]
bfp t0, t1, t2
# CHECK-ASM-AND-OBJ: bfpw t0, t1, t2
# CHECK-ASM: encoding: [0xbb,0x72,0x73,0x48]
bfpw t0, t1, t2

54
test/MC/RISCV/rv64zbp-valid.s
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@ -12,6 +12,51 @@
# RUN: | llvm-objdump --mattr=+experimental-zbp -d -r - \
# RUN: | FileCheck --check-prefixes=CHECK-OBJ,CHECK-ASM-AND-OBJ %s
# CHECK-ASM-AND-OBJ: slo t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x12,0x73,0x20]
slo t0, t1, t2
# CHECK-ASM-AND-OBJ: sro t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x52,0x73,0x20]
sro t0, t1, t2
# CHECK-ASM-AND-OBJ: sloi t0, t1, 0
# CHECK-ASM: encoding: [0x93,0x12,0x03,0x20]
sloi t0, t1, 0
# CHECK-ASM-AND-OBJ: sroi t0, t1, 0
# CHECK-ASM: encoding: [0x93,0x52,0x03,0x20]
sroi t0, t1, 0
# CHECK-ASM-AND-OBJ: gorc t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x52,0x73,0x28]
gorc t0, t1, t2
# CHECK-ASM-AND-OBJ: grev t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x52,0x73,0x68]
grev t0, t1, t2
# CHECK-ASM-AND-OBJ: gorci t0, t1, 0
# CHECK-ASM: encoding: [0x93,0x52,0x03,0x28]
gorci t0, t1, 0
# CHECK-ASM-AND-OBJ: grevi t0, t1, 0
# CHECK-ASM: encoding: [0x93,0x52,0x03,0x68]
grevi t0, t1, 0
# CHECK-ASM-AND-OBJ: shfl t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x12,0x73,0x08]
shfl t0, t1, t2
# CHECK-ASM-AND-OBJ: unshfl t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x52,0x73,0x08]
unshfl t0, t1, t2
# CHECK-ASM-AND-OBJ: shfli t0, t1, 0
# CHECK-ASM: encoding: [0x93,0x12,0x03,0x08]
shfli t0, t1, 0
# CHECK-ASM-AND-OBJ: unshfli t0, t1, 0
# CHECK-ASM: encoding: [0x93,0x52,0x03,0x08]
unshfli t0, t1, 0
# CHECK-ASM-AND-OBJ: pack t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x42,0x73,0x08]
pack t0, t1, t2
# CHECK-ASM-AND-OBJ: packu t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x42,0x73,0x48]
packu t0, t1, t2
# CHECK-ASM-AND-OBJ: packh t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x72,0x73,0x08]
packh t0, t1, t2
# CHECK-ASM-AND-OBJ: slow t0, t1, t2
# CHECK-ASM: encoding: [0xbb,0x12,0x73,0x20]
slow t0, t1, t2
@ -69,6 +114,15 @@ orc.b t0, t1
# CHECK-OBJ: orc.b t0, t1
# CHECK-ASM: encoding: [0x93,0x52,0x73,0x28]
gorci t0, t1, 7
# CHECK-ASM-AND-OBJ: xperm.n t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x22,0x73,0x28]
xperm.n t0, t1, t2
# CHECK-ASM-AND-OBJ: xperm.b t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x42,0x73,0x28]
xperm.b t0, t1, t2
# CHECK-ASM-AND-OBJ: xperm.h t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x62,0x73,0x28
xperm.h t0, t1, t2
# CHECK-ASM-AND-OBJ: xperm.w t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x02,0x73,0x28]
xperm.w t0, t1, t2

6
test/MC/RISCV/rv64zbproposedc-valid.s
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@ -5,6 +5,12 @@
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# CHECK-ASM-AND-OBJ: c.not s0
# CHECK-ASM: encoding: [0x01,0x60]
c.not s0
# CHECK-ASM-AND-OBJ: c.neg s0
# CHECK-ASM: encoding: [0x01,0x64]
c.neg s0
# CHECK-ASM-AND-OBJ: c.zext.w s0
# CHECK-ASM: encoding: [0x01,0x68]
c.zext.w s0

18
test/MC/RISCV/rv64zbr-valid.s
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@ -12,6 +12,24 @@
# RUN: | llvm-objdump --mattr=+experimental-zbr -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# CHECK-ASM-AND-OBJ: crc32.b t0, t1
# CHECK-ASM: encoding: [0x93,0x12,0x03,0x61]
crc32.b t0, t1
# CHECK-ASM-AND-OBJ: crc32.h t0, t1
# CHECK-ASM: encoding: [0x93,0x12,0x13,0x61]
crc32.h t0, t1
# CHECK-ASM-AND-OBJ: crc32.w t0, t1
# CHECK-ASM: encoding: [0x93,0x12,0x23,0x61]
crc32.w t0, t1
# CHECK-ASM-AND-OBJ: crc32c.b t0, t1
# CHECK-ASM: encoding: [0x93,0x12,0x83,0x61]
crc32c.b t0, t1
# CHECK-ASM-AND-OBJ: crc32c.h t0, t1
# CHECK-ASM: encoding: [0x93,0x12,0x93,0x61]
crc32c.h t0, t1
# CHECK-ASM-AND-OBJ: crc32c.w t0, t1
# CHECK-ASM: encoding: [0x93,0x12,0xa3,0x61]
crc32c.w t0, t1
# CHECK-ASM-AND-OBJ: crc32.d t0, t1
# CHECK-ASM: encoding: [0x93,0x12,0x33,0x61]
crc32.d t0, t1

24
test/MC/RISCV/rv64zbs-valid.s
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@ -12,6 +12,30 @@
# RUN: | llvm-objdump --mattr=+experimental-zbs -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# CHECK-ASM-AND-OBJ: bclr t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x12,0x73,0x48]
bclr t0, t1, t2
# CHECK-ASM-AND-OBJ: bset t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x12,0x73,0x28]
bset t0, t1, t2
# CHECK-ASM-AND-OBJ: binv t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x12,0x73,0x68]
binv t0, t1, t2
# CHECK-ASM-AND-OBJ: bext t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x52,0x73,0x48]
bext t0, t1, t2
# CHECK-ASM-AND-OBJ: bclri t0, t1, 1
# CHECK-ASM: encoding: [0x93,0x12,0x13,0x48]
bclri t0, t1, 1
# CHECK-ASM-AND-OBJ: bseti t0, t1, 1
# CHECK-ASM: encoding: [0x93,0x12,0x13,0x28]
bseti t0, t1, 1
# CHECK-ASM-AND-OBJ: binvi t0, t1, 1
# CHECK-ASM: encoding: [0x93,0x12,0x13,0x68]
binvi t0, t1, 1
# CHECK-ASM-AND-OBJ: bexti t0, t1, 1
# CHECK-ASM: encoding: [0x93,0x52,0x13,0x48]
bexti t0, t1, 1
# CHECK-ASM-AND-OBJ: bclrw t0, t1, t2
# CHECK-ASM: encoding: [0xbb,0x12,0x73,0x48]
bclrw t0, t1, t2

15
test/MC/RISCV/rv64zbt-valid.s
View File

@ -12,6 +12,21 @@
# RUN: | llvm-objdump --mattr=+experimental-zbt -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# CHECK-ASM-AND-OBJ: cmix t0, t1, t2, t3
# CHECK-ASM: encoding: [0xb3,0x92,0x63,0xe6]
cmix t0, t1, t2, t3
# CHECK-ASM-AND-OBJ: cmov t0, t1, t2, t3
# CHECK-ASM: encoding: [0xb3,0xd2,0x63,0xe6]
cmov t0, t1, t2, t3
# CHECK-ASM-AND-OBJ: fsl t0, t1, t2, t3
# CHECK-ASM: encoding: [0xb3,0x12,0xc3,0x3d]
fsl t0, t1, t2, t3
# CHECK-ASM-AND-OBJ: fsr t0, t1, t2, t3
# CHECK-ASM: encoding: [0xb3,0x52,0xc3,0x3d]
fsr t0, t1, t2, t3
# CHECK-ASM-AND-OBJ: fsri t0, t1, t2, 0
# CHECK-ASM: encoding: [0x93,0x52,0x03,0x3c]
fsri t0, t1, t2, 0
# CHECK-ASM-AND-OBJ: fslw t0, t1, t2, t3
# CHECK-ASM: encoding: [0xbb,0x12,0xc3,0x3d]
fslw t0, t1, t2, t3