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[RISCV] Lower llvm.trap and llvm.debugtrap

Summary:
Until this commit, these have lowered to a call to abort().

`llvm.trap()` now lowers to `unimp`, which should trap on all systems.

`llvm.debugtrap()` now lowers to `ebreak`, which is exactly what this
instruction is for.

Reviewers: asb, luismarques

Reviewed By: asb

Subscribers: hiraditya, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, pzheng, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69390
This commit is contained in:
Sam Elliott 2019-10-28 09:52:21 +00:00
parent 8cadee3a88
commit 3627daccde
3 changed files with 51 additions and 0 deletions

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@ -193,6 +193,9 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
setOperationAction(ISD::READCYCLECOUNTER, MVT::i64,
Subtarget.is64Bit() ? Legal : Custom);
setOperationAction(ISD::TRAP, MVT::Other, Legal);
setOperationAction(ISD::DEBUGTRAP, MVT::Other, Legal);
if (Subtarget.hasStdExtA()) {
setMaxAtomicSizeInBitsSupported(Subtarget.getXLen());
setMinCmpXchgSizeInBits(32);

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@ -1097,6 +1097,16 @@ let Predicates = [IsRV32], usesCustomInserter = 1, hasSideEffects = 0,
mayLoad = 0, mayStore = 0, hasNoSchedulingInfo = 1 in
def ReadCycleWide : Pseudo<(outs GPR:$lo, GPR:$hi), (ins), [], "", "">;
/// traps
// We lower `trap` to `unimp`, as this causes a hard exception on nearly all
// systems.
def : Pat<(trap), (UNIMP)>;
// We lower `debugtrap` to `ebreak`, as this will get the attention of the
// debugger if possible.
def : Pat<(debugtrap), (EBREAK)>;
//===----------------------------------------------------------------------===//
// Standard extensions
//===----------------------------------------------------------------------===//

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@ -0,0 +1,38 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
; RUN: | FileCheck -check-prefix=RV32I %s
; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
; RUN: | FileCheck -check-prefix=RV64I %s
; Verify that we lower @llvm.trap() and @llvm.debugtrap() correctly.
declare void @llvm.trap()
declare void @llvm.debugtrap()
define void @test_trap() nounwind {
; RV32I-LABEL: test_trap:
; RV32I: # %bb.0:
; RV32I-NEXT: unimp
; RV32I-NEXT: ret
;
; RV64I-LABEL: test_trap:
; RV64I: # %bb.0:
; RV64I-NEXT: unimp
; RV64I-NEXT: ret
tail call void @llvm.trap()
ret void
}
define void @test_debugtrap() nounwind {
; RV32I-LABEL: test_debugtrap:
; RV32I: # %bb.0:
; RV32I-NEXT: ebreak
; RV32I-NEXT: ret
;
; RV64I-LABEL: test_debugtrap:
; RV64I: # %bb.0:
; RV64I-NEXT: ebreak
; RV64I-NEXT: ret
tail call void @llvm.debugtrap()
ret void
}