diff --git a/lib/Target/X86/X86MCInstLower.cpp b/lib/Target/X86/X86MCInstLower.cpp index 86495f16c3a..2816f8c62bf 100644 --- a/lib/Target/X86/X86MCInstLower.cpp +++ b/lib/Target/X86/X86MCInstLower.cpp @@ -1499,7 +1499,8 @@ static void printConstant(const APInt &Val, raw_ostream &CS) { static void printConstant(const APFloat &Flt, raw_ostream &CS) { SmallString<32> Str; - Flt.toString(Str); + // Force scientific notation to distinquish from integers. + Flt.toString(Str, 0, 0); CS << Str; } diff --git a/test/CodeGen/X86/2011-10-19-widen_vselect.ll b/test/CodeGen/X86/2011-10-19-widen_vselect.ll index d09abf5fbb1..44d9569bc57 100644 --- a/test/CodeGen/X86/2011-10-19-widen_vselect.ll +++ b/test/CodeGen/X86/2011-10-19-widen_vselect.ll @@ -72,7 +72,7 @@ define void @full_test() { ; X32-NEXT: cvtdq2ps %xmm0, %xmm1 ; X32-NEXT: xorps %xmm0, %xmm0 ; X32-NEXT: cmpltps %xmm2, %xmm0 -; X32-NEXT: movaps {{.*#+}} xmm3 = <1,1,u,u> +; X32-NEXT: movaps {{.*#+}} xmm3 = <1.0E+0,1.0E+0,u,u> ; X32-NEXT: addps %xmm1, %xmm3 ; X32-NEXT: movaps %xmm1, %xmm4 ; X32-NEXT: blendvps %xmm0, %xmm3, %xmm4 @@ -92,7 +92,7 @@ define void @full_test() { ; X64-NEXT: cvtdq2ps %xmm0, %xmm1 ; X64-NEXT: xorps %xmm0, %xmm0 ; X64-NEXT: cmpltps %xmm2, %xmm0 -; X64-NEXT: movaps {{.*#+}} xmm3 = <1,1,u,u> +; X64-NEXT: movaps {{.*#+}} xmm3 = <1.0E+0,1.0E+0,u,u> ; X64-NEXT: addps %xmm1, %xmm3 ; X64-NEXT: movaps %xmm1, %xmm4 ; X64-NEXT: blendvps %xmm0, %xmm3, %xmm4 diff --git a/test/CodeGen/X86/2011-20-21-zext-ui2fp.ll b/test/CodeGen/X86/2011-20-21-zext-ui2fp.ll index 1b80dc9b1d2..ad3a17071d5 100644 --- a/test/CodeGen/X86/2011-20-21-zext-ui2fp.ll +++ b/test/CodeGen/X86/2011-20-21-zext-ui2fp.ll @@ -7,7 +7,7 @@ define void @ui_to_fp_conv(<8 x float> * nocapture %aFOO, <8 x float>* nocapture %RET) nounwind { ; CHECK-LABEL: ui_to_fp_conv: ; CHECK: # %bb.0: # %allocas -; CHECK-NEXT: movaps {{.*#+}} xmm0 = [1,1,0,0] +; CHECK-NEXT: movaps {{.*#+}} xmm0 = [1.0E+0,1.0E+0,0.0E+0,0.0E+0] ; CHECK-NEXT: xorps %xmm1, %xmm1 ; CHECK-NEXT: movups %xmm1, 16(%rsi) ; CHECK-NEXT: movups %xmm0, (%rsi) diff --git a/test/CodeGen/X86/avx-basic.ll b/test/CodeGen/X86/avx-basic.ll index 80bbf29c1c5..b85fd4e6482 100644 --- a/test/CodeGen/X86/avx-basic.ll +++ b/test/CodeGen/X86/avx-basic.ll @@ -92,7 +92,7 @@ define <8 x i32> @VMOVZQI2PQI([0 x float]* nocapture %aFOO) nounwind { define <16 x float> @fneg(<16 x float> %a) nounwind { ; CHECK-LABEL: fneg: ; CHECK: ## %bb.0: -; CHECK-NEXT: vmovaps {{.*#+}} ymm2 = [-0,-0,-0,-0,-0,-0,-0,-0] +; CHECK-NEXT: vmovaps {{.*#+}} ymm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; CHECK-NEXT: vxorps %ymm2, %ymm0, %ymm0 ; CHECK-NEXT: vxorps %ymm2, %ymm1, %ymm1 ; CHECK-NEXT: retq diff --git a/test/CodeGen/X86/avx-vbroadcast.ll b/test/CodeGen/X86/avx-vbroadcast.ll index 5686e3abc97..b136c72366e 100644 --- a/test/CodeGen/X86/avx-vbroadcast.ll +++ b/test/CodeGen/X86/avx-vbroadcast.ll @@ -316,12 +316,12 @@ entry: define <4 x float> @_e2(float* %ptr) nounwind uwtable readnone ssp { ; X32-LABEL: _e2: ; X32: ## %bb.0: ## %entry -; X32-NEXT: vmovaps {{.*#+}} xmm0 = [-0.0078125,-0.0078125,-0.0078125,-0.0078125] +; X32-NEXT: vmovaps {{.*#+}} xmm0 = [-7.8125E-3,-7.8125E-3,-7.8125E-3,-7.8125E-3] ; X32-NEXT: retl ; ; X64-LABEL: _e2: ; X64: ## %bb.0: ## %entry -; X64-NEXT: vmovaps {{.*#+}} xmm0 = [-0.0078125,-0.0078125,-0.0078125,-0.0078125] +; X64-NEXT: vmovaps {{.*#+}} xmm0 = [-7.8125E-3,-7.8125E-3,-7.8125E-3,-7.8125E-3] ; X64-NEXT: retq entry: %vecinit.i = insertelement <4 x float> undef, float 0xbf80000000000000, i32 0 diff --git a/test/CodeGen/X86/avx-vperm2x128.ll b/test/CodeGen/X86/avx-vperm2x128.ll index 0c501ea6895..f470c97e472 100644 --- a/test/CodeGen/X86/avx-vperm2x128.ll +++ b/test/CodeGen/X86/avx-vperm2x128.ll @@ -532,7 +532,7 @@ define <4 x double> @ld0_hi0_lo1_4f64(<4 x double> * %pa, <4 x double> %b) nounw ; AVX2-LABEL: ld0_hi0_lo1_4f64: ; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vperm2f128 {{.*#+}} ymm0 = mem[2,3],ymm0[0,1] -; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm1 = [1,1,1,1] +; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX2-NEXT: vaddpd %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: retq entry: @@ -552,7 +552,7 @@ define <4 x double> @ld1_hi0_hi1_4f64(<4 x double> %a, <4 x double> * %pb) nounw ; AVX2-LABEL: ld1_hi0_hi1_4f64: ; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3],mem[2,3] -; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm1 = [1,1,1,1] +; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX2-NEXT: vaddpd %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: retq entry: @@ -572,7 +572,7 @@ define <8 x float> @ld0_hi0_lo1_8f32(<8 x float> * %pa, <8 x float> %b) nounwind ; AVX2-LABEL: ld0_hi0_lo1_8f32: ; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vperm2f128 {{.*#+}} ymm0 = mem[2,3],ymm0[0,1] -; AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1] +; AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX2-NEXT: vaddps %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: retq entry: @@ -592,7 +592,7 @@ define <8 x float> @ld1_hi0_hi1_8f32(<8 x float> %a, <8 x float> * %pb) nounwind ; AVX2-LABEL: ld1_hi0_hi1_8f32: ; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3],mem[2,3] -; AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1] +; AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX2-NEXT: vaddps %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: retq entry: diff --git a/test/CodeGen/X86/avx2-fma-fneg-combine.ll b/test/CodeGen/X86/avx2-fma-fneg-combine.ll index 9ef7bcf026c..d9f41539bfe 100644 --- a/test/CodeGen/X86/avx2-fma-fneg-combine.ll +++ b/test/CodeGen/X86/avx2-fma-fneg-combine.ll @@ -44,14 +44,14 @@ define <4 x float> @test3(<4 x float> %a, <4 x float> %b, <4 x float> %c) { ; X32-LABEL: test3: ; X32: # %bb.0: # %entry ; X32-NEXT: vfnmadd213ss {{.*#+}} xmm0 = -(xmm1 * xmm0) + xmm2 -; X32-NEXT: vbroadcastss {{.*#+}} xmm1 = [-0,-0,-0,-0] +; X32-NEXT: vbroadcastss {{.*#+}} xmm1 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; X32-NEXT: vxorps %xmm1, %xmm0, %xmm0 ; X32-NEXT: retl ; ; X64-LABEL: test3: ; X64: # %bb.0: # %entry ; X64-NEXT: vfnmadd213ss {{.*#+}} xmm0 = -(xmm1 * xmm0) + xmm2 -; X64-NEXT: vbroadcastss {{.*#+}} xmm1 = [-0,-0,-0,-0] +; X64-NEXT: vbroadcastss {{.*#+}} xmm1 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; X64-NEXT: vxorps %xmm1, %xmm0, %xmm0 ; X64-NEXT: retq entry: diff --git a/test/CodeGen/X86/avx2-vbroadcast.ll b/test/CodeGen/X86/avx2-vbroadcast.ll index 5d7ac684e54..b333e9109bd 100644 --- a/test/CodeGen/X86/avx2-vbroadcast.ll +++ b/test/CodeGen/X86/avx2-vbroadcast.ll @@ -615,13 +615,13 @@ entry: define <8 x float> @V113(<8 x float> %in) nounwind uwtable readnone ssp { ; X32-AVX2-LABEL: V113: ; X32-AVX2: ## %bb.0: ## %entry -; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-0.0078125,-0.0078125,-0.0078125,-0.0078125,-0.0078125,-0.0078125,-0.0078125,-0.0078125] +; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-7.8125E-3,-7.8125E-3,-7.8125E-3,-7.8125E-3,-7.8125E-3,-7.8125E-3,-7.8125E-3,-7.8125E-3] ; X32-AVX2-NEXT: vaddps %ymm1, %ymm0, %ymm0 ; X32-AVX2-NEXT: retl ; ; X64-AVX2-LABEL: V113: ; X64-AVX2: ## %bb.0: ## %entry -; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-0.0078125,-0.0078125,-0.0078125,-0.0078125,-0.0078125,-0.0078125,-0.0078125,-0.0078125] +; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-7.8125E-3,-7.8125E-3,-7.8125E-3,-7.8125E-3,-7.8125E-3,-7.8125E-3,-7.8125E-3,-7.8125E-3] ; X64-AVX2-NEXT: vaddps %ymm1, %ymm0, %ymm0 ; X64-AVX2-NEXT: retq ; @@ -642,12 +642,12 @@ entry: define <4 x float> @_e2(float* %ptr) nounwind uwtable readnone ssp { ; X32-LABEL: _e2: ; X32: ## %bb.0: -; X32-NEXT: vbroadcastss {{.*#+}} xmm0 = [-0.0078125,-0.0078125,-0.0078125,-0.0078125] +; X32-NEXT: vbroadcastss {{.*#+}} xmm0 = [-7.8125E-3,-7.8125E-3,-7.8125E-3,-7.8125E-3] ; X32-NEXT: retl ; ; X64-LABEL: _e2: ; X64: ## %bb.0: -; X64-NEXT: vbroadcastss {{.*#+}} xmm0 = [-0.0078125,-0.0078125,-0.0078125,-0.0078125] +; X64-NEXT: vbroadcastss {{.*#+}} xmm0 = [-7.8125E-3,-7.8125E-3,-7.8125E-3,-7.8125E-3] ; X64-NEXT: retq %vecinit.i = insertelement <4 x float> undef, float 0xbf80000000000000, i32 0 %vecinit2.i = insertelement <4 x float> %vecinit.i, float 0xbf80000000000000, i32 1 diff --git a/test/CodeGen/X86/avx512-arith.ll b/test/CodeGen/X86/avx512-arith.ll index 6bc69213d42..29793a7e0bc 100644 --- a/test/CodeGen/X86/avx512-arith.ll +++ b/test/CodeGen/X86/avx512-arith.ll @@ -969,7 +969,7 @@ define <16 x float> @test_fxor(<16 x float> %a) { define <8 x float> @test_fxor_8f32(<8 x float> %a) { ; AVX512F-LABEL: test_fxor_8f32: ; AVX512F: # %bb.0: -; AVX512F-NEXT: vbroadcastss {{.*#+}} ymm1 = [-0,-0,-0,-0,-0,-0,-0,-0] +; AVX512F-NEXT: vbroadcastss {{.*#+}} ymm1 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; AVX512F-NEXT: vxorps %ymm1, %ymm0, %ymm0 ; AVX512F-NEXT: retq ; @@ -980,13 +980,13 @@ define <8 x float> @test_fxor_8f32(<8 x float> %a) { ; ; AVX512BW-LABEL: test_fxor_8f32: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vbroadcastss {{.*#+}} ymm1 = [-0,-0,-0,-0,-0,-0,-0,-0] +; AVX512BW-NEXT: vbroadcastss {{.*#+}} ymm1 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; AVX512BW-NEXT: vxorps %ymm1, %ymm0, %ymm0 ; AVX512BW-NEXT: retq ; ; AVX512DQ-LABEL: test_fxor_8f32: ; AVX512DQ: # %bb.0: -; AVX512DQ-NEXT: vbroadcastss {{.*#+}} ymm1 = [-0,-0,-0,-0,-0,-0,-0,-0] +; AVX512DQ-NEXT: vbroadcastss {{.*#+}} ymm1 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; AVX512DQ-NEXT: vxorps %ymm1, %ymm0, %ymm0 ; AVX512DQ-NEXT: retq ; diff --git a/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll b/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll index d888ea4ac44..e04d8e31944 100644 --- a/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll +++ b/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll @@ -3156,7 +3156,7 @@ entry: define <8 x double> @test_mm512_fnmsub_round_pd(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C) { ; CHECK-LABEL: test_mm512_fnmsub_round_pd: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: vpbroadcastq {{.*#+}} zmm3 = [-0,-0,-0,-0,-0,-0,-0,-0] +; CHECK-NEXT: vpbroadcastq {{.*#+}} zmm3 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; CHECK-NEXT: vpxorq %zmm3, %zmm0, %zmm4 ; CHECK-NEXT: vpxorq %zmm3, %zmm2, %zmm0 ; CHECK-NEXT: vfmadd231pd {rn-sae}, %zmm4, %zmm1, %zmm0 @@ -3387,7 +3387,7 @@ entry: define <8 x double> @test_mm512_fnmsub_pd(<8 x double> %__A, <8 x double> %__B, <8 x double> %__C) { ; CHECK-LABEL: test_mm512_fnmsub_pd: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: vpbroadcastq {{.*#+}} zmm3 = [-0,-0,-0,-0,-0,-0,-0,-0] +; CHECK-NEXT: vpbroadcastq {{.*#+}} zmm3 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; CHECK-NEXT: vpxorq %zmm3, %zmm0, %zmm4 ; CHECK-NEXT: vpxorq %zmm3, %zmm2, %zmm0 ; CHECK-NEXT: vfmadd231pd {{.*#+}} zmm0 = (zmm1 * zmm4) + zmm0 @@ -3613,7 +3613,7 @@ entry: define <16 x float> @test_mm512_fnmsub_round_ps(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C) { ; CHECK-LABEL: test_mm512_fnmsub_round_ps: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: vpbroadcastd {{.*#+}} zmm3 = [-0,-0,-0,-0,-0,-0,-0,-0,-0,-0,-0,-0,-0,-0,-0,-0] +; CHECK-NEXT: vpbroadcastd {{.*#+}} zmm3 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; CHECK-NEXT: vpxord %zmm3, %zmm0, %zmm4 ; CHECK-NEXT: vpxord %zmm3, %zmm2, %zmm0 ; CHECK-NEXT: vfmadd231ps {rn-sae}, %zmm4, %zmm1, %zmm0 @@ -3836,7 +3836,7 @@ entry: define <16 x float> @test_mm512_fnmsub_ps(<16 x float> %__A, <16 x float> %__B, <16 x float> %__C) { ; CHECK-LABEL: test_mm512_fnmsub_ps: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: vpbroadcastd {{.*#+}} zmm3 = [-0,-0,-0,-0,-0,-0,-0,-0,-0,-0,-0,-0,-0,-0,-0,-0] +; CHECK-NEXT: vpbroadcastd {{.*#+}} zmm3 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; CHECK-NEXT: vpxord %zmm3, %zmm0, %zmm4 ; CHECK-NEXT: vpxord %zmm3, %zmm2, %zmm0 ; CHECK-NEXT: vfmadd231ps {{.*#+}} zmm0 = (zmm1 * zmm4) + zmm0 @@ -7459,7 +7459,7 @@ define double @test_mm512_mask_reduce_mul_pd(i8 zeroext %__M, <8 x double> %__W) ; X86-NEXT: subl $8, %esp ; X86-NEXT: movb 8(%ebp), %al ; X86-NEXT: kmovw %eax, %k1 -; X86-NEXT: vbroadcastsd {{.*#+}} zmm1 = [1,1,1,1,1,1,1,1] +; X86-NEXT: vbroadcastsd {{.*#+}} zmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; X86-NEXT: vmovapd %zmm0, %zmm1 {%k1} ; X86-NEXT: vextractf64x4 $1, %zmm1, %ymm0 ; X86-NEXT: vmulpd %ymm0, %ymm1, %ymm0 @@ -7478,7 +7478,7 @@ define double @test_mm512_mask_reduce_mul_pd(i8 zeroext %__M, <8 x double> %__W) ; X64-LABEL: test_mm512_mask_reduce_mul_pd: ; X64: # %bb.0: # %entry ; X64-NEXT: kmovw %edi, %k1 -; X64-NEXT: vbroadcastsd {{.*#+}} zmm1 = [1,1,1,1,1,1,1,1] +; X64-NEXT: vbroadcastsd {{.*#+}} zmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; X64-NEXT: vmovapd %zmm0, %zmm1 {%k1} ; X64-NEXT: vextractf64x4 $1, %zmm1, %ymm0 ; X64-NEXT: vmulpd %ymm0, %ymm1, %ymm0 @@ -7565,7 +7565,7 @@ define float @test_mm512_mask_reduce_mul_ps(i16 zeroext %__M, <16 x float> %__W) ; X86-NEXT: pushl %eax ; X86-NEXT: .cfi_def_cfa_offset 8 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 -; X86-NEXT: vbroadcastss {{.*#+}} zmm1 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] +; X86-NEXT: vbroadcastss {{.*#+}} zmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; X86-NEXT: vmovaps %zmm0, %zmm1 {%k1} ; X86-NEXT: vextractf64x4 $1, %zmm1, %ymm0 ; X86-NEXT: vmulps %ymm0, %ymm1, %ymm0 @@ -7585,7 +7585,7 @@ define float @test_mm512_mask_reduce_mul_ps(i16 zeroext %__M, <16 x float> %__W) ; X64-LABEL: test_mm512_mask_reduce_mul_ps: ; X64: # %bb.0: # %entry ; X64-NEXT: kmovw %edi, %k1 -; X64-NEXT: vbroadcastss {{.*#+}} zmm1 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] +; X64-NEXT: vbroadcastss {{.*#+}} zmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; X64-NEXT: vmovaps %zmm0, %zmm1 {%k1} ; X64-NEXT: vextractf64x4 $1, %zmm1, %ymm0 ; X64-NEXT: vmulps %ymm0, %ymm1, %ymm0 diff --git a/test/CodeGen/X86/broadcast-elm-cross-splat-vec.ll b/test/CodeGen/X86/broadcast-elm-cross-splat-vec.ll index 19d3b47a659..353faabba2d 100644 --- a/test/CodeGen/X86/broadcast-elm-cross-splat-vec.ll +++ b/test/CodeGen/X86/broadcast-elm-cross-splat-vec.ll @@ -1600,7 +1600,7 @@ define <8 x i64> @f8xi64_i256(<8 x i64> %a) { define <4 x float> @f4xf32_f64(<4 x float> %a) { ; AVX-LABEL: f4xf32_f64: ; AVX: # %bb.0: -; AVX-NEXT: vmovddup {{.*#+}} xmm1 = [0.0078125018626451492,0.0078125018626451492] +; AVX-NEXT: vmovddup {{.*#+}} xmm1 = [7.8125018626451492E-3,7.8125018626451492E-3] ; AVX-NEXT: # xmm1 = mem[0,0] ; AVX-NEXT: vaddps %xmm1, %xmm0, %xmm0 ; AVX-NEXT: vdivps %xmm0, %xmm1, %xmm0 @@ -1608,7 +1608,7 @@ define <4 x float> @f4xf32_f64(<4 x float> %a) { ; ; ALL32-LABEL: f4xf32_f64: ; ALL32: # %bb.0: -; ALL32-NEXT: vmovddup {{.*#+}} xmm1 = [0.0078125018626451492,0.0078125018626451492] +; ALL32-NEXT: vmovddup {{.*#+}} xmm1 = [7.8125018626451492E-3,7.8125018626451492E-3] ; ALL32-NEXT: # xmm1 = mem[0,0] ; ALL32-NEXT: vaddps %xmm1, %xmm0, %xmm0 ; ALL32-NEXT: vdivps %xmm0, %xmm1, %xmm0 @@ -1616,7 +1616,7 @@ define <4 x float> @f4xf32_f64(<4 x float> %a) { ; ; AVX-64-LABEL: f4xf32_f64: ; AVX-64: # %bb.0: -; AVX-64-NEXT: vmovddup {{.*#+}} xmm1 = [0.0078125018626451492,0.0078125018626451492] +; AVX-64-NEXT: vmovddup {{.*#+}} xmm1 = [7.8125018626451492E-3,7.8125018626451492E-3] ; AVX-64-NEXT: # xmm1 = mem[0,0] ; AVX-64-NEXT: vaddps %xmm1, %xmm0, %xmm0 ; AVX-64-NEXT: vdivps %xmm0, %xmm1, %xmm0 @@ -1637,21 +1637,21 @@ define <4 x float> @f4xf32_f64(<4 x float> %a) { define <8 x float> @f8xf32_f64(<8 x float> %a) { ; AVX-LABEL: f8xf32_f64: ; AVX: # %bb.0: -; AVX-NEXT: vbroadcastsd {{.*#+}} ymm1 = [0.0078125018626451492,0.0078125018626451492,0.0078125018626451492,0.0078125018626451492] +; AVX-NEXT: vbroadcastsd {{.*#+}} ymm1 = [7.8125018626451492E-3,7.8125018626451492E-3,7.8125018626451492E-3,7.8125018626451492E-3] ; AVX-NEXT: vaddps %ymm1, %ymm0, %ymm0 ; AVX-NEXT: vdivps %ymm0, %ymm1, %ymm0 ; AVX-NEXT: retl ; ; ALL32-LABEL: f8xf32_f64: ; ALL32: # %bb.0: -; ALL32-NEXT: vbroadcastsd {{.*#+}} ymm1 = [0.0078125018626451492,0.0078125018626451492,0.0078125018626451492,0.0078125018626451492] +; ALL32-NEXT: vbroadcastsd {{.*#+}} ymm1 = [7.8125018626451492E-3,7.8125018626451492E-3,7.8125018626451492E-3,7.8125018626451492E-3] ; ALL32-NEXT: vaddps %ymm1, %ymm0, %ymm0 ; ALL32-NEXT: vdivps %ymm0, %ymm1, %ymm0 ; ALL32-NEXT: retl ; ; AVX-64-LABEL: f8xf32_f64: ; AVX-64: # %bb.0: -; AVX-64-NEXT: vbroadcastsd {{.*#+}} ymm1 = [0.0078125018626451492,0.0078125018626451492,0.0078125018626451492,0.0078125018626451492] +; AVX-64-NEXT: vbroadcastsd {{.*#+}} ymm1 = [7.8125018626451492E-3,7.8125018626451492E-3,7.8125018626451492E-3,7.8125018626451492E-3] ; AVX-64-NEXT: vaddps %ymm1, %ymm0, %ymm0 ; AVX-64-NEXT: vdivps %ymm0, %ymm1, %ymm0 ; AVX-64-NEXT: retq @@ -1671,7 +1671,7 @@ define <8 x float> @f8xf32_f64(<8 x float> %a) { define <8 x float> @f8xf32_f128(<8 x float> %a) { ; AVX-LABEL: f8xf32_f128: ; AVX: # %bb.0: -; AVX-NEXT: vbroadcastf128 {{.*#+}} ymm1 = [4,1,2,3,4,1,2,3] +; AVX-NEXT: vbroadcastf128 {{.*#+}} ymm1 = [4.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,1.0E+0,2.0E+0,3.0E+0] ; AVX-NEXT: # ymm1 = mem[0,1,0,1] ; AVX-NEXT: vaddps %ymm1, %ymm0, %ymm0 ; AVX-NEXT: vdivps %ymm0, %ymm1, %ymm0 @@ -1679,7 +1679,7 @@ define <8 x float> @f8xf32_f128(<8 x float> %a) { ; ; ALL32-LABEL: f8xf32_f128: ; ALL32: # %bb.0: -; ALL32-NEXT: vbroadcastf128 {{.*#+}} ymm1 = [4,1,2,3,4,1,2,3] +; ALL32-NEXT: vbroadcastf128 {{.*#+}} ymm1 = [4.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,1.0E+0,2.0E+0,3.0E+0] ; ALL32-NEXT: # ymm1 = mem[0,1,0,1] ; ALL32-NEXT: vaddps %ymm1, %ymm0, %ymm0 ; ALL32-NEXT: vdivps %ymm0, %ymm1, %ymm0 @@ -1687,7 +1687,7 @@ define <8 x float> @f8xf32_f128(<8 x float> %a) { ; ; AVX-64-LABEL: f8xf32_f128: ; AVX-64: # %bb.0: -; AVX-64-NEXT: vbroadcastf128 {{.*#+}} ymm1 = [4,1,2,3,4,1,2,3] +; AVX-64-NEXT: vbroadcastf128 {{.*#+}} ymm1 = [4.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,1.0E+0,2.0E+0,3.0E+0] ; AVX-64-NEXT: # ymm1 = mem[0,1,0,1] ; AVX-64-NEXT: vaddps %ymm1, %ymm0, %ymm0 ; AVX-64-NEXT: vdivps %ymm0, %ymm1, %ymm0 @@ -1695,7 +1695,7 @@ define <8 x float> @f8xf32_f128(<8 x float> %a) { ; ; ALL64-LABEL: f8xf32_f128: ; ALL64: # %bb.0: -; ALL64-NEXT: vbroadcastf128 {{.*#+}} ymm1 = [4,1,2,3,4,1,2,3] +; ALL64-NEXT: vbroadcastf128 {{.*#+}} ymm1 = [4.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,1.0E+0,2.0E+0,3.0E+0] ; ALL64-NEXT: # ymm1 = mem[0,1,0,1] ; ALL64-NEXT: vaddps %ymm1, %ymm0, %ymm0 ; ALL64-NEXT: vdivps %ymm0, %ymm1, %ymm0 @@ -1709,7 +1709,7 @@ define <8 x float> @f8xf32_f128(<8 x float> %a) { define <16 x float> @f16xf32_f64(<16 x float> %a) { ; AVX-LABEL: f16xf32_f64: ; AVX: # %bb.0: -; AVX-NEXT: vbroadcastsd {{.*#+}} ymm2 = [0.0078125018626451492,0.0078125018626451492,0.0078125018626451492,0.0078125018626451492] +; AVX-NEXT: vbroadcastsd {{.*#+}} ymm2 = [7.8125018626451492E-3,7.8125018626451492E-3,7.8125018626451492E-3,7.8125018626451492E-3] ; AVX-NEXT: vaddps %ymm2, %ymm1, %ymm1 ; AVX-NEXT: vaddps %ymm2, %ymm0, %ymm0 ; AVX-NEXT: vdivps %ymm0, %ymm2, %ymm0 @@ -1718,7 +1718,7 @@ define <16 x float> @f16xf32_f64(<16 x float> %a) { ; ; AVX2-LABEL: f16xf32_f64: ; AVX2: # %bb.0: -; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm2 = [0.0078125018626451492,0.0078125018626451492,0.0078125018626451492,0.0078125018626451492] +; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm2 = [7.8125018626451492E-3,7.8125018626451492E-3,7.8125018626451492E-3,7.8125018626451492E-3] ; AVX2-NEXT: vaddps %ymm2, %ymm1, %ymm1 ; AVX2-NEXT: vaddps %ymm2, %ymm0, %ymm0 ; AVX2-NEXT: vdivps %ymm0, %ymm2, %ymm0 @@ -1727,14 +1727,14 @@ define <16 x float> @f16xf32_f64(<16 x float> %a) { ; ; AVX512-LABEL: f16xf32_f64: ; AVX512: # %bb.0: -; AVX512-NEXT: vbroadcastsd {{.*#+}} zmm1 = [0.0078125018626451492,0.0078125018626451492,0.0078125018626451492,0.0078125018626451492,0.0078125018626451492,0.0078125018626451492,0.0078125018626451492,0.0078125018626451492] +; AVX512-NEXT: vbroadcastsd {{.*#+}} zmm1 = [7.8125018626451492E-3,7.8125018626451492E-3,7.8125018626451492E-3,7.8125018626451492E-3,7.8125018626451492E-3,7.8125018626451492E-3,7.8125018626451492E-3,7.8125018626451492E-3] ; AVX512-NEXT: vaddps %zmm1, %zmm0, %zmm0 ; AVX512-NEXT: vdivps %zmm0, %zmm1, %zmm0 ; AVX512-NEXT: retl ; ; AVX-64-LABEL: f16xf32_f64: ; AVX-64: # %bb.0: -; AVX-64-NEXT: vbroadcastsd {{.*#+}} ymm2 = [0.0078125018626451492,0.0078125018626451492,0.0078125018626451492,0.0078125018626451492] +; AVX-64-NEXT: vbroadcastsd {{.*#+}} ymm2 = [7.8125018626451492E-3,7.8125018626451492E-3,7.8125018626451492E-3,7.8125018626451492E-3] ; AVX-64-NEXT: vaddps %ymm2, %ymm1, %ymm1 ; AVX-64-NEXT: vaddps %ymm2, %ymm0, %ymm0 ; AVX-64-NEXT: vdivps %ymm0, %ymm2, %ymm0 @@ -1765,7 +1765,7 @@ define <16 x float> @f16xf32_f64(<16 x float> %a) { define <16 x float> @f16xf32_f128(<16 x float> %a) { ; AVX-LABEL: f16xf32_f128: ; AVX: # %bb.0: -; AVX-NEXT: vbroadcastf128 {{.*#+}} ymm2 = [4,1,2,3,4,1,2,3] +; AVX-NEXT: vbroadcastf128 {{.*#+}} ymm2 = [4.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,1.0E+0,2.0E+0,3.0E+0] ; AVX-NEXT: # ymm2 = mem[0,1,0,1] ; AVX-NEXT: vaddps %ymm2, %ymm1, %ymm1 ; AVX-NEXT: vaddps %ymm2, %ymm0, %ymm0 @@ -1775,7 +1775,7 @@ define <16 x float> @f16xf32_f128(<16 x float> %a) { ; ; AVX2-LABEL: f16xf32_f128: ; AVX2: # %bb.0: -; AVX2-NEXT: vbroadcastf128 {{.*#+}} ymm2 = [4,1,2,3,4,1,2,3] +; AVX2-NEXT: vbroadcastf128 {{.*#+}} ymm2 = [4.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,1.0E+0,2.0E+0,3.0E+0] ; AVX2-NEXT: # ymm2 = mem[0,1,0,1] ; AVX2-NEXT: vaddps %ymm2, %ymm1, %ymm1 ; AVX2-NEXT: vaddps %ymm2, %ymm0, %ymm0 @@ -1785,7 +1785,7 @@ define <16 x float> @f16xf32_f128(<16 x float> %a) { ; ; AVX512-LABEL: f16xf32_f128: ; AVX512: # %bb.0: -; AVX512-NEXT: vbroadcastf32x4 {{.*#+}} zmm1 = [4,1,2,3,4,1,2,3,4,1,2,3,4,1,2,3] +; AVX512-NEXT: vbroadcastf32x4 {{.*#+}} zmm1 = [4.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,1.0E+0,2.0E+0,3.0E+0] ; AVX512-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3] ; AVX512-NEXT: vaddps %zmm1, %zmm0, %zmm0 ; AVX512-NEXT: vdivps %zmm0, %zmm1, %zmm0 @@ -1793,7 +1793,7 @@ define <16 x float> @f16xf32_f128(<16 x float> %a) { ; ; AVX-64-LABEL: f16xf32_f128: ; AVX-64: # %bb.0: -; AVX-64-NEXT: vbroadcastf128 {{.*#+}} ymm2 = [4,1,2,3,4,1,2,3] +; AVX-64-NEXT: vbroadcastf128 {{.*#+}} ymm2 = [4.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,1.0E+0,2.0E+0,3.0E+0] ; AVX-64-NEXT: # ymm2 = mem[0,1,0,1] ; AVX-64-NEXT: vaddps %ymm2, %ymm1, %ymm1 ; AVX-64-NEXT: vaddps %ymm2, %ymm0, %ymm0 @@ -1803,7 +1803,7 @@ define <16 x float> @f16xf32_f128(<16 x float> %a) { ; ; AVX2-64-LABEL: f16xf32_f128: ; AVX2-64: # %bb.0: -; AVX2-64-NEXT: vbroadcastf128 {{.*#+}} ymm2 = [4,1,2,3,4,1,2,3] +; AVX2-64-NEXT: vbroadcastf128 {{.*#+}} ymm2 = [4.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,1.0E+0,2.0E+0,3.0E+0] ; AVX2-64-NEXT: # ymm2 = mem[0,1,0,1] ; AVX2-64-NEXT: vaddps %ymm2, %ymm1, %ymm1 ; AVX2-64-NEXT: vaddps %ymm2, %ymm0, %ymm0 @@ -1813,7 +1813,7 @@ define <16 x float> @f16xf32_f128(<16 x float> %a) { ; ; AVX512F-64-LABEL: f16xf32_f128: ; AVX512F-64: # %bb.0: -; AVX512F-64-NEXT: vbroadcastf32x4 {{.*#+}} zmm1 = [4,1,2,3,4,1,2,3,4,1,2,3,4,1,2,3] +; AVX512F-64-NEXT: vbroadcastf32x4 {{.*#+}} zmm1 = [4.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,1.0E+0,2.0E+0,3.0E+0] ; AVX512F-64-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3] ; AVX512F-64-NEXT: vaddps %zmm1, %zmm0, %zmm0 ; AVX512F-64-NEXT: vdivps %zmm0, %zmm1, %zmm0 @@ -1827,7 +1827,7 @@ define <16 x float> @f16xf32_f128(<16 x float> %a) { define <16 x float> @f16xf32_f256(<16 x float> %a) { ; AVX-LABEL: f16xf32_f256: ; AVX: # %bb.0: -; AVX-NEXT: vmovaps {{.*#+}} ymm2 = [8,1,2,3,4,5,6,7] +; AVX-NEXT: vmovaps {{.*#+}} ymm2 = [8.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,5.0E+0,6.0E+0,7.0E+0] ; AVX-NEXT: vaddps %ymm2, %ymm1, %ymm1 ; AVX-NEXT: vaddps %ymm2, %ymm0, %ymm0 ; AVX-NEXT: vdivps %ymm0, %ymm2, %ymm0 @@ -1836,7 +1836,7 @@ define <16 x float> @f16xf32_f256(<16 x float> %a) { ; ; AVX2-LABEL: f16xf32_f256: ; AVX2: # %bb.0: -; AVX2-NEXT: vmovaps {{.*#+}} ymm2 = [8,1,2,3,4,5,6,7] +; AVX2-NEXT: vmovaps {{.*#+}} ymm2 = [8.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,5.0E+0,6.0E+0,7.0E+0] ; AVX2-NEXT: vaddps %ymm2, %ymm1, %ymm1 ; AVX2-NEXT: vaddps %ymm2, %ymm0, %ymm0 ; AVX2-NEXT: vdivps %ymm0, %ymm2, %ymm0 @@ -1845,7 +1845,7 @@ define <16 x float> @f16xf32_f256(<16 x float> %a) { ; ; AVX512-LABEL: f16xf32_f256: ; AVX512: # %bb.0: -; AVX512-NEXT: vbroadcastf64x4 {{.*#+}} zmm1 = [8,1,2,3,4,5,6,7,8,1,2,3,4,5,6,7] +; AVX512-NEXT: vbroadcastf64x4 {{.*#+}} zmm1 = [8.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,5.0E+0,6.0E+0,7.0E+0,8.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,5.0E+0,6.0E+0,7.0E+0] ; AVX512-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3] ; AVX512-NEXT: vaddps %zmm1, %zmm0, %zmm0 ; AVX512-NEXT: vdivps %zmm0, %zmm1, %zmm0 @@ -1853,7 +1853,7 @@ define <16 x float> @f16xf32_f256(<16 x float> %a) { ; ; AVX-64-LABEL: f16xf32_f256: ; AVX-64: # %bb.0: -; AVX-64-NEXT: vmovaps {{.*#+}} ymm2 = [8,1,2,3,4,5,6,7] +; AVX-64-NEXT: vmovaps {{.*#+}} ymm2 = [8.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,5.0E+0,6.0E+0,7.0E+0] ; AVX-64-NEXT: vaddps %ymm2, %ymm1, %ymm1 ; AVX-64-NEXT: vaddps %ymm2, %ymm0, %ymm0 ; AVX-64-NEXT: vdivps %ymm0, %ymm2, %ymm0 @@ -1862,7 +1862,7 @@ define <16 x float> @f16xf32_f256(<16 x float> %a) { ; ; AVX2-64-LABEL: f16xf32_f256: ; AVX2-64: # %bb.0: -; AVX2-64-NEXT: vmovaps {{.*#+}} ymm2 = [8,1,2,3,4,5,6,7] +; AVX2-64-NEXT: vmovaps {{.*#+}} ymm2 = [8.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,5.0E+0,6.0E+0,7.0E+0] ; AVX2-64-NEXT: vaddps %ymm2, %ymm1, %ymm1 ; AVX2-64-NEXT: vaddps %ymm2, %ymm0, %ymm0 ; AVX2-64-NEXT: vdivps %ymm0, %ymm2, %ymm0 @@ -1871,7 +1871,7 @@ define <16 x float> @f16xf32_f256(<16 x float> %a) { ; ; AVX512F-64-LABEL: f16xf32_f256: ; AVX512F-64: # %bb.0: -; AVX512F-64-NEXT: vbroadcastf64x4 {{.*#+}} zmm1 = [8,1,2,3,4,5,6,7,8,1,2,3,4,5,6,7] +; AVX512F-64-NEXT: vbroadcastf64x4 {{.*#+}} zmm1 = [8.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,5.0E+0,6.0E+0,7.0E+0,8.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,5.0E+0,6.0E+0,7.0E+0] ; AVX512F-64-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3] ; AVX512F-64-NEXT: vaddps %zmm1, %zmm0, %zmm0 ; AVX512F-64-NEXT: vdivps %zmm0, %zmm1, %zmm0 @@ -1885,7 +1885,7 @@ define <16 x float> @f16xf32_f256(<16 x float> %a) { define <4 x double> @f4xf64_f128(<4 x double> %a) { ; AVX-LABEL: f4xf64_f128: ; AVX: # %bb.0: -; AVX-NEXT: vbroadcastf128 {{.*#+}} ymm1 = [2,1,2,1] +; AVX-NEXT: vbroadcastf128 {{.*#+}} ymm1 = [2.0E+0,1.0E+0,2.0E+0,1.0E+0] ; AVX-NEXT: # ymm1 = mem[0,1,0,1] ; AVX-NEXT: vaddpd %ymm1, %ymm0, %ymm0 ; AVX-NEXT: vdivpd %ymm0, %ymm1, %ymm0 @@ -1893,7 +1893,7 @@ define <4 x double> @f4xf64_f128(<4 x double> %a) { ; ; ALL32-LABEL: f4xf64_f128: ; ALL32: # %bb.0: -; ALL32-NEXT: vbroadcastf128 {{.*#+}} ymm1 = [2,1,2,1] +; ALL32-NEXT: vbroadcastf128 {{.*#+}} ymm1 = [2.0E+0,1.0E+0,2.0E+0,1.0E+0] ; ALL32-NEXT: # ymm1 = mem[0,1,0,1] ; ALL32-NEXT: vaddpd %ymm1, %ymm0, %ymm0 ; ALL32-NEXT: vdivpd %ymm0, %ymm1, %ymm0 @@ -1901,7 +1901,7 @@ define <4 x double> @f4xf64_f128(<4 x double> %a) { ; ; AVX-64-LABEL: f4xf64_f128: ; AVX-64: # %bb.0: -; AVX-64-NEXT: vbroadcastf128 {{.*#+}} ymm1 = [2,1,2,1] +; AVX-64-NEXT: vbroadcastf128 {{.*#+}} ymm1 = [2.0E+0,1.0E+0,2.0E+0,1.0E+0] ; AVX-64-NEXT: # ymm1 = mem[0,1,0,1] ; AVX-64-NEXT: vaddpd %ymm1, %ymm0, %ymm0 ; AVX-64-NEXT: vdivpd %ymm0, %ymm1, %ymm0 @@ -1909,7 +1909,7 @@ define <4 x double> @f4xf64_f128(<4 x double> %a) { ; ; ALL64-LABEL: f4xf64_f128: ; ALL64: # %bb.0: -; ALL64-NEXT: vbroadcastf128 {{.*#+}} ymm1 = [2,1,2,1] +; ALL64-NEXT: vbroadcastf128 {{.*#+}} ymm1 = [2.0E+0,1.0E+0,2.0E+0,1.0E+0] ; ALL64-NEXT: # ymm1 = mem[0,1,0,1] ; ALL64-NEXT: vaddpd %ymm1, %ymm0, %ymm0 ; ALL64-NEXT: vdivpd %ymm0, %ymm1, %ymm0 @@ -1923,7 +1923,7 @@ define <4 x double> @f4xf64_f128(<4 x double> %a) { define <8 x double> @f8xf64_f128(<8 x double> %a) { ; AVX-LABEL: f8xf64_f128: ; AVX: # %bb.0: -; AVX-NEXT: vbroadcastf128 {{.*#+}} ymm2 = [2,1,2,1] +; AVX-NEXT: vbroadcastf128 {{.*#+}} ymm2 = [2.0E+0,1.0E+0,2.0E+0,1.0E+0] ; AVX-NEXT: # ymm2 = mem[0,1,0,1] ; AVX-NEXT: vaddpd %ymm2, %ymm1, %ymm1 ; AVX-NEXT: vaddpd %ymm2, %ymm0, %ymm0 @@ -1933,7 +1933,7 @@ define <8 x double> @f8xf64_f128(<8 x double> %a) { ; ; AVX2-LABEL: f8xf64_f128: ; AVX2: # %bb.0: -; AVX2-NEXT: vbroadcastf128 {{.*#+}} ymm2 = [2,1,2,1] +; AVX2-NEXT: vbroadcastf128 {{.*#+}} ymm2 = [2.0E+0,1.0E+0,2.0E+0,1.0E+0] ; AVX2-NEXT: # ymm2 = mem[0,1,0,1] ; AVX2-NEXT: vaddpd %ymm2, %ymm1, %ymm1 ; AVX2-NEXT: vaddpd %ymm2, %ymm0, %ymm0 @@ -1943,7 +1943,7 @@ define <8 x double> @f8xf64_f128(<8 x double> %a) { ; ; AVX512-LABEL: f8xf64_f128: ; AVX512: # %bb.0: -; AVX512-NEXT: vbroadcastf32x4 {{.*#+}} zmm1 = [2,1,2,1,2,1,2,1] +; AVX512-NEXT: vbroadcastf32x4 {{.*#+}} zmm1 = [2.0E+0,1.0E+0,2.0E+0,1.0E+0,2.0E+0,1.0E+0,2.0E+0,1.0E+0] ; AVX512-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3] ; AVX512-NEXT: vaddpd %zmm1, %zmm0, %zmm0 ; AVX512-NEXT: vdivpd %zmm0, %zmm1, %zmm0 @@ -1951,7 +1951,7 @@ define <8 x double> @f8xf64_f128(<8 x double> %a) { ; ; AVX-64-LABEL: f8xf64_f128: ; AVX-64: # %bb.0: -; AVX-64-NEXT: vbroadcastf128 {{.*#+}} ymm2 = [2,1,2,1] +; AVX-64-NEXT: vbroadcastf128 {{.*#+}} ymm2 = [2.0E+0,1.0E+0,2.0E+0,1.0E+0] ; AVX-64-NEXT: # ymm2 = mem[0,1,0,1] ; AVX-64-NEXT: vaddpd %ymm2, %ymm1, %ymm1 ; AVX-64-NEXT: vaddpd %ymm2, %ymm0, %ymm0 @@ -1961,7 +1961,7 @@ define <8 x double> @f8xf64_f128(<8 x double> %a) { ; ; AVX2-64-LABEL: f8xf64_f128: ; AVX2-64: # %bb.0: -; AVX2-64-NEXT: vbroadcastf128 {{.*#+}} ymm2 = [2,1,2,1] +; AVX2-64-NEXT: vbroadcastf128 {{.*#+}} ymm2 = [2.0E+0,1.0E+0,2.0E+0,1.0E+0] ; AVX2-64-NEXT: # ymm2 = mem[0,1,0,1] ; AVX2-64-NEXT: vaddpd %ymm2, %ymm1, %ymm1 ; AVX2-64-NEXT: vaddpd %ymm2, %ymm0, %ymm0 @@ -1971,7 +1971,7 @@ define <8 x double> @f8xf64_f128(<8 x double> %a) { ; ; AVX512F-64-LABEL: f8xf64_f128: ; AVX512F-64: # %bb.0: -; AVX512F-64-NEXT: vbroadcastf32x4 {{.*#+}} zmm1 = [2,1,2,1,2,1,2,1] +; AVX512F-64-NEXT: vbroadcastf32x4 {{.*#+}} zmm1 = [2.0E+0,1.0E+0,2.0E+0,1.0E+0,2.0E+0,1.0E+0,2.0E+0,1.0E+0] ; AVX512F-64-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3] ; AVX512F-64-NEXT: vaddpd %zmm1, %zmm0, %zmm0 ; AVX512F-64-NEXT: vdivpd %zmm0, %zmm1, %zmm0 @@ -1992,7 +1992,7 @@ define <8 x double> @f8xf64_f128(<8 x double> %a) { define <8 x double> @f8xf64_f256(<8 x double> %a) { ; AVX-LABEL: f8xf64_f256: ; AVX: # %bb.0: -; AVX-NEXT: vmovapd {{.*#+}} ymm2 = [4,1,2,3] +; AVX-NEXT: vmovapd {{.*#+}} ymm2 = [4.0E+0,1.0E+0,2.0E+0,3.0E+0] ; AVX-NEXT: vaddpd %ymm2, %ymm1, %ymm1 ; AVX-NEXT: vaddpd %ymm2, %ymm0, %ymm0 ; AVX-NEXT: vdivpd %ymm0, %ymm2, %ymm0 @@ -2001,7 +2001,7 @@ define <8 x double> @f8xf64_f256(<8 x double> %a) { ; ; AVX2-LABEL: f8xf64_f256: ; AVX2: # %bb.0: -; AVX2-NEXT: vmovapd {{.*#+}} ymm2 = [4,1,2,3] +; AVX2-NEXT: vmovapd {{.*#+}} ymm2 = [4.0E+0,1.0E+0,2.0E+0,3.0E+0] ; AVX2-NEXT: vaddpd %ymm2, %ymm1, %ymm1 ; AVX2-NEXT: vaddpd %ymm2, %ymm0, %ymm0 ; AVX2-NEXT: vdivpd %ymm0, %ymm2, %ymm0 @@ -2010,7 +2010,7 @@ define <8 x double> @f8xf64_f256(<8 x double> %a) { ; ; AVX512-LABEL: f8xf64_f256: ; AVX512: # %bb.0: -; AVX512-NEXT: vbroadcastf64x4 {{.*#+}} zmm1 = [4,1,2,3,4,1,2,3] +; AVX512-NEXT: vbroadcastf64x4 {{.*#+}} zmm1 = [4.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,1.0E+0,2.0E+0,3.0E+0] ; AVX512-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3] ; AVX512-NEXT: vaddpd %zmm1, %zmm0, %zmm0 ; AVX512-NEXT: vdivpd %zmm0, %zmm1, %zmm0 @@ -2018,7 +2018,7 @@ define <8 x double> @f8xf64_f256(<8 x double> %a) { ; ; AVX-64-LABEL: f8xf64_f256: ; AVX-64: # %bb.0: -; AVX-64-NEXT: vmovapd {{.*#+}} ymm2 = [4,1,2,3] +; AVX-64-NEXT: vmovapd {{.*#+}} ymm2 = [4.0E+0,1.0E+0,2.0E+0,3.0E+0] ; AVX-64-NEXT: vaddpd %ymm2, %ymm1, %ymm1 ; AVX-64-NEXT: vaddpd %ymm2, %ymm0, %ymm0 ; AVX-64-NEXT: vdivpd %ymm0, %ymm2, %ymm0 @@ -2027,7 +2027,7 @@ define <8 x double> @f8xf64_f256(<8 x double> %a) { ; ; AVX2-64-LABEL: f8xf64_f256: ; AVX2-64: # %bb.0: -; AVX2-64-NEXT: vmovapd {{.*#+}} ymm2 = [4,1,2,3] +; AVX2-64-NEXT: vmovapd {{.*#+}} ymm2 = [4.0E+0,1.0E+0,2.0E+0,3.0E+0] ; AVX2-64-NEXT: vaddpd %ymm2, %ymm1, %ymm1 ; AVX2-64-NEXT: vaddpd %ymm2, %ymm0, %ymm0 ; AVX2-64-NEXT: vdivpd %ymm0, %ymm2, %ymm0 @@ -2036,7 +2036,7 @@ define <8 x double> @f8xf64_f256(<8 x double> %a) { ; ; AVX512F-64-LABEL: f8xf64_f256: ; AVX512F-64: # %bb.0: -; AVX512F-64-NEXT: vbroadcastf64x4 {{.*#+}} zmm1 = [4,1,2,3,4,1,2,3] +; AVX512F-64-NEXT: vbroadcastf64x4 {{.*#+}} zmm1 = [4.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,1.0E+0,2.0E+0,3.0E+0] ; AVX512F-64-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3] ; AVX512F-64-NEXT: vaddpd %zmm1, %zmm0, %zmm0 ; AVX512F-64-NEXT: vdivpd %zmm0, %zmm1, %zmm0 diff --git a/test/CodeGen/X86/buildvec-insertvec.ll b/test/CodeGen/X86/buildvec-insertvec.ll index ce7614c16fb..065d87ed888 100644 --- a/test/CodeGen/X86/buildvec-insertvec.ll +++ b/test/CodeGen/X86/buildvec-insertvec.ll @@ -65,7 +65,7 @@ entry: define <2 x double> @test_negative_zero_2(<2 x double> %A) { ; SSE2-LABEL: test_negative_zero_2: ; SSE2: # %bb.0: # %entry -; SSE2-NEXT: movapd {{.*#+}} xmm1 = +; SSE2-NEXT: movapd {{.*#+}} xmm1 = ; SSE2-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1] ; SSE2-NEXT: movapd %xmm1, %xmm0 ; SSE2-NEXT: retq diff --git a/test/CodeGen/X86/combine-fabs.ll b/test/CodeGen/X86/combine-fabs.ll index c71eeb39623..b779c589cf9 100644 --- a/test/CodeGen/X86/combine-fabs.ll +++ b/test/CodeGen/X86/combine-fabs.ll @@ -24,12 +24,12 @@ define float @combine_fabs_constant() { define <4 x float> @combine_vec_fabs_constant() { ; SSE-LABEL: combine_vec_fabs_constant: ; SSE: # %bb.0: -; SSE-NEXT: movaps {{.*#+}} xmm0 = [0,0,2,2] +; SSE-NEXT: movaps {{.*#+}} xmm0 = [0.0E+0,0.0E+0,2.0E+0,2.0E+0] ; SSE-NEXT: retq ; ; AVX-LABEL: combine_vec_fabs_constant: ; AVX: # %bb.0: -; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [0,0,2,2] +; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [0.0E+0,0.0E+0,2.0E+0,2.0E+0] ; AVX-NEXT: retq %1 = call <4 x float> @llvm.fabs.v4f32(<4 x float> ) ret <4 x float> %1 diff --git a/test/CodeGen/X86/combine-fcopysign.ll b/test/CodeGen/X86/combine-fcopysign.ll index 4b416085c5d..5d27fdfa889 100644 --- a/test/CodeGen/X86/combine-fcopysign.ll +++ b/test/CodeGen/X86/combine-fcopysign.ll @@ -62,7 +62,7 @@ define <4 x float> @combine_vec_fcopysign_neg_constant0(<4 x float> %x) { ; ; AVX-LABEL: combine_vec_fcopysign_neg_constant0: ; AVX: # %bb.0: -; AVX-NEXT: vbroadcastss {{.*#+}} xmm1 = [-0,-0,-0,-0] +; AVX-NEXT: vbroadcastss {{.*#+}} xmm1 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; AVX-NEXT: vorps %xmm1, %xmm0, %xmm0 ; AVX-NEXT: retq %1 = call <4 x float> @llvm.copysign.v4f32(<4 x float> %x, <4 x float> ) @@ -77,7 +77,7 @@ define <4 x float> @combine_vec_fcopysign_neg_constant1(<4 x float> %x) { ; ; AVX-LABEL: combine_vec_fcopysign_neg_constant1: ; AVX: # %bb.0: -; AVX-NEXT: vbroadcastss {{.*#+}} xmm1 = [-0,-0,-0,-0] +; AVX-NEXT: vbroadcastss {{.*#+}} xmm1 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; AVX-NEXT: vorps %xmm1, %xmm0, %xmm0 ; AVX-NEXT: retq %1 = call <4 x float> @llvm.copysign.v4f32(<4 x float> %x, <4 x float> ) @@ -92,7 +92,7 @@ define <4 x float> @combine_vec_fcopysign_fneg_fabs_sgn(<4 x float> %x, <4 x flo ; ; AVX-LABEL: combine_vec_fcopysign_fneg_fabs_sgn: ; AVX: # %bb.0: -; AVX-NEXT: vbroadcastss {{.*#+}} xmm1 = [-0,-0,-0,-0] +; AVX-NEXT: vbroadcastss {{.*#+}} xmm1 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; AVX-NEXT: vorps %xmm1, %xmm0, %xmm0 ; AVX-NEXT: retq %1 = call <4 x float> @llvm.fabs.v4f32(<4 x float> %y) @@ -112,7 +112,7 @@ define <4 x float> @combine_vec_fcopysign_fabs_mag(<4 x float> %x, <4 x float> % ; ; AVX-LABEL: combine_vec_fcopysign_fabs_mag: ; AVX: # %bb.0: -; AVX-NEXT: vbroadcastss {{.*#+}} xmm2 = [-0,-0,-0,-0] +; AVX-NEXT: vbroadcastss {{.*#+}} xmm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; AVX-NEXT: vandps %xmm2, %xmm1, %xmm1 ; AVX-NEXT: vbroadcastss {{.*}}(%rip), %xmm2 ; AVX-NEXT: vandps %xmm2, %xmm0, %xmm0 @@ -134,7 +134,7 @@ define <4 x float> @combine_vec_fcopysign_fneg_mag(<4 x float> %x, <4 x float> % ; ; AVX-LABEL: combine_vec_fcopysign_fneg_mag: ; AVX: # %bb.0: -; AVX-NEXT: vbroadcastss {{.*#+}} xmm2 = [-0,-0,-0,-0] +; AVX-NEXT: vbroadcastss {{.*#+}} xmm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; AVX-NEXT: vandps %xmm2, %xmm1, %xmm1 ; AVX-NEXT: vbroadcastss {{.*}}(%rip), %xmm2 ; AVX-NEXT: vandps %xmm2, %xmm0, %xmm0 @@ -156,7 +156,7 @@ define <4 x float> @combine_vec_fcopysign_fcopysign_mag(<4 x float> %x, <4 x flo ; ; AVX-LABEL: combine_vec_fcopysign_fcopysign_mag: ; AVX: # %bb.0: -; AVX-NEXT: vbroadcastss {{.*#+}} xmm2 = [-0,-0,-0,-0] +; AVX-NEXT: vbroadcastss {{.*#+}} xmm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; AVX-NEXT: vandps %xmm2, %xmm1, %xmm1 ; AVX-NEXT: vbroadcastss {{.*}}(%rip), %xmm2 ; AVX-NEXT: vandps %xmm2, %xmm0, %xmm0 @@ -178,7 +178,7 @@ define <4 x float> @combine_vec_fcopysign_fcopysign_sgn(<4 x float> %x, <4 x flo ; ; AVX-LABEL: combine_vec_fcopysign_fcopysign_sgn: ; AVX: # %bb.0: -; AVX-NEXT: vbroadcastss {{.*#+}} xmm1 = [-0,-0,-0,-0] +; AVX-NEXT: vbroadcastss {{.*#+}} xmm1 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; AVX-NEXT: vandps %xmm1, %xmm2, %xmm1 ; AVX-NEXT: vbroadcastss {{.*}}(%rip), %xmm2 ; AVX-NEXT: vandps %xmm2, %xmm0, %xmm0 @@ -202,7 +202,7 @@ define <4 x double> @combine_vec_fcopysign_fpext_sgn(<4 x double> %x, <4 x float ; SSE-NEXT: movaps {{.*#+}} xmm7 ; SSE-NEXT: movaps %xmm0, %xmm2 ; SSE-NEXT: andps %xmm7, %xmm2 -; SSE-NEXT: movaps {{.*#+}} xmm8 = [-0,-0] +; SSE-NEXT: movaps {{.*#+}} xmm8 = [-0.0E+0,-0.0E+0] ; SSE-NEXT: andps %xmm8, %xmm4 ; SSE-NEXT: orps %xmm4, %xmm2 ; SSE-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1] @@ -232,7 +232,7 @@ define <4 x double> @combine_vec_fcopysign_fpext_sgn(<4 x double> %x, <4 x float ; AVX-NEXT: vbroadcastsd {{.*}}(%rip), %ymm2 ; AVX-NEXT: vandps %ymm2, %ymm0, %ymm0 ; AVX-NEXT: vcvtps2pd %xmm1, %ymm1 -; AVX-NEXT: vbroadcastsd {{.*#+}} ymm2 = [-0,-0,-0,-0] +; AVX-NEXT: vbroadcastsd {{.*#+}} ymm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; AVX-NEXT: vandps %ymm2, %ymm1, %ymm1 ; AVX-NEXT: vorps %ymm1, %ymm0, %ymm0 ; AVX-NEXT: retq @@ -249,7 +249,7 @@ define <4 x float> @combine_vec_fcopysign_fptrunc_sgn(<4 x float> %x, <4 x doubl ; SSE-NEXT: movaps {{.*#+}} xmm5 ; SSE-NEXT: andps %xmm5, %xmm0 ; SSE-NEXT: cvtsd2ss %xmm1, %xmm6 -; SSE-NEXT: movaps {{.*#+}} xmm4 = [-0,-0,-0,-0] +; SSE-NEXT: movaps {{.*#+}} xmm4 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; SSE-NEXT: andps %xmm4, %xmm6 ; SSE-NEXT: orps %xmm6, %xmm0 ; SSE-NEXT: movshdup {{.*#+}} xmm6 = xmm3[1,1,3,3] @@ -282,7 +282,7 @@ define <4 x float> @combine_vec_fcopysign_fptrunc_sgn(<4 x float> %x, <4 x doubl ; AVX-NEXT: vbroadcastss {{.*}}(%rip), %xmm2 ; AVX-NEXT: vandpd %xmm2, %xmm0, %xmm0 ; AVX-NEXT: vcvtpd2ps %ymm1, %xmm1 -; AVX-NEXT: vbroadcastss {{.*#+}} xmm2 = [-0,-0,-0,-0] +; AVX-NEXT: vbroadcastss {{.*#+}} xmm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; AVX-NEXT: vandpd %xmm2, %xmm1, %xmm1 ; AVX-NEXT: vorpd %xmm1, %xmm0, %xmm0 ; AVX-NEXT: vzeroupper diff --git a/test/CodeGen/X86/cvtv2f32.ll b/test/CodeGen/X86/cvtv2f32.ll index 974324f4bdb..cda0047ebee 100644 --- a/test/CodeGen/X86/cvtv2f32.ll +++ b/test/CodeGen/X86/cvtv2f32.ll @@ -44,7 +44,7 @@ define <2 x float> @uitofp_2i32_buildvector_cvt(i32 %x, i32 %y, <2 x float> %v) ; X32-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero ; X32-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero ; X32-NEXT: unpcklpd {{.*#+}} xmm2 = xmm2[0],xmm1[0] -; X32-NEXT: movapd {{.*#+}} xmm1 = [4503599627370496,4503599627370496] +; X32-NEXT: movapd {{.*#+}} xmm1 = [4.503599627370496E+15,4.503599627370496E+15] ; X32-NEXT: orpd %xmm1, %xmm2 ; X32-NEXT: subpd %xmm1, %xmm2 ; X32-NEXT: cvtpd2ps %xmm2, %xmm1 @@ -56,7 +56,7 @@ define <2 x float> @uitofp_2i32_buildvector_cvt(i32 %x, i32 %y, <2 x float> %v) ; X64-NEXT: movd %esi, %xmm1 ; X64-NEXT: movd %edi, %xmm2 ; X64-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm1[0] -; X64-NEXT: movdqa {{.*#+}} xmm1 = [4503599627370496,4503599627370496] +; X64-NEXT: movdqa {{.*#+}} xmm1 = [4.503599627370496E+15,4.503599627370496E+15] ; X64-NEXT: por %xmm1, %xmm2 ; X64-NEXT: subpd %xmm1, %xmm2 ; X64-NEXT: cvtpd2ps %xmm2, %xmm1 @@ -74,7 +74,7 @@ define <2 x float> @uitofp_2i32_legalized(<2 x i32> %in, <2 x float> %v) { ; X32: # %bb.0: ; X32-NEXT: xorps %xmm2, %xmm2 ; X32-NEXT: blendps {{.*#+}} xmm2 = xmm0[0],xmm2[1],xmm0[2],xmm2[3] -; X32-NEXT: movaps {{.*#+}} xmm0 = [4503599627370496,4503599627370496] +; X32-NEXT: movaps {{.*#+}} xmm0 = [4.503599627370496E+15,4.503599627370496E+15] ; X32-NEXT: orps %xmm0, %xmm2 ; X32-NEXT: subpd %xmm0, %xmm2 ; X32-NEXT: cvtpd2ps %xmm2, %xmm0 @@ -85,7 +85,7 @@ define <2 x float> @uitofp_2i32_legalized(<2 x i32> %in, <2 x float> %v) { ; X64: # %bb.0: ; X64-NEXT: xorps %xmm2, %xmm2 ; X64-NEXT: blendps {{.*#+}} xmm2 = xmm0[0],xmm2[1],xmm0[2],xmm2[3] -; X64-NEXT: movaps {{.*#+}} xmm0 = [4503599627370496,4503599627370496] +; X64-NEXT: movaps {{.*#+}} xmm0 = [4.503599627370496E+15,4.503599627370496E+15] ; X64-NEXT: orps %xmm0, %xmm2 ; X64-NEXT: subpd %xmm0, %xmm2 ; X64-NEXT: cvtpd2ps %xmm2, %xmm0 diff --git a/test/CodeGen/X86/fma-fneg-combine.ll b/test/CodeGen/X86/fma-fneg-combine.ll index 6a148397336..35965a8b66e 100644 --- a/test/CodeGen/X86/fma-fneg-combine.ll +++ b/test/CodeGen/X86/fma-fneg-combine.ll @@ -141,7 +141,7 @@ define <4 x float> @test11(<4 x float> %a, <4 x float> %b, <4 x float> %c, i8 ze ; ; KNL-LABEL: test11: ; KNL: # %bb.0: # %entry -; KNL-NEXT: vbroadcastss {{.*#+}} xmm3 = [-0,-0,-0,-0] +; KNL-NEXT: vbroadcastss {{.*#+}} xmm3 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; KNL-NEXT: vxorps %xmm3, %xmm2, %xmm3 ; KNL-NEXT: vfmsub213ss {{.*#+}} xmm0 = (xmm1 * xmm0) - xmm2 ; KNL-NEXT: kmovw %edi, %k1 diff --git a/test/CodeGen/X86/fma-intrinsics-fast-isel.ll b/test/CodeGen/X86/fma-intrinsics-fast-isel.ll index fbe282f01ff..d82fe58ec40 100644 --- a/test/CodeGen/X86/fma-intrinsics-fast-isel.ll +++ b/test/CodeGen/X86/fma-intrinsics-fast-isel.ll @@ -160,7 +160,7 @@ entry: define <4 x float> @test_mm_fnmsub_ps(<4 x float> %a, <4 x float> %b, <4 x float> %c) { ; CHECK-LABEL: test_mm_fnmsub_ps: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: vmovaps {{.*#+}} xmm3 = [-0,-0,-0,-0] +; CHECK-NEXT: vmovaps {{.*#+}} xmm3 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; CHECK-NEXT: vxorps %xmm3, %xmm0, %xmm4 ; CHECK-NEXT: vxorps %xmm3, %xmm2, %xmm0 ; CHECK-NEXT: vfmadd231ps {{.*#+}} xmm0 = (xmm1 * xmm4) + xmm0 @@ -175,7 +175,7 @@ entry: define <2 x double> @test_mm_fnmsub_pd(<2 x double> %a, <2 x double> %b, <2 x double> %c) { ; CHECK-LABEL: test_mm_fnmsub_pd: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: vmovapd {{.*#+}} xmm3 = [-0,-0] +; CHECK-NEXT: vmovapd {{.*#+}} xmm3 = [-0.0E+0,-0.0E+0] ; CHECK-NEXT: vxorpd %xmm3, %xmm0, %xmm4 ; CHECK-NEXT: vxorpd %xmm3, %xmm2, %xmm0 ; CHECK-NEXT: vfmadd231pd {{.*#+}} xmm0 = (xmm1 * xmm4) + xmm0 @@ -342,7 +342,7 @@ entry: define <8 x float> @test_mm256_fnmsub_ps(<8 x float> %a, <8 x float> %b, <8 x float> %c) { ; CHECK-LABEL: test_mm256_fnmsub_ps: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: vmovaps {{.*#+}} ymm3 = [-0,-0,-0,-0,-0,-0,-0,-0] +; CHECK-NEXT: vmovaps {{.*#+}} ymm3 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; CHECK-NEXT: vxorps %ymm3, %ymm0, %ymm4 ; CHECK-NEXT: vxorps %ymm3, %ymm2, %ymm0 ; CHECK-NEXT: vfmadd231ps {{.*#+}} ymm0 = (ymm1 * ymm4) + ymm0 @@ -357,7 +357,7 @@ entry: define <4 x double> @test_mm256_fnmsub_pd(<4 x double> %a, <4 x double> %b, <4 x double> %c) { ; CHECK-LABEL: test_mm256_fnmsub_pd: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: vmovapd {{.*#+}} ymm3 = [-0,-0,-0,-0] +; CHECK-NEXT: vmovapd {{.*#+}} ymm3 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; CHECK-NEXT: vxorpd %ymm3, %ymm0, %ymm4 ; CHECK-NEXT: vxorpd %ymm3, %ymm2, %ymm0 ; CHECK-NEXT: vfmadd231pd {{.*#+}} ymm0 = (ymm1 * ymm4) + ymm0 diff --git a/test/CodeGen/X86/fma_patterns.ll b/test/CodeGen/X86/fma_patterns.ll index 038836bd524..e59d6b66bc6 100644 --- a/test/CodeGen/X86/fma_patterns.ll +++ b/test/CodeGen/X86/fma_patterns.ll @@ -791,21 +791,21 @@ define <4 x float> @test_v4f32_mul_y_add_x_negone_undefs(<4 x float> %x, <4 x fl define <4 x float> @test_v4f32_mul_sub_one_x_y(<4 x float> %x, <4 x float> %y) { ; FMA-INFS-LABEL: test_v4f32_mul_sub_one_x_y: ; FMA-INFS: # %bb.0: -; FMA-INFS-NEXT: vmovaps {{.*#+}} xmm2 = [1,1,1,1] +; FMA-INFS-NEXT: vmovaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA-INFS-NEXT: vsubps %xmm0, %xmm2, %xmm0 ; FMA-INFS-NEXT: vmulps %xmm1, %xmm0, %xmm0 ; FMA-INFS-NEXT: retq ; ; FMA4-INFS-LABEL: test_v4f32_mul_sub_one_x_y: ; FMA4-INFS: # %bb.0: -; FMA4-INFS-NEXT: vmovaps {{.*#+}} xmm2 = [1,1,1,1] +; FMA4-INFS-NEXT: vmovaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA4-INFS-NEXT: vsubps %xmm0, %xmm2, %xmm0 ; FMA4-INFS-NEXT: vmulps %xmm1, %xmm0, %xmm0 ; FMA4-INFS-NEXT: retq ; ; AVX512-INFS-LABEL: test_v4f32_mul_sub_one_x_y: ; AVX512-INFS: # %bb.0: -; AVX512-INFS-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] +; AVX512-INFS-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX512-INFS-NEXT: vsubps %xmm0, %xmm2, %xmm0 ; AVX512-INFS-NEXT: vmulps %xmm1, %xmm0, %xmm0 ; AVX512-INFS-NEXT: retq @@ -832,21 +832,21 @@ define <4 x float> @test_v4f32_mul_sub_one_x_y(<4 x float> %x, <4 x float> %y) { define <4 x float> @test_v4f32_mul_y_sub_one_x(<4 x float> %x, <4 x float> %y) { ; FMA-INFS-LABEL: test_v4f32_mul_y_sub_one_x: ; FMA-INFS: # %bb.0: -; FMA-INFS-NEXT: vmovaps {{.*#+}} xmm2 = [1,1,1,1] +; FMA-INFS-NEXT: vmovaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA-INFS-NEXT: vsubps %xmm0, %xmm2, %xmm0 ; FMA-INFS-NEXT: vmulps %xmm0, %xmm1, %xmm0 ; FMA-INFS-NEXT: retq ; ; FMA4-INFS-LABEL: test_v4f32_mul_y_sub_one_x: ; FMA4-INFS: # %bb.0: -; FMA4-INFS-NEXT: vmovaps {{.*#+}} xmm2 = [1,1,1,1] +; FMA4-INFS-NEXT: vmovaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA4-INFS-NEXT: vsubps %xmm0, %xmm2, %xmm0 ; FMA4-INFS-NEXT: vmulps %xmm0, %xmm1, %xmm0 ; FMA4-INFS-NEXT: retq ; ; AVX512-INFS-LABEL: test_v4f32_mul_y_sub_one_x: ; AVX512-INFS: # %bb.0: -; AVX512-INFS-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] +; AVX512-INFS-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX512-INFS-NEXT: vsubps %xmm0, %xmm2, %xmm0 ; AVX512-INFS-NEXT: vmulps %xmm0, %xmm1, %xmm0 ; AVX512-INFS-NEXT: retq @@ -873,21 +873,21 @@ define <4 x float> @test_v4f32_mul_y_sub_one_x(<4 x float> %x, <4 x float> %y) { define <4 x float> @test_v4f32_mul_y_sub_one_x_undefs(<4 x float> %x, <4 x float> %y) { ; FMA-INFS-LABEL: test_v4f32_mul_y_sub_one_x_undefs: ; FMA-INFS: # %bb.0: -; FMA-INFS-NEXT: vmovaps {{.*#+}} xmm2 = <1,u,1,1> +; FMA-INFS-NEXT: vmovaps {{.*#+}} xmm2 = <1.0E+0,u,1.0E+0,1.0E+0> ; FMA-INFS-NEXT: vsubps %xmm0, %xmm2, %xmm0 ; FMA-INFS-NEXT: vmulps %xmm0, %xmm1, %xmm0 ; FMA-INFS-NEXT: retq ; ; FMA4-INFS-LABEL: test_v4f32_mul_y_sub_one_x_undefs: ; FMA4-INFS: # %bb.0: -; FMA4-INFS-NEXT: vmovaps {{.*#+}} xmm2 = <1,u,1,1> +; FMA4-INFS-NEXT: vmovaps {{.*#+}} xmm2 = <1.0E+0,u,1.0E+0,1.0E+0> ; FMA4-INFS-NEXT: vsubps %xmm0, %xmm2, %xmm0 ; FMA4-INFS-NEXT: vmulps %xmm0, %xmm1, %xmm0 ; FMA4-INFS-NEXT: retq ; ; AVX512-INFS-LABEL: test_v4f32_mul_y_sub_one_x_undefs: ; AVX512-INFS: # %bb.0: -; AVX512-INFS-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] +; AVX512-INFS-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX512-INFS-NEXT: vsubps %xmm0, %xmm2, %xmm0 ; AVX512-INFS-NEXT: vmulps %xmm0, %xmm1, %xmm0 ; AVX512-INFS-NEXT: retq @@ -914,21 +914,21 @@ define <4 x float> @test_v4f32_mul_y_sub_one_x_undefs(<4 x float> %x, <4 x float define <4 x float> @test_v4f32_mul_sub_negone_x_y(<4 x float> %x, <4 x float> %y) { ; FMA-INFS-LABEL: test_v4f32_mul_sub_negone_x_y: ; FMA-INFS: # %bb.0: -; FMA-INFS-NEXT: vmovaps {{.*#+}} xmm2 = [-1,-1,-1,-1] +; FMA-INFS-NEXT: vmovaps {{.*#+}} xmm2 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0] ; FMA-INFS-NEXT: vsubps %xmm0, %xmm2, %xmm0 ; FMA-INFS-NEXT: vmulps %xmm1, %xmm0, %xmm0 ; FMA-INFS-NEXT: retq ; ; FMA4-INFS-LABEL: test_v4f32_mul_sub_negone_x_y: ; FMA4-INFS: # %bb.0: -; FMA4-INFS-NEXT: vmovaps {{.*#+}} xmm2 = [-1,-1,-1,-1] +; FMA4-INFS-NEXT: vmovaps {{.*#+}} xmm2 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0] ; FMA4-INFS-NEXT: vsubps %xmm0, %xmm2, %xmm0 ; FMA4-INFS-NEXT: vmulps %xmm1, %xmm0, %xmm0 ; FMA4-INFS-NEXT: retq ; ; AVX512-INFS-LABEL: test_v4f32_mul_sub_negone_x_y: ; AVX512-INFS: # %bb.0: -; AVX512-INFS-NEXT: vbroadcastss {{.*#+}} xmm2 = [-1,-1,-1,-1] +; AVX512-INFS-NEXT: vbroadcastss {{.*#+}} xmm2 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0] ; AVX512-INFS-NEXT: vsubps %xmm0, %xmm2, %xmm0 ; AVX512-INFS-NEXT: vmulps %xmm1, %xmm0, %xmm0 ; AVX512-INFS-NEXT: retq @@ -955,21 +955,21 @@ define <4 x float> @test_v4f32_mul_sub_negone_x_y(<4 x float> %x, <4 x float> %y define <4 x float> @test_v4f32_mul_y_sub_negone_x(<4 x float> %x, <4 x float> %y) { ; FMA-INFS-LABEL: test_v4f32_mul_y_sub_negone_x: ; FMA-INFS: # %bb.0: -; FMA-INFS-NEXT: vmovaps {{.*#+}} xmm2 = [-1,-1,-1,-1] +; FMA-INFS-NEXT: vmovaps {{.*#+}} xmm2 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0] ; FMA-INFS-NEXT: vsubps %xmm0, %xmm2, %xmm0 ; FMA-INFS-NEXT: vmulps %xmm0, %xmm1, %xmm0 ; FMA-INFS-NEXT: retq ; ; FMA4-INFS-LABEL: test_v4f32_mul_y_sub_negone_x: ; FMA4-INFS: # %bb.0: -; FMA4-INFS-NEXT: vmovaps {{.*#+}} xmm2 = [-1,-1,-1,-1] +; FMA4-INFS-NEXT: vmovaps {{.*#+}} xmm2 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0] ; FMA4-INFS-NEXT: vsubps %xmm0, %xmm2, %xmm0 ; FMA4-INFS-NEXT: vmulps %xmm0, %xmm1, %xmm0 ; FMA4-INFS-NEXT: retq ; ; AVX512-INFS-LABEL: test_v4f32_mul_y_sub_negone_x: ; AVX512-INFS: # %bb.0: -; AVX512-INFS-NEXT: vbroadcastss {{.*#+}} xmm2 = [-1,-1,-1,-1] +; AVX512-INFS-NEXT: vbroadcastss {{.*#+}} xmm2 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0] ; AVX512-INFS-NEXT: vsubps %xmm0, %xmm2, %xmm0 ; AVX512-INFS-NEXT: vmulps %xmm0, %xmm1, %xmm0 ; AVX512-INFS-NEXT: retq @@ -996,21 +996,21 @@ define <4 x float> @test_v4f32_mul_y_sub_negone_x(<4 x float> %x, <4 x float> %y define <4 x float> @test_v4f32_mul_y_sub_negone_x_undefs(<4 x float> %x, <4 x float> %y) { ; FMA-INFS-LABEL: test_v4f32_mul_y_sub_negone_x_undefs: ; FMA-INFS: # %bb.0: -; FMA-INFS-NEXT: vmovaps {{.*#+}} xmm2 = <-1,-1,u,-1> +; FMA-INFS-NEXT: vmovaps {{.*#+}} xmm2 = <-1.0E+0,-1.0E+0,u,-1.0E+0> ; FMA-INFS-NEXT: vsubps %xmm0, %xmm2, %xmm0 ; FMA-INFS-NEXT: vmulps %xmm0, %xmm1, %xmm0 ; FMA-INFS-NEXT: retq ; ; FMA4-INFS-LABEL: test_v4f32_mul_y_sub_negone_x_undefs: ; FMA4-INFS: # %bb.0: -; FMA4-INFS-NEXT: vmovaps {{.*#+}} xmm2 = <-1,-1,u,-1> +; FMA4-INFS-NEXT: vmovaps {{.*#+}} xmm2 = <-1.0E+0,-1.0E+0,u,-1.0E+0> ; FMA4-INFS-NEXT: vsubps %xmm0, %xmm2, %xmm0 ; FMA4-INFS-NEXT: vmulps %xmm0, %xmm1, %xmm0 ; FMA4-INFS-NEXT: retq ; ; AVX512-INFS-LABEL: test_v4f32_mul_y_sub_negone_x_undefs: ; AVX512-INFS: # %bb.0: -; AVX512-INFS-NEXT: vbroadcastss {{.*#+}} xmm2 = [-1,-1,-1,-1] +; AVX512-INFS-NEXT: vbroadcastss {{.*#+}} xmm2 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0] ; AVX512-INFS-NEXT: vsubps %xmm0, %xmm2, %xmm0 ; AVX512-INFS-NEXT: vmulps %xmm0, %xmm1, %xmm0 ; AVX512-INFS-NEXT: retq @@ -1318,7 +1318,7 @@ define float @test_f32_interp(float %x, float %y, float %t) { define <4 x float> @test_v4f32_interp(<4 x float> %x, <4 x float> %y, <4 x float> %t) { ; FMA-INFS-LABEL: test_v4f32_interp: ; FMA-INFS: # %bb.0: -; FMA-INFS-NEXT: vmovaps {{.*#+}} xmm3 = [1,1,1,1] +; FMA-INFS-NEXT: vmovaps {{.*#+}} xmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA-INFS-NEXT: vsubps %xmm2, %xmm3, %xmm3 ; FMA-INFS-NEXT: vmulps %xmm3, %xmm1, %xmm1 ; FMA-INFS-NEXT: vfmadd213ps {{.*#+}} xmm0 = (xmm2 * xmm0) + xmm1 @@ -1326,7 +1326,7 @@ define <4 x float> @test_v4f32_interp(<4 x float> %x, <4 x float> %y, <4 x float ; ; FMA4-INFS-LABEL: test_v4f32_interp: ; FMA4-INFS: # %bb.0: -; FMA4-INFS-NEXT: vmovaps {{.*#+}} xmm3 = [1,1,1,1] +; FMA4-INFS-NEXT: vmovaps {{.*#+}} xmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA4-INFS-NEXT: vsubps %xmm2, %xmm3, %xmm3 ; FMA4-INFS-NEXT: vmulps %xmm3, %xmm1, %xmm1 ; FMA4-INFS-NEXT: vfmaddps %xmm1, %xmm2, %xmm0, %xmm0 @@ -1334,7 +1334,7 @@ define <4 x float> @test_v4f32_interp(<4 x float> %x, <4 x float> %y, <4 x float ; ; AVX512-INFS-LABEL: test_v4f32_interp: ; AVX512-INFS: # %bb.0: -; AVX512-INFS-NEXT: vbroadcastss {{.*#+}} xmm3 = [1,1,1,1] +; AVX512-INFS-NEXT: vbroadcastss {{.*#+}} xmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX512-INFS-NEXT: vsubps %xmm2, %xmm3, %xmm3 ; AVX512-INFS-NEXT: vmulps %xmm3, %xmm1, %xmm1 ; AVX512-INFS-NEXT: vfmadd213ps {{.*#+}} xmm0 = (xmm2 * xmm0) + xmm1 @@ -1367,7 +1367,7 @@ define <4 x float> @test_v4f32_interp(<4 x float> %x, <4 x float> %y, <4 x float define <8 x float> @test_v8f32_interp(<8 x float> %x, <8 x float> %y, <8 x float> %t) { ; FMA-INFS-LABEL: test_v8f32_interp: ; FMA-INFS: # %bb.0: -; FMA-INFS-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] +; FMA-INFS-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA-INFS-NEXT: vsubps %ymm2, %ymm3, %ymm3 ; FMA-INFS-NEXT: vmulps %ymm3, %ymm1, %ymm1 ; FMA-INFS-NEXT: vfmadd213ps {{.*#+}} ymm0 = (ymm2 * ymm0) + ymm1 @@ -1375,7 +1375,7 @@ define <8 x float> @test_v8f32_interp(<8 x float> %x, <8 x float> %y, <8 x float ; ; FMA4-INFS-LABEL: test_v8f32_interp: ; FMA4-INFS: # %bb.0: -; FMA4-INFS-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] +; FMA4-INFS-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA4-INFS-NEXT: vsubps %ymm2, %ymm3, %ymm3 ; FMA4-INFS-NEXT: vmulps %ymm3, %ymm1, %ymm1 ; FMA4-INFS-NEXT: vfmaddps %ymm1, %ymm2, %ymm0, %ymm0 @@ -1383,7 +1383,7 @@ define <8 x float> @test_v8f32_interp(<8 x float> %x, <8 x float> %y, <8 x float ; ; AVX512-INFS-LABEL: test_v8f32_interp: ; AVX512-INFS: # %bb.0: -; AVX512-INFS-NEXT: vbroadcastss {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] +; AVX512-INFS-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX512-INFS-NEXT: vsubps %ymm2, %ymm3, %ymm3 ; AVX512-INFS-NEXT: vmulps %ymm3, %ymm1, %ymm1 ; AVX512-INFS-NEXT: vfmadd213ps {{.*#+}} ymm0 = (ymm2 * ymm0) + ymm1 @@ -1465,7 +1465,7 @@ define double @test_f64_interp(double %x, double %y, double %t) { define <2 x double> @test_v2f64_interp(<2 x double> %x, <2 x double> %y, <2 x double> %t) { ; FMA-INFS-LABEL: test_v2f64_interp: ; FMA-INFS: # %bb.0: -; FMA-INFS-NEXT: vmovapd {{.*#+}} xmm3 = [1,1] +; FMA-INFS-NEXT: vmovapd {{.*#+}} xmm3 = [1.0E+0,1.0E+0] ; FMA-INFS-NEXT: vsubpd %xmm2, %xmm3, %xmm3 ; FMA-INFS-NEXT: vmulpd %xmm3, %xmm1, %xmm1 ; FMA-INFS-NEXT: vfmadd213pd {{.*#+}} xmm0 = (xmm2 * xmm0) + xmm1 @@ -1473,7 +1473,7 @@ define <2 x double> @test_v2f64_interp(<2 x double> %x, <2 x double> %y, <2 x do ; ; FMA4-INFS-LABEL: test_v2f64_interp: ; FMA4-INFS: # %bb.0: -; FMA4-INFS-NEXT: vmovapd {{.*#+}} xmm3 = [1,1] +; FMA4-INFS-NEXT: vmovapd {{.*#+}} xmm3 = [1.0E+0,1.0E+0] ; FMA4-INFS-NEXT: vsubpd %xmm2, %xmm3, %xmm3 ; FMA4-INFS-NEXT: vmulpd %xmm3, %xmm1, %xmm1 ; FMA4-INFS-NEXT: vfmaddpd %xmm1, %xmm2, %xmm0, %xmm0 @@ -1481,7 +1481,7 @@ define <2 x double> @test_v2f64_interp(<2 x double> %x, <2 x double> %y, <2 x do ; ; AVX512-INFS-LABEL: test_v2f64_interp: ; AVX512-INFS: # %bb.0: -; AVX512-INFS-NEXT: vmovapd {{.*#+}} xmm3 = [1,1] +; AVX512-INFS-NEXT: vmovapd {{.*#+}} xmm3 = [1.0E+0,1.0E+0] ; AVX512-INFS-NEXT: vsubpd %xmm2, %xmm3, %xmm3 ; AVX512-INFS-NEXT: vmulpd %xmm3, %xmm1, %xmm1 ; AVX512-INFS-NEXT: vfmadd213pd {{.*#+}} xmm0 = (xmm2 * xmm0) + xmm1 @@ -1514,7 +1514,7 @@ define <2 x double> @test_v2f64_interp(<2 x double> %x, <2 x double> %y, <2 x do define <4 x double> @test_v4f64_interp(<4 x double> %x, <4 x double> %y, <4 x double> %t) { ; FMA-INFS-LABEL: test_v4f64_interp: ; FMA-INFS: # %bb.0: -; FMA-INFS-NEXT: vmovapd {{.*#+}} ymm3 = [1,1,1,1] +; FMA-INFS-NEXT: vmovapd {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA-INFS-NEXT: vsubpd %ymm2, %ymm3, %ymm3 ; FMA-INFS-NEXT: vmulpd %ymm3, %ymm1, %ymm1 ; FMA-INFS-NEXT: vfmadd213pd {{.*#+}} ymm0 = (ymm2 * ymm0) + ymm1 @@ -1522,7 +1522,7 @@ define <4 x double> @test_v4f64_interp(<4 x double> %x, <4 x double> %y, <4 x do ; ; FMA4-INFS-LABEL: test_v4f64_interp: ; FMA4-INFS: # %bb.0: -; FMA4-INFS-NEXT: vmovapd {{.*#+}} ymm3 = [1,1,1,1] +; FMA4-INFS-NEXT: vmovapd {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA4-INFS-NEXT: vsubpd %ymm2, %ymm3, %ymm3 ; FMA4-INFS-NEXT: vmulpd %ymm3, %ymm1, %ymm1 ; FMA4-INFS-NEXT: vfmaddpd %ymm1, %ymm2, %ymm0, %ymm0 @@ -1530,7 +1530,7 @@ define <4 x double> @test_v4f64_interp(<4 x double> %x, <4 x double> %y, <4 x do ; ; AVX512-INFS-LABEL: test_v4f64_interp: ; AVX512-INFS: # %bb.0: -; AVX512-INFS-NEXT: vbroadcastsd {{.*#+}} ymm3 = [1,1,1,1] +; AVX512-INFS-NEXT: vbroadcastsd {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX512-INFS-NEXT: vsubpd %ymm2, %ymm3, %ymm3 ; AVX512-INFS-NEXT: vmulpd %ymm3, %ymm1, %ymm1 ; AVX512-INFS-NEXT: vfmadd213pd {{.*#+}} ymm0 = (ymm2 * ymm0) + ymm1 diff --git a/test/CodeGen/X86/fma_patterns_wide.ll b/test/CodeGen/X86/fma_patterns_wide.ll index 2bd64135712..bef31d8a8cc 100644 --- a/test/CodeGen/X86/fma_patterns_wide.ll +++ b/test/CodeGen/X86/fma_patterns_wide.ll @@ -259,7 +259,7 @@ define <8 x double> @test_8f64_fmsub_load(<8 x double>* %a0, <8 x double> %a1, < define <16 x float> @test_v16f32_mul_add_x_one_y(<16 x float> %x, <16 x float> %y) { ; FMA-INFS-LABEL: test_v16f32_mul_add_x_one_y: ; FMA-INFS: # %bb.0: -; FMA-INFS-NEXT: vmovaps {{.*#+}} ymm4 = [1,1,1,1,1,1,1,1] +; FMA-INFS-NEXT: vmovaps {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA-INFS-NEXT: vaddps %ymm4, %ymm1, %ymm1 ; FMA-INFS-NEXT: vaddps %ymm4, %ymm0, %ymm0 ; FMA-INFS-NEXT: vmulps %ymm2, %ymm0, %ymm0 @@ -268,7 +268,7 @@ define <16 x float> @test_v16f32_mul_add_x_one_y(<16 x float> %x, <16 x float> % ; ; FMA4-INFS-LABEL: test_v16f32_mul_add_x_one_y: ; FMA4-INFS: # %bb.0: -; FMA4-INFS-NEXT: vmovaps {{.*#+}} ymm4 = [1,1,1,1,1,1,1,1] +; FMA4-INFS-NEXT: vmovaps {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA4-INFS-NEXT: vaddps %ymm4, %ymm1, %ymm1 ; FMA4-INFS-NEXT: vaddps %ymm4, %ymm0, %ymm0 ; FMA4-INFS-NEXT: vmulps %ymm2, %ymm0, %ymm0 @@ -305,7 +305,7 @@ define <16 x float> @test_v16f32_mul_add_x_one_y(<16 x float> %x, <16 x float> % define <8 x double> @test_v8f64_mul_y_add_x_one(<8 x double> %x, <8 x double> %y) { ; FMA-INFS-LABEL: test_v8f64_mul_y_add_x_one: ; FMA-INFS: # %bb.0: -; FMA-INFS-NEXT: vmovapd {{.*#+}} ymm4 = [1,1,1,1] +; FMA-INFS-NEXT: vmovapd {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA-INFS-NEXT: vaddpd %ymm4, %ymm1, %ymm1 ; FMA-INFS-NEXT: vaddpd %ymm4, %ymm0, %ymm0 ; FMA-INFS-NEXT: vmulpd %ymm0, %ymm2, %ymm0 @@ -314,7 +314,7 @@ define <8 x double> @test_v8f64_mul_y_add_x_one(<8 x double> %x, <8 x double> %y ; ; FMA4-INFS-LABEL: test_v8f64_mul_y_add_x_one: ; FMA4-INFS: # %bb.0: -; FMA4-INFS-NEXT: vmovapd {{.*#+}} ymm4 = [1,1,1,1] +; FMA4-INFS-NEXT: vmovapd {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA4-INFS-NEXT: vaddpd %ymm4, %ymm1, %ymm1 ; FMA4-INFS-NEXT: vaddpd %ymm4, %ymm0, %ymm0 ; FMA4-INFS-NEXT: vmulpd %ymm0, %ymm2, %ymm0 @@ -351,7 +351,7 @@ define <8 x double> @test_v8f64_mul_y_add_x_one(<8 x double> %x, <8 x double> %y define <16 x float> @test_v16f32_mul_add_x_negone_y(<16 x float> %x, <16 x float> %y) { ; FMA-INFS-LABEL: test_v16f32_mul_add_x_negone_y: ; FMA-INFS: # %bb.0: -; FMA-INFS-NEXT: vmovaps {{.*#+}} ymm4 = [-1,-1,-1,-1,-1,-1,-1,-1] +; FMA-INFS-NEXT: vmovaps {{.*#+}} ymm4 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0] ; FMA-INFS-NEXT: vaddps %ymm4, %ymm1, %ymm1 ; FMA-INFS-NEXT: vaddps %ymm4, %ymm0, %ymm0 ; FMA-INFS-NEXT: vmulps %ymm2, %ymm0, %ymm0 @@ -360,7 +360,7 @@ define <16 x float> @test_v16f32_mul_add_x_negone_y(<16 x float> %x, <16 x float ; ; FMA4-INFS-LABEL: test_v16f32_mul_add_x_negone_y: ; FMA4-INFS: # %bb.0: -; FMA4-INFS-NEXT: vmovaps {{.*#+}} ymm4 = [-1,-1,-1,-1,-1,-1,-1,-1] +; FMA4-INFS-NEXT: vmovaps {{.*#+}} ymm4 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0] ; FMA4-INFS-NEXT: vaddps %ymm4, %ymm1, %ymm1 ; FMA4-INFS-NEXT: vaddps %ymm4, %ymm0, %ymm0 ; FMA4-INFS-NEXT: vmulps %ymm2, %ymm0, %ymm0 @@ -397,7 +397,7 @@ define <16 x float> @test_v16f32_mul_add_x_negone_y(<16 x float> %x, <16 x float define <8 x double> @test_v8f64_mul_y_add_x_negone(<8 x double> %x, <8 x double> %y) { ; FMA-INFS-LABEL: test_v8f64_mul_y_add_x_negone: ; FMA-INFS: # %bb.0: -; FMA-INFS-NEXT: vmovapd {{.*#+}} ymm4 = [-1,-1,-1,-1] +; FMA-INFS-NEXT: vmovapd {{.*#+}} ymm4 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0] ; FMA-INFS-NEXT: vaddpd %ymm4, %ymm1, %ymm1 ; FMA-INFS-NEXT: vaddpd %ymm4, %ymm0, %ymm0 ; FMA-INFS-NEXT: vmulpd %ymm0, %ymm2, %ymm0 @@ -406,7 +406,7 @@ define <8 x double> @test_v8f64_mul_y_add_x_negone(<8 x double> %x, <8 x double> ; ; FMA4-INFS-LABEL: test_v8f64_mul_y_add_x_negone: ; FMA4-INFS: # %bb.0: -; FMA4-INFS-NEXT: vmovapd {{.*#+}} ymm4 = [-1,-1,-1,-1] +; FMA4-INFS-NEXT: vmovapd {{.*#+}} ymm4 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0] ; FMA4-INFS-NEXT: vaddpd %ymm4, %ymm1, %ymm1 ; FMA4-INFS-NEXT: vaddpd %ymm4, %ymm0, %ymm0 ; FMA4-INFS-NEXT: vmulpd %ymm0, %ymm2, %ymm0 @@ -443,7 +443,7 @@ define <8 x double> @test_v8f64_mul_y_add_x_negone(<8 x double> %x, <8 x double> define <16 x float> @test_v16f32_mul_sub_one_x_y(<16 x float> %x, <16 x float> %y) { ; FMA-INFS-LABEL: test_v16f32_mul_sub_one_x_y: ; FMA-INFS: # %bb.0: -; FMA-INFS-NEXT: vmovaps {{.*#+}} ymm4 = [1,1,1,1,1,1,1,1] +; FMA-INFS-NEXT: vmovaps {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA-INFS-NEXT: vsubps %ymm1, %ymm4, %ymm1 ; FMA-INFS-NEXT: vsubps %ymm0, %ymm4, %ymm0 ; FMA-INFS-NEXT: vmulps %ymm2, %ymm0, %ymm0 @@ -452,7 +452,7 @@ define <16 x float> @test_v16f32_mul_sub_one_x_y(<16 x float> %x, <16 x float> % ; ; FMA4-INFS-LABEL: test_v16f32_mul_sub_one_x_y: ; FMA4-INFS: # %bb.0: -; FMA4-INFS-NEXT: vmovaps {{.*#+}} ymm4 = [1,1,1,1,1,1,1,1] +; FMA4-INFS-NEXT: vmovaps {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA4-INFS-NEXT: vsubps %ymm1, %ymm4, %ymm1 ; FMA4-INFS-NEXT: vsubps %ymm0, %ymm4, %ymm0 ; FMA4-INFS-NEXT: vmulps %ymm2, %ymm0, %ymm0 @@ -461,7 +461,7 @@ define <16 x float> @test_v16f32_mul_sub_one_x_y(<16 x float> %x, <16 x float> % ; ; AVX512-INFS-LABEL: test_v16f32_mul_sub_one_x_y: ; AVX512-INFS: # %bb.0: -; AVX512-INFS-NEXT: vbroadcastss {{.*#+}} zmm2 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] +; AVX512-INFS-NEXT: vbroadcastss {{.*#+}} zmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX512-INFS-NEXT: vsubps %zmm0, %zmm2, %zmm0 ; AVX512-INFS-NEXT: vmulps %zmm1, %zmm0, %zmm0 ; AVX512-INFS-NEXT: retq @@ -490,7 +490,7 @@ define <16 x float> @test_v16f32_mul_sub_one_x_y(<16 x float> %x, <16 x float> % define <8 x double> @test_v8f64_mul_y_sub_one_x(<8 x double> %x, <8 x double> %y) { ; FMA-INFS-LABEL: test_v8f64_mul_y_sub_one_x: ; FMA-INFS: # %bb.0: -; FMA-INFS-NEXT: vmovapd {{.*#+}} ymm4 = [1,1,1,1] +; FMA-INFS-NEXT: vmovapd {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA-INFS-NEXT: vsubpd %ymm1, %ymm4, %ymm1 ; FMA-INFS-NEXT: vsubpd %ymm0, %ymm4, %ymm0 ; FMA-INFS-NEXT: vmulpd %ymm0, %ymm2, %ymm0 @@ -499,7 +499,7 @@ define <8 x double> @test_v8f64_mul_y_sub_one_x(<8 x double> %x, <8 x double> %y ; ; FMA4-INFS-LABEL: test_v8f64_mul_y_sub_one_x: ; FMA4-INFS: # %bb.0: -; FMA4-INFS-NEXT: vmovapd {{.*#+}} ymm4 = [1,1,1,1] +; FMA4-INFS-NEXT: vmovapd {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA4-INFS-NEXT: vsubpd %ymm1, %ymm4, %ymm1 ; FMA4-INFS-NEXT: vsubpd %ymm0, %ymm4, %ymm0 ; FMA4-INFS-NEXT: vmulpd %ymm0, %ymm2, %ymm0 @@ -508,7 +508,7 @@ define <8 x double> @test_v8f64_mul_y_sub_one_x(<8 x double> %x, <8 x double> %y ; ; AVX512-INFS-LABEL: test_v8f64_mul_y_sub_one_x: ; AVX512-INFS: # %bb.0: -; AVX512-INFS-NEXT: vbroadcastsd {{.*#+}} zmm2 = [1,1,1,1,1,1,1,1] +; AVX512-INFS-NEXT: vbroadcastsd {{.*#+}} zmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX512-INFS-NEXT: vsubpd %zmm0, %zmm2, %zmm0 ; AVX512-INFS-NEXT: vmulpd %zmm0, %zmm1, %zmm0 ; AVX512-INFS-NEXT: retq @@ -537,7 +537,7 @@ define <8 x double> @test_v8f64_mul_y_sub_one_x(<8 x double> %x, <8 x double> %y define <16 x float> @test_v16f32_mul_sub_negone_x_y(<16 x float> %x, <16 x float> %y) { ; FMA-INFS-LABEL: test_v16f32_mul_sub_negone_x_y: ; FMA-INFS: # %bb.0: -; FMA-INFS-NEXT: vmovaps {{.*#+}} ymm4 = [-1,-1,-1,-1,-1,-1,-1,-1] +; FMA-INFS-NEXT: vmovaps {{.*#+}} ymm4 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0] ; FMA-INFS-NEXT: vsubps %ymm1, %ymm4, %ymm1 ; FMA-INFS-NEXT: vsubps %ymm0, %ymm4, %ymm0 ; FMA-INFS-NEXT: vmulps %ymm2, %ymm0, %ymm0 @@ -546,7 +546,7 @@ define <16 x float> @test_v16f32_mul_sub_negone_x_y(<16 x float> %x, <16 x float ; ; FMA4-INFS-LABEL: test_v16f32_mul_sub_negone_x_y: ; FMA4-INFS: # %bb.0: -; FMA4-INFS-NEXT: vmovaps {{.*#+}} ymm4 = [-1,-1,-1,-1,-1,-1,-1,-1] +; FMA4-INFS-NEXT: vmovaps {{.*#+}} ymm4 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0] ; FMA4-INFS-NEXT: vsubps %ymm1, %ymm4, %ymm1 ; FMA4-INFS-NEXT: vsubps %ymm0, %ymm4, %ymm0 ; FMA4-INFS-NEXT: vmulps %ymm2, %ymm0, %ymm0 @@ -555,7 +555,7 @@ define <16 x float> @test_v16f32_mul_sub_negone_x_y(<16 x float> %x, <16 x float ; ; AVX512-INFS-LABEL: test_v16f32_mul_sub_negone_x_y: ; AVX512-INFS: # %bb.0: -; AVX512-INFS-NEXT: vbroadcastss {{.*#+}} zmm2 = [-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1] +; AVX512-INFS-NEXT: vbroadcastss {{.*#+}} zmm2 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0] ; AVX512-INFS-NEXT: vsubps %zmm0, %zmm2, %zmm0 ; AVX512-INFS-NEXT: vmulps %zmm1, %zmm0, %zmm0 ; AVX512-INFS-NEXT: retq @@ -584,7 +584,7 @@ define <16 x float> @test_v16f32_mul_sub_negone_x_y(<16 x float> %x, <16 x float define <8 x double> @test_v8f64_mul_y_sub_negone_x(<8 x double> %x, <8 x double> %y) { ; FMA-INFS-LABEL: test_v8f64_mul_y_sub_negone_x: ; FMA-INFS: # %bb.0: -; FMA-INFS-NEXT: vmovapd {{.*#+}} ymm4 = [-1,-1,-1,-1] +; FMA-INFS-NEXT: vmovapd {{.*#+}} ymm4 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0] ; FMA-INFS-NEXT: vsubpd %ymm1, %ymm4, %ymm1 ; FMA-INFS-NEXT: vsubpd %ymm0, %ymm4, %ymm0 ; FMA-INFS-NEXT: vmulpd %ymm0, %ymm2, %ymm0 @@ -593,7 +593,7 @@ define <8 x double> @test_v8f64_mul_y_sub_negone_x(<8 x double> %x, <8 x double> ; ; FMA4-INFS-LABEL: test_v8f64_mul_y_sub_negone_x: ; FMA4-INFS: # %bb.0: -; FMA4-INFS-NEXT: vmovapd {{.*#+}} ymm4 = [-1,-1,-1,-1] +; FMA4-INFS-NEXT: vmovapd {{.*#+}} ymm4 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0] ; FMA4-INFS-NEXT: vsubpd %ymm1, %ymm4, %ymm1 ; FMA4-INFS-NEXT: vsubpd %ymm0, %ymm4, %ymm0 ; FMA4-INFS-NEXT: vmulpd %ymm0, %ymm2, %ymm0 @@ -602,7 +602,7 @@ define <8 x double> @test_v8f64_mul_y_sub_negone_x(<8 x double> %x, <8 x double> ; ; AVX512-INFS-LABEL: test_v8f64_mul_y_sub_negone_x: ; AVX512-INFS: # %bb.0: -; AVX512-INFS-NEXT: vbroadcastsd {{.*#+}} zmm2 = [-1,-1,-1,-1,-1,-1,-1,-1] +; AVX512-INFS-NEXT: vbroadcastsd {{.*#+}} zmm2 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0] ; AVX512-INFS-NEXT: vsubpd %zmm0, %zmm2, %zmm0 ; AVX512-INFS-NEXT: vmulpd %zmm0, %zmm1, %zmm0 ; AVX512-INFS-NEXT: retq @@ -631,7 +631,7 @@ define <8 x double> @test_v8f64_mul_y_sub_negone_x(<8 x double> %x, <8 x double> define <16 x float> @test_v16f32_mul_sub_x_one_y(<16 x float> %x, <16 x float> %y) { ; FMA-INFS-LABEL: test_v16f32_mul_sub_x_one_y: ; FMA-INFS: # %bb.0: -; FMA-INFS-NEXT: vmovaps {{.*#+}} ymm4 = [1,1,1,1,1,1,1,1] +; FMA-INFS-NEXT: vmovaps {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA-INFS-NEXT: vsubps %ymm4, %ymm1, %ymm1 ; FMA-INFS-NEXT: vsubps %ymm4, %ymm0, %ymm0 ; FMA-INFS-NEXT: vmulps %ymm2, %ymm0, %ymm0 @@ -640,7 +640,7 @@ define <16 x float> @test_v16f32_mul_sub_x_one_y(<16 x float> %x, <16 x float> % ; ; FMA4-INFS-LABEL: test_v16f32_mul_sub_x_one_y: ; FMA4-INFS: # %bb.0: -; FMA4-INFS-NEXT: vmovaps {{.*#+}} ymm4 = [1,1,1,1,1,1,1,1] +; FMA4-INFS-NEXT: vmovaps {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA4-INFS-NEXT: vsubps %ymm4, %ymm1, %ymm1 ; FMA4-INFS-NEXT: vsubps %ymm4, %ymm0, %ymm0 ; FMA4-INFS-NEXT: vmulps %ymm2, %ymm0, %ymm0 @@ -677,7 +677,7 @@ define <16 x float> @test_v16f32_mul_sub_x_one_y(<16 x float> %x, <16 x float> % define <8 x double> @test_v8f64_mul_y_sub_x_one(<8 x double> %x, <8 x double> %y) { ; FMA-INFS-LABEL: test_v8f64_mul_y_sub_x_one: ; FMA-INFS: # %bb.0: -; FMA-INFS-NEXT: vmovapd {{.*#+}} ymm4 = [1,1,1,1] +; FMA-INFS-NEXT: vmovapd {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA-INFS-NEXT: vsubpd %ymm4, %ymm1, %ymm1 ; FMA-INFS-NEXT: vsubpd %ymm4, %ymm0, %ymm0 ; FMA-INFS-NEXT: vmulpd %ymm0, %ymm2, %ymm0 @@ -686,7 +686,7 @@ define <8 x double> @test_v8f64_mul_y_sub_x_one(<8 x double> %x, <8 x double> %y ; ; FMA4-INFS-LABEL: test_v8f64_mul_y_sub_x_one: ; FMA4-INFS: # %bb.0: -; FMA4-INFS-NEXT: vmovapd {{.*#+}} ymm4 = [1,1,1,1] +; FMA4-INFS-NEXT: vmovapd {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA4-INFS-NEXT: vsubpd %ymm4, %ymm1, %ymm1 ; FMA4-INFS-NEXT: vsubpd %ymm4, %ymm0, %ymm0 ; FMA4-INFS-NEXT: vmulpd %ymm0, %ymm2, %ymm0 @@ -723,7 +723,7 @@ define <8 x double> @test_v8f64_mul_y_sub_x_one(<8 x double> %x, <8 x double> %y define <16 x float> @test_v16f32_mul_sub_x_negone_y(<16 x float> %x, <16 x float> %y) { ; FMA-INFS-LABEL: test_v16f32_mul_sub_x_negone_y: ; FMA-INFS: # %bb.0: -; FMA-INFS-NEXT: vmovaps {{.*#+}} ymm4 = [-1,-1,-1,-1,-1,-1,-1,-1] +; FMA-INFS-NEXT: vmovaps {{.*#+}} ymm4 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0] ; FMA-INFS-NEXT: vsubps %ymm4, %ymm1, %ymm1 ; FMA-INFS-NEXT: vsubps %ymm4, %ymm0, %ymm0 ; FMA-INFS-NEXT: vmulps %ymm2, %ymm0, %ymm0 @@ -732,7 +732,7 @@ define <16 x float> @test_v16f32_mul_sub_x_negone_y(<16 x float> %x, <16 x float ; ; FMA4-INFS-LABEL: test_v16f32_mul_sub_x_negone_y: ; FMA4-INFS: # %bb.0: -; FMA4-INFS-NEXT: vmovaps {{.*#+}} ymm4 = [-1,-1,-1,-1,-1,-1,-1,-1] +; FMA4-INFS-NEXT: vmovaps {{.*#+}} ymm4 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0] ; FMA4-INFS-NEXT: vsubps %ymm4, %ymm1, %ymm1 ; FMA4-INFS-NEXT: vsubps %ymm4, %ymm0, %ymm0 ; FMA4-INFS-NEXT: vmulps %ymm2, %ymm0, %ymm0 @@ -769,7 +769,7 @@ define <16 x float> @test_v16f32_mul_sub_x_negone_y(<16 x float> %x, <16 x float define <8 x double> @test_v8f64_mul_y_sub_x_negone(<8 x double> %x, <8 x double> %y) { ; FMA-INFS-LABEL: test_v8f64_mul_y_sub_x_negone: ; FMA-INFS: # %bb.0: -; FMA-INFS-NEXT: vmovapd {{.*#+}} ymm4 = [-1,-1,-1,-1] +; FMA-INFS-NEXT: vmovapd {{.*#+}} ymm4 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0] ; FMA-INFS-NEXT: vsubpd %ymm4, %ymm1, %ymm1 ; FMA-INFS-NEXT: vsubpd %ymm4, %ymm0, %ymm0 ; FMA-INFS-NEXT: vmulpd %ymm0, %ymm2, %ymm0 @@ -778,7 +778,7 @@ define <8 x double> @test_v8f64_mul_y_sub_x_negone(<8 x double> %x, <8 x double> ; ; FMA4-INFS-LABEL: test_v8f64_mul_y_sub_x_negone: ; FMA4-INFS: # %bb.0: -; FMA4-INFS-NEXT: vmovapd {{.*#+}} ymm4 = [-1,-1,-1,-1] +; FMA4-INFS-NEXT: vmovapd {{.*#+}} ymm4 = [-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0] ; FMA4-INFS-NEXT: vsubpd %ymm4, %ymm1, %ymm1 ; FMA4-INFS-NEXT: vsubpd %ymm4, %ymm0, %ymm0 ; FMA4-INFS-NEXT: vmulpd %ymm0, %ymm2, %ymm0 @@ -819,7 +819,7 @@ define <8 x double> @test_v8f64_mul_y_sub_x_negone(<8 x double> %x, <8 x double> define <16 x float> @test_v16f32_interp(<16 x float> %x, <16 x float> %y, <16 x float> %t) { ; FMA-INFS-LABEL: test_v16f32_interp: ; FMA-INFS: # %bb.0: -; FMA-INFS-NEXT: vmovaps {{.*#+}} ymm6 = [1,1,1,1,1,1,1,1] +; FMA-INFS-NEXT: vmovaps {{.*#+}} ymm6 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA-INFS-NEXT: vsubps %ymm4, %ymm6, %ymm7 ; FMA-INFS-NEXT: vsubps %ymm5, %ymm6, %ymm6 ; FMA-INFS-NEXT: vmulps %ymm6, %ymm3, %ymm3 @@ -830,7 +830,7 @@ define <16 x float> @test_v16f32_interp(<16 x float> %x, <16 x float> %y, <16 x ; ; FMA4-INFS-LABEL: test_v16f32_interp: ; FMA4-INFS: # %bb.0: -; FMA4-INFS-NEXT: vmovaps {{.*#+}} ymm6 = [1,1,1,1,1,1,1,1] +; FMA4-INFS-NEXT: vmovaps {{.*#+}} ymm6 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA4-INFS-NEXT: vsubps %ymm4, %ymm6, %ymm7 ; FMA4-INFS-NEXT: vsubps %ymm5, %ymm6, %ymm6 ; FMA4-INFS-NEXT: vmulps %ymm6, %ymm3, %ymm3 @@ -841,7 +841,7 @@ define <16 x float> @test_v16f32_interp(<16 x float> %x, <16 x float> %y, <16 x ; ; AVX512-INFS-LABEL: test_v16f32_interp: ; AVX512-INFS: # %bb.0: -; AVX512-INFS-NEXT: vbroadcastss {{.*#+}} zmm3 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] +; AVX512-INFS-NEXT: vbroadcastss {{.*#+}} zmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX512-INFS-NEXT: vsubps %zmm2, %zmm3, %zmm3 ; AVX512-INFS-NEXT: vmulps %zmm3, %zmm1, %zmm1 ; AVX512-INFS-NEXT: vfmadd213ps {{.*#+}} zmm0 = (zmm2 * zmm0) + zmm1 @@ -878,7 +878,7 @@ define <16 x float> @test_v16f32_interp(<16 x float> %x, <16 x float> %y, <16 x define <8 x double> @test_v8f64_interp(<8 x double> %x, <8 x double> %y, <8 x double> %t) { ; FMA-INFS-LABEL: test_v8f64_interp: ; FMA-INFS: # %bb.0: -; FMA-INFS-NEXT: vmovapd {{.*#+}} ymm6 = [1,1,1,1] +; FMA-INFS-NEXT: vmovapd {{.*#+}} ymm6 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA-INFS-NEXT: vsubpd %ymm4, %ymm6, %ymm7 ; FMA-INFS-NEXT: vsubpd %ymm5, %ymm6, %ymm6 ; FMA-INFS-NEXT: vmulpd %ymm6, %ymm3, %ymm3 @@ -889,7 +889,7 @@ define <8 x double> @test_v8f64_interp(<8 x double> %x, <8 x double> %y, <8 x do ; ; FMA4-INFS-LABEL: test_v8f64_interp: ; FMA4-INFS: # %bb.0: -; FMA4-INFS-NEXT: vmovapd {{.*#+}} ymm6 = [1,1,1,1] +; FMA4-INFS-NEXT: vmovapd {{.*#+}} ymm6 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA4-INFS-NEXT: vsubpd %ymm4, %ymm6, %ymm7 ; FMA4-INFS-NEXT: vsubpd %ymm5, %ymm6, %ymm6 ; FMA4-INFS-NEXT: vmulpd %ymm6, %ymm3, %ymm3 @@ -900,7 +900,7 @@ define <8 x double> @test_v8f64_interp(<8 x double> %x, <8 x double> %y, <8 x do ; ; AVX512-INFS-LABEL: test_v8f64_interp: ; AVX512-INFS: # %bb.0: -; AVX512-INFS-NEXT: vbroadcastsd {{.*#+}} zmm3 = [1,1,1,1,1,1,1,1] +; AVX512-INFS-NEXT: vbroadcastsd {{.*#+}} zmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX512-INFS-NEXT: vsubpd %zmm2, %zmm3, %zmm3 ; AVX512-INFS-NEXT: vmulpd %zmm3, %zmm1, %zmm1 ; AVX512-INFS-NEXT: vfmadd213pd {{.*#+}} zmm0 = (zmm2 * zmm0) + zmm1 @@ -1143,7 +1143,7 @@ define <8 x double> @test_v8f64_fneg_fmul_no_nsz(<8 x double> %x, <8 x double> % ; FMA: # %bb.0: ; FMA-NEXT: vmulpd %ymm3, %ymm1, %ymm1 ; FMA-NEXT: vmulpd %ymm2, %ymm0, %ymm0 -; FMA-NEXT: vmovapd {{.*#+}} ymm2 = [-0,-0,-0,-0] +; FMA-NEXT: vmovapd {{.*#+}} ymm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; FMA-NEXT: vxorpd %ymm2, %ymm0, %ymm0 ; FMA-NEXT: vxorpd %ymm2, %ymm1, %ymm1 ; FMA-NEXT: retq @@ -1152,7 +1152,7 @@ define <8 x double> @test_v8f64_fneg_fmul_no_nsz(<8 x double> %x, <8 x double> % ; FMA4: # %bb.0: ; FMA4-NEXT: vmulpd %ymm3, %ymm1, %ymm1 ; FMA4-NEXT: vmulpd %ymm2, %ymm0, %ymm0 -; FMA4-NEXT: vmovapd {{.*#+}} ymm2 = [-0,-0,-0,-0] +; FMA4-NEXT: vmovapd {{.*#+}} ymm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; FMA4-NEXT: vxorpd %ymm2, %ymm0, %ymm0 ; FMA4-NEXT: vxorpd %ymm2, %ymm1, %ymm1 ; FMA4-NEXT: retq diff --git a/test/CodeGen/X86/fmul-combines.ll b/test/CodeGen/X86/fmul-combines.ll index 85f86110d05..f9843dced1b 100644 --- a/test/CodeGen/X86/fmul-combines.ll +++ b/test/CodeGen/X86/fmul-combines.ll @@ -61,7 +61,7 @@ define <4 x float> @fmul2_v4f32_undef(<4 x float> %x) { define <4 x float> @constant_fold_fmul_v4f32(<4 x float> %x) { ; CHECK-LABEL: constant_fold_fmul_v4f32: ; CHECK: # %bb.0: -; CHECK-NEXT: movaps {{.*#+}} xmm0 = [8,8,8,8] +; CHECK-NEXT: movaps {{.*#+}} xmm0 = [8.0E+0,8.0E+0,8.0E+0,8.0E+0] ; CHECK-NEXT: retq %y = fmul <4 x float> , ret <4 x float> %y @@ -70,7 +70,7 @@ define <4 x float> @constant_fold_fmul_v4f32(<4 x float> %x) { define <4 x float> @constant_fold_fmul_v4f32_undef(<4 x float> %x) { ; CHECK-LABEL: constant_fold_fmul_v4f32_undef: ; CHECK: # %bb.0: -; CHECK-NEXT: movaps {{.*#+}} xmm0 = [8,NaN,8,NaN] +; CHECK-NEXT: movaps {{.*#+}} xmm0 = [8.0E+0,NaN,8.0E+0,NaN] ; CHECK-NEXT: retq %y = fmul <4 x float> , ret <4 x float> %y diff --git a/test/CodeGen/X86/fold-vector-trunc-sitofp.ll b/test/CodeGen/X86/fold-vector-trunc-sitofp.ll index e53e7f8f9c6..73c7dc1fae5 100644 --- a/test/CodeGen/X86/fold-vector-trunc-sitofp.ll +++ b/test/CodeGen/X86/fold-vector-trunc-sitofp.ll @@ -7,7 +7,7 @@ define <4 x float> @test1() { ; CHECK-LABEL: test1: ; CHECK: # %bb.0: -; CHECK-NEXT: vmovaps {{.*#+}} xmm0 = [-1,0,-1,0] +; CHECK-NEXT: vmovaps {{.*#+}} xmm0 = [-1.0E+0,0.0E+0,-1.0E+0,0.0E+0] ; CHECK-NEXT: ret{{[l|q]}} %1 = trunc <4 x i3> to <4 x i1> %2 = sitofp <4 x i1> %1 to <4 x float> diff --git a/test/CodeGen/X86/insert-into-constant-vector.ll b/test/CodeGen/X86/insert-into-constant-vector.ll index 3c8fbc5819e..9a70bc8fffd 100644 --- a/test/CodeGen/X86/insert-into-constant-vector.ll +++ b/test/CodeGen/X86/insert-into-constant-vector.ll @@ -167,40 +167,40 @@ define <4 x float> @elt1_v4f32(float %x) { ; X32SSE2-LABEL: elt1_v4f32: ; X32SSE2: # %bb.0: ; X32SSE2-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero -; X32SSE2-NEXT: movaps {{.*#+}} xmm1 = <42,u,2,3> +; X32SSE2-NEXT: movaps {{.*#+}} xmm1 = <4.2E+1,u,2.0E+0,3.0E+0> ; X32SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0] ; X32SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3] ; X32SSE2-NEXT: retl ; ; X64SSE2-LABEL: elt1_v4f32: ; X64SSE2: # %bb.0: -; X64SSE2-NEXT: movaps {{.*#+}} xmm1 = <42,u,2,3> +; X64SSE2-NEXT: movaps {{.*#+}} xmm1 = <4.2E+1,u,2.0E+0,3.0E+0> ; X64SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0] ; X64SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3] ; X64SSE2-NEXT: retq ; ; X32SSE4-LABEL: elt1_v4f32: ; X32SSE4: # %bb.0: -; X32SSE4-NEXT: movaps {{.*#+}} xmm0 = <42,u,2,3> +; X32SSE4-NEXT: movaps {{.*#+}} xmm0 = <4.2E+1,u,2.0E+0,3.0E+0> ; X32SSE4-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[2,3] ; X32SSE4-NEXT: retl ; ; X64SSE4-LABEL: elt1_v4f32: ; X64SSE4: # %bb.0: -; X64SSE4-NEXT: movaps {{.*#+}} xmm1 = <42,u,2,3> +; X64SSE4-NEXT: movaps {{.*#+}} xmm1 = <4.2E+1,u,2.0E+0,3.0E+0> ; X64SSE4-NEXT: insertps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[2,3] ; X64SSE4-NEXT: movaps %xmm1, %xmm0 ; X64SSE4-NEXT: retq ; ; X32AVX-LABEL: elt1_v4f32: ; X32AVX: # %bb.0: -; X32AVX-NEXT: vmovaps {{.*#+}} xmm0 = <42,u,2,3> +; X32AVX-NEXT: vmovaps {{.*#+}} xmm0 = <4.2E+1,u,2.0E+0,3.0E+0> ; X32AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[2,3] ; X32AVX-NEXT: retl ; ; X64AVX-LABEL: elt1_v4f32: ; X64AVX: # %bb.0: -; X64AVX-NEXT: vmovaps {{.*#+}} xmm1 = <42,u,2,3> +; X64AVX-NEXT: vmovaps {{.*#+}} xmm1 = <4.2E+1,u,2.0E+0,3.0E+0> ; X64AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3] ; X64AVX-NEXT: retq %ins = insertelement <4 x float> , float %x, i32 1 @@ -210,26 +210,26 @@ define <4 x float> @elt1_v4f32(float %x) { define <2 x double> @elt1_v2f64(double %x) { ; X32SSE-LABEL: elt1_v2f64: ; X32SSE: # %bb.0: -; X32SSE-NEXT: movapd {{.*#+}} xmm0 = <42,u> +; X32SSE-NEXT: movapd {{.*#+}} xmm0 = <4.2E+1,u> ; X32SSE-NEXT: movhpd {{.*#+}} xmm0 = xmm0[0],mem[0] ; X32SSE-NEXT: retl ; ; X64SSE-LABEL: elt1_v2f64: ; X64SSE: # %bb.0: -; X64SSE-NEXT: movaps {{.*#+}} xmm1 = <42,u> +; X64SSE-NEXT: movaps {{.*#+}} xmm1 = <4.2E+1,u> ; X64SSE-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0] ; X64SSE-NEXT: movaps %xmm1, %xmm0 ; X64SSE-NEXT: retq ; ; X32AVX-LABEL: elt1_v2f64: ; X32AVX: # %bb.0: -; X32AVX-NEXT: vmovapd {{.*#+}} xmm0 = <42,u> +; X32AVX-NEXT: vmovapd {{.*#+}} xmm0 = <4.2E+1,u> ; X32AVX-NEXT: vmovhpd {{.*#+}} xmm0 = xmm0[0],mem[0] ; X32AVX-NEXT: retl ; ; X64AVX-LABEL: elt1_v2f64: ; X64AVX: # %bb.0: -; X64AVX-NEXT: vmovaps {{.*#+}} xmm1 = <42,u> +; X64AVX-NEXT: vmovaps {{.*#+}} xmm1 = <4.2E+1,u> ; X64AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0] ; X64AVX-NEXT: retq %ins = insertelement <2 x double> , double %x, i32 1 @@ -292,37 +292,37 @@ define <8 x float> @elt6_v8f32(float %x) { ; X32SSE2-LABEL: elt6_v8f32: ; X32SSE2: # %bb.0: ; X32SSE2-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero -; X32SSE2-NEXT: movaps {{.*#+}} xmm1 = <4,5,u,7> +; X32SSE2-NEXT: movaps {{.*#+}} xmm1 = <4.0E+0,5.0E+0,u,7.0E+0> ; X32SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0] ; X32SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,2] -; X32SSE2-NEXT: movaps {{.*#+}} xmm0 = [42,1,2,3] +; X32SSE2-NEXT: movaps {{.*#+}} xmm0 = [4.2E+1,1.0E+0,2.0E+0,3.0E+0] ; X32SSE2-NEXT: retl ; ; X64SSE2-LABEL: elt6_v8f32: ; X64SSE2: # %bb.0: -; X64SSE2-NEXT: movaps {{.*#+}} xmm1 = <4,5,u,7> +; X64SSE2-NEXT: movaps {{.*#+}} xmm1 = <4.0E+0,5.0E+0,u,7.0E+0> ; X64SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0] ; X64SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,2] -; X64SSE2-NEXT: movaps {{.*#+}} xmm0 = [42,1,2,3] +; X64SSE2-NEXT: movaps {{.*#+}} xmm0 = [4.2E+1,1.0E+0,2.0E+0,3.0E+0] ; X64SSE2-NEXT: retq ; ; X32SSE4-LABEL: elt6_v8f32: ; X32SSE4: # %bb.0: -; X32SSE4-NEXT: movaps {{.*#+}} xmm1 = <4,5,u,7> +; X32SSE4-NEXT: movaps {{.*#+}} xmm1 = <4.0E+0,5.0E+0,u,7.0E+0> ; X32SSE4-NEXT: insertps {{.*#+}} xmm1 = xmm1[0,1],mem[0],xmm1[3] -; X32SSE4-NEXT: movaps {{.*#+}} xmm0 = [42,1,2,3] +; X32SSE4-NEXT: movaps {{.*#+}} xmm0 = [4.2E+1,1.0E+0,2.0E+0,3.0E+0] ; X32SSE4-NEXT: retl ; ; X64SSE4-LABEL: elt6_v8f32: ; X64SSE4: # %bb.0: -; X64SSE4-NEXT: movaps {{.*#+}} xmm1 = <4,5,u,7> +; X64SSE4-NEXT: movaps {{.*#+}} xmm1 = <4.0E+0,5.0E+0,u,7.0E+0> ; X64SSE4-NEXT: insertps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0],xmm1[3] -; X64SSE4-NEXT: movaps {{.*#+}} xmm0 = [42,1,2,3] +; X64SSE4-NEXT: movaps {{.*#+}} xmm0 = [4.2E+1,1.0E+0,2.0E+0,3.0E+0] ; X64SSE4-NEXT: retq ; ; X32AVX-LABEL: elt6_v8f32: ; X32AVX: # %bb.0: -; X32AVX-NEXT: vmovaps {{.*#+}} ymm0 = <42,1,2,3,4,5,u,7> +; X32AVX-NEXT: vmovaps {{.*#+}} ymm0 = <4.2E+1,1.0E+0,2.0E+0,3.0E+0,4.0E+0,5.0E+0,u,7.0E+0> ; X32AVX-NEXT: vextractf128 $1, %ymm0, %xmm1 ; X32AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],mem[0],xmm1[3] ; X32AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 @@ -330,7 +330,7 @@ define <8 x float> @elt6_v8f32(float %x) { ; ; X64AVX-LABEL: elt6_v8f32: ; X64AVX: # %bb.0: -; X64AVX-NEXT: vmovaps {{.*#+}} ymm1 = <42,1,2,3,4,5,u,7> +; X64AVX-NEXT: vmovaps {{.*#+}} ymm1 = <4.2E+1,1.0E+0,2.0E+0,3.0E+0,4.0E+0,5.0E+0,u,7.0E+0> ; X64AVX-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X64AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm2[0,1],xmm0[0],xmm2[3] ; X64AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 @@ -413,49 +413,49 @@ define <8 x i64> @elt5_v8i64(i64 %x) { define <8 x double> @elt1_v8f64(double %x) { ; X32SSE-LABEL: elt1_v8f64: ; X32SSE: # %bb.0: -; X32SSE-NEXT: movapd {{.*#+}} xmm0 = <42,u> +; X32SSE-NEXT: movapd {{.*#+}} xmm0 = <4.2E+1,u> ; X32SSE-NEXT: movhpd {{.*#+}} xmm0 = xmm0[0],mem[0] -; X32SSE-NEXT: movaps {{.*#+}} xmm1 = [2,3] -; X32SSE-NEXT: movaps {{.*#+}} xmm2 = [4,5] -; X32SSE-NEXT: movaps {{.*#+}} xmm3 = [6,7] +; X32SSE-NEXT: movaps {{.*#+}} xmm1 = [2.0E+0,3.0E+0] +; X32SSE-NEXT: movaps {{.*#+}} xmm2 = [4.0E+0,5.0E+0] +; X32SSE-NEXT: movaps {{.*#+}} xmm3 = [6.0E+0,7.0E+0] ; X32SSE-NEXT: retl ; ; X64SSE-LABEL: elt1_v8f64: ; X64SSE: # %bb.0: -; X64SSE-NEXT: movaps {{.*#+}} xmm4 = <42,u> +; X64SSE-NEXT: movaps {{.*#+}} xmm4 = <4.2E+1,u> ; X64SSE-NEXT: movlhps {{.*#+}} xmm4 = xmm4[0],xmm0[0] -; X64SSE-NEXT: movaps {{.*#+}} xmm1 = [2,3] -; X64SSE-NEXT: movaps {{.*#+}} xmm2 = [4,5] -; X64SSE-NEXT: movaps {{.*#+}} xmm3 = [6,7] +; X64SSE-NEXT: movaps {{.*#+}} xmm1 = [2.0E+0,3.0E+0] +; X64SSE-NEXT: movaps {{.*#+}} xmm2 = [4.0E+0,5.0E+0] +; X64SSE-NEXT: movaps {{.*#+}} xmm3 = [6.0E+0,7.0E+0] ; X64SSE-NEXT: movaps %xmm4, %xmm0 ; X64SSE-NEXT: retq ; ; X32AVX2-LABEL: elt1_v8f64: ; X32AVX2: # %bb.0: -; X32AVX2-NEXT: vmovapd {{.*#+}} ymm0 = <42,u,2,3> +; X32AVX2-NEXT: vmovapd {{.*#+}} ymm0 = <4.2E+1,u,2.0E+0,3.0E+0> ; X32AVX2-NEXT: vmovhpd {{.*#+}} xmm1 = xmm0[0],mem[0] ; X32AVX2-NEXT: vblendpd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3] -; X32AVX2-NEXT: vmovaps {{.*#+}} ymm1 = [4,5,6,7] +; X32AVX2-NEXT: vmovaps {{.*#+}} ymm1 = [4.0E+0,5.0E+0,6.0E+0,7.0E+0] ; X32AVX2-NEXT: retl ; ; X64AVX2-LABEL: elt1_v8f64: ; X64AVX2: # %bb.0: -; X64AVX2-NEXT: vmovaps {{.*#+}} ymm1 = <42,u,2,3> +; X64AVX2-NEXT: vmovaps {{.*#+}} ymm1 = <4.2E+1,u,2.0E+0,3.0E+0> ; X64AVX2-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0] ; X64AVX2-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5,6,7] -; X64AVX2-NEXT: vmovaps {{.*#+}} ymm1 = [4,5,6,7] +; X64AVX2-NEXT: vmovaps {{.*#+}} ymm1 = [4.0E+0,5.0E+0,6.0E+0,7.0E+0] ; X64AVX2-NEXT: retq ; ; X32AVX512F-LABEL: elt1_v8f64: ; X32AVX512F: # %bb.0: -; X32AVX512F-NEXT: vmovapd {{.*#+}} zmm0 = <42,u,2,3,4,5,6,7> +; X32AVX512F-NEXT: vmovapd {{.*#+}} zmm0 = <4.2E+1,u,2.0E+0,3.0E+0,4.0E+0,5.0E+0,6.0E+0,7.0E+0> ; X32AVX512F-NEXT: vmovhpd {{.*#+}} xmm1 = xmm0[0],mem[0] ; X32AVX512F-NEXT: vinsertf32x4 $0, %xmm1, %zmm0, %zmm0 ; X32AVX512F-NEXT: retl ; ; X64AVX512F-LABEL: elt1_v8f64: ; X64AVX512F: # %bb.0: -; X64AVX512F-NEXT: vmovaps {{.*#+}} zmm1 = <42,u,2,3,4,5,6,7> +; X64AVX512F-NEXT: vmovaps {{.*#+}} zmm1 = <4.2E+1,u,2.0E+0,3.0E+0,4.0E+0,5.0E+0,6.0E+0,7.0E+0> ; X64AVX512F-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0] ; X64AVX512F-NEXT: vinsertf32x4 $0, %xmm0, %zmm1, %zmm0 ; X64AVX512F-NEXT: retq diff --git a/test/CodeGen/X86/packss.ll b/test/CodeGen/X86/packss.ll index 2a4ee1f783f..3feb0d04f04 100644 --- a/test/CodeGen/X86/packss.ll +++ b/test/CodeGen/X86/packss.ll @@ -166,7 +166,7 @@ define <8 x i16> @trunc_ashr_v4i64_demandedelts(<4 x i64> %a0) { ; X86-SSE-NEXT: movsd {{.*#+}} xmm4 = xmm2[0],xmm4[1] ; X86-SSE-NEXT: psrlq $63, %xmm4 ; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1] -; X86-SSE-NEXT: movapd {{.*#+}} xmm2 = [4.9406564584124654E-324,-0] +; X86-SSE-NEXT: movapd {{.*#+}} xmm2 = [4.9406564584124654E-324,-0.0E+0] ; X86-SSE-NEXT: xorpd %xmm2, %xmm0 ; X86-SSE-NEXT: psubq %xmm2, %xmm0 ; X86-SSE-NEXT: psrlq $63, %xmm3 diff --git a/test/CodeGen/X86/pow.ll b/test/CodeGen/X86/pow.ll index f170488cb2f..45600540289 100644 --- a/test/CodeGen/X86/pow.ll +++ b/test/CodeGen/X86/pow.ll @@ -56,11 +56,11 @@ define <4 x float> @pow_v4f32_one_fourth_fmf(<4 x float> %x) nounwind { ; CHECK-NEXT: rsqrtps %xmm0, %xmm1 ; CHECK-NEXT: movaps %xmm0, %xmm2 ; CHECK-NEXT: mulps %xmm1, %xmm2 -; CHECK-NEXT: movaps {{.*#+}} xmm3 = [-0.5,-0.5,-0.5,-0.5] +; CHECK-NEXT: movaps {{.*#+}} xmm3 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; CHECK-NEXT: movaps %xmm2, %xmm4 ; CHECK-NEXT: mulps %xmm3, %xmm4 ; CHECK-NEXT: mulps %xmm1, %xmm2 -; CHECK-NEXT: movaps {{.*#+}} xmm1 = [-3,-3,-3,-3] +; CHECK-NEXT: movaps {{.*#+}} xmm1 = [-3.0E+0,-3.0E+0,-3.0E+0,-3.0E+0] ; CHECK-NEXT: addps %xmm1, %xmm2 ; CHECK-NEXT: mulps %xmm4, %xmm2 ; CHECK-NEXT: xorps %xmm4, %xmm4 diff --git a/test/CodeGen/X86/pr2656.ll b/test/CodeGen/X86/pr2656.ll index dc1fd88e425..53d1ea79f48 100644 --- a/test/CodeGen/X86/pr2656.ll +++ b/test/CodeGen/X86/pr2656.ll @@ -19,7 +19,7 @@ define void @foo(%struct.anon* byval %p) nounwind { ; CHECK-NEXT: subl $28, %esp ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero -; CHECK-NEXT: movaps {{.*#+}} xmm2 = [-0,-0,-0,-0] +; CHECK-NEXT: movaps {{.*#+}} xmm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] ; CHECK-NEXT: xorps %xmm2, %xmm0 ; CHECK-NEXT: cvtss2sd %xmm0, %xmm0 ; CHECK-NEXT: xorps %xmm2, %xmm1 diff --git a/test/CodeGen/X86/pr38639.ll b/test/CodeGen/X86/pr38639.ll index 4218db41185..bea6c84279f 100644 --- a/test/CodeGen/X86/pr38639.ll +++ b/test/CodeGen/X86/pr38639.ll @@ -4,11 +4,11 @@ define <8 x double> @test(<4 x double> %a, <4 x double> %b) { ; CHECK-LABEL: test: ; CHECK: # %bb.0: -; CHECK-NEXT: vmovaps {{.*#+}} ymm1 = +; CHECK-NEXT: vmovaps {{.*#+}} ymm1 = ; CHECK-NEXT: vblendps {{.*#+}} ymm2 = ymm0[0,1,2,3],ymm1[4,5,6,7] ; CHECK-NEXT: vblendps {{.*#+}} ymm1 = ymm0[0,1],ymm1[2,3],ymm0[4,5,6,7] ; CHECK-NEXT: vunpckhpd {{.*#+}} ymm1 = ymm1[1],ymm2[1],ymm1[3],ymm2[3] -; CHECK-NEXT: vmovaps {{.*#+}} xmm2 = [0.82071743224100002,0.82071743224100002] +; CHECK-NEXT: vmovaps {{.*#+}} xmm2 = [8.2071743224100002E-1,8.2071743224100002E-1] ; CHECK-NEXT: vblendps {{.*#+}} ymm0 = ymm2[0,1,2,3],ymm0[4,5,6,7] ; CHECK-NEXT: retq %1 = shufflevector <4 x double> %a, <4 x double> , <8 x i32> diff --git a/test/CodeGen/X86/recip-fastmath.ll b/test/CodeGen/X86/recip-fastmath.ll index 9e68636f904..a68940eb11a 100644 --- a/test/CodeGen/X86/recip-fastmath.ll +++ b/test/CodeGen/X86/recip-fastmath.ll @@ -307,62 +307,62 @@ define float @f32_two_step(float %x) #2 { define <4 x float> @v4f32_no_estimate(<4 x float> %x) #0 { ; SSE-LABEL: v4f32_no_estimate: ; SSE: # %bb.0: -; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,1,1,1] +; SSE-NEXT: movaps {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; SSE-NEXT: divps %xmm0, %xmm1 ; SSE-NEXT: movaps %xmm1, %xmm0 ; SSE-NEXT: retq ; ; AVX-RECIP-LABEL: v4f32_no_estimate: ; AVX-RECIP: # %bb.0: -; AVX-RECIP-NEXT: vmovaps {{.*#+}} xmm1 = [1,1,1,1] +; AVX-RECIP-NEXT: vmovaps {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX-RECIP-NEXT: vdivps %xmm0, %xmm1, %xmm0 ; AVX-RECIP-NEXT: retq ; ; FMA-RECIP-LABEL: v4f32_no_estimate: ; FMA-RECIP: # %bb.0: -; FMA-RECIP-NEXT: vmovaps {{.*#+}} xmm1 = [1,1,1,1] +; FMA-RECIP-NEXT: vmovaps {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA-RECIP-NEXT: vdivps %xmm0, %xmm1, %xmm0 ; FMA-RECIP-NEXT: retq ; ; BDVER2-LABEL: v4f32_no_estimate: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovaps {{.*#+}} xmm1 = [1,1,1,1] sched: [5:0.50] +; BDVER2-NEXT: vmovaps {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:0.50] ; BDVER2-NEXT: vdivps %xmm0, %xmm1, %xmm0 # sched: [9:9.50] ; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: v4f32_no_estimate: ; BTVER2: # %bb.0: -; BTVER2-NEXT: vmovaps {{.*#+}} xmm1 = [1,1,1,1] sched: [5:1.00] +; BTVER2-NEXT: vmovaps {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:1.00] ; BTVER2-NEXT: vdivps %xmm0, %xmm1, %xmm0 # sched: [19:19.00] ; BTVER2-NEXT: retq # sched: [4:1.00] ; ; SANDY-LABEL: v4f32_no_estimate: ; SANDY: # %bb.0: -; SANDY-NEXT: vmovaps {{.*#+}} xmm1 = [1,1,1,1] sched: [6:0.50] +; SANDY-NEXT: vmovaps {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [6:0.50] ; SANDY-NEXT: vdivps %xmm0, %xmm1, %xmm0 # sched: [14:14.00] ; SANDY-NEXT: retq # sched: [1:1.00] ; ; HASWELL-LABEL: v4f32_no_estimate: ; HASWELL: # %bb.0: -; HASWELL-NEXT: vbroadcastss {{.*#+}} xmm1 = [1,1,1,1] sched: [6:0.50] +; HASWELL-NEXT: vbroadcastss {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [6:0.50] ; HASWELL-NEXT: vdivps %xmm0, %xmm1, %xmm0 # sched: [13:7.00] ; HASWELL-NEXT: retq # sched: [7:1.00] ; ; HASWELL-NO-FMA-LABEL: v4f32_no_estimate: ; HASWELL-NO-FMA: # %bb.0: -; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} xmm1 = [1,1,1,1] +; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; HASWELL-NO-FMA-NEXT: vdivps %xmm0, %xmm1, %xmm0 ; HASWELL-NO-FMA-NEXT: retq ; ; KNL-LABEL: v4f32_no_estimate: ; KNL: # %bb.0: -; KNL-NEXT: vbroadcastss {{.*#+}} xmm1 = [1,1,1,1] sched: [6:0.50] +; KNL-NEXT: vbroadcastss {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [6:0.50] ; KNL-NEXT: vdivps %xmm0, %xmm1, %xmm0 # sched: [13:7.00] ; KNL-NEXT: retq # sched: [7:1.00] ; ; SKX-LABEL: v4f32_no_estimate: ; SKX: # %bb.0: -; SKX-NEXT: vbroadcastss {{.*#+}} xmm1 = [1,1,1,1] sched: [6:0.50] +; SKX-NEXT: vbroadcastss {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [6:0.50] ; SKX-NEXT: vdivps %xmm0, %xmm1, %xmm0 # sched: [11:3.00] ; SKX-NEXT: retq # sched: [7:1.00] %div = fdiv fast <4 x float> , %x @@ -374,7 +374,7 @@ define <4 x float> @v4f32_one_step(<4 x float> %x) #1 { ; SSE: # %bb.0: ; SSE-NEXT: rcpps %xmm0, %xmm2 ; SSE-NEXT: mulps %xmm2, %xmm0 -; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,1,1,1] +; SSE-NEXT: movaps {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; SSE-NEXT: subps %xmm0, %xmm1 ; SSE-NEXT: mulps %xmm2, %xmm1 ; SSE-NEXT: addps %xmm2, %xmm1 @@ -385,7 +385,7 @@ define <4 x float> @v4f32_one_step(<4 x float> %x) #1 { ; AVX-RECIP: # %bb.0: ; AVX-RECIP-NEXT: vrcpps %xmm0, %xmm1 ; AVX-RECIP-NEXT: vmulps %xmm1, %xmm0, %xmm0 -; AVX-RECIP-NEXT: vmovaps {{.*#+}} xmm2 = [1,1,1,1] +; AVX-RECIP-NEXT: vmovaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX-RECIP-NEXT: vsubps %xmm0, %xmm2, %xmm0 ; AVX-RECIP-NEXT: vmulps %xmm0, %xmm1, %xmm0 ; AVX-RECIP-NEXT: vaddps %xmm0, %xmm1, %xmm0 @@ -407,7 +407,7 @@ define <4 x float> @v4f32_one_step(<4 x float> %x) #1 { ; ; BTVER2-LABEL: v4f32_one_step: ; BTVER2: # %bb.0: -; BTVER2-NEXT: vmovaps {{.*#+}} xmm2 = [1,1,1,1] sched: [5:1.00] +; BTVER2-NEXT: vmovaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:1.00] ; BTVER2-NEXT: vrcpps %xmm0, %xmm1 # sched: [2:1.00] ; BTVER2-NEXT: vmulps %xmm1, %xmm0, %xmm0 # sched: [2:1.00] ; BTVER2-NEXT: vsubps %xmm0, %xmm2, %xmm0 # sched: [3:1.00] @@ -419,7 +419,7 @@ define <4 x float> @v4f32_one_step(<4 x float> %x) #1 { ; SANDY: # %bb.0: ; SANDY-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00] ; SANDY-NEXT: vmulps %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; SANDY-NEXT: vmovaps {{.*#+}} xmm2 = [1,1,1,1] sched: [6:0.50] +; SANDY-NEXT: vmovaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [6:0.50] ; SANDY-NEXT: vsubps %xmm0, %xmm2, %xmm0 # sched: [3:1.00] ; SANDY-NEXT: vmulps %xmm0, %xmm1, %xmm0 # sched: [5:1.00] ; SANDY-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [3:1.00] @@ -428,7 +428,7 @@ define <4 x float> @v4f32_one_step(<4 x float> %x) #1 { ; HASWELL-LABEL: v4f32_one_step: ; HASWELL: # %bb.0: ; HASWELL-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00] -; HASWELL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [6:0.50] +; HASWELL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [6:0.50] ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) + xmm2 sched: [5:0.50] ; HASWELL-NEXT: vfmadd132ps {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm1 sched: [5:0.50] ; HASWELL-NEXT: retq # sched: [7:1.00] @@ -437,7 +437,7 @@ define <4 x float> @v4f32_one_step(<4 x float> %x) #1 { ; HASWELL-NO-FMA: # %bb.0: ; HASWELL-NO-FMA-NEXT: vrcpps %xmm0, %xmm1 ; HASWELL-NO-FMA-NEXT: vmulps %xmm1, %xmm0, %xmm0 -; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] +; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; HASWELL-NO-FMA-NEXT: vsubps %xmm0, %xmm2, %xmm0 ; HASWELL-NO-FMA-NEXT: vmulps %xmm0, %xmm1, %xmm0 ; HASWELL-NO-FMA-NEXT: vaddps %xmm0, %xmm1, %xmm0 @@ -446,7 +446,7 @@ define <4 x float> @v4f32_one_step(<4 x float> %x) #1 { ; KNL-LABEL: v4f32_one_step: ; KNL: # %bb.0: ; KNL-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00] -; KNL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [6:0.50] +; KNL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [6:0.50] ; KNL-NEXT: vfnmadd213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) + xmm2 sched: [5:0.50] ; KNL-NEXT: vfmadd132ps {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm1 sched: [5:0.50] ; KNL-NEXT: retq # sched: [7:1.00] @@ -467,7 +467,7 @@ define <4 x float> @v4f32_two_step(<4 x float> %x) #2 { ; SSE-NEXT: rcpps %xmm0, %xmm2 ; SSE-NEXT: movaps %xmm0, %xmm3 ; SSE-NEXT: mulps %xmm2, %xmm3 -; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,1,1,1] +; SSE-NEXT: movaps {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; SSE-NEXT: movaps %xmm1, %xmm4 ; SSE-NEXT: subps %xmm3, %xmm4 ; SSE-NEXT: mulps %xmm2, %xmm4 @@ -483,7 +483,7 @@ define <4 x float> @v4f32_two_step(<4 x float> %x) #2 { ; AVX-RECIP: # %bb.0: ; AVX-RECIP-NEXT: vrcpps %xmm0, %xmm1 ; AVX-RECIP-NEXT: vmulps %xmm1, %xmm0, %xmm2 -; AVX-RECIP-NEXT: vmovaps {{.*#+}} xmm3 = [1,1,1,1] +; AVX-RECIP-NEXT: vmovaps {{.*#+}} xmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX-RECIP-NEXT: vsubps %xmm2, %xmm3, %xmm2 ; AVX-RECIP-NEXT: vmulps %xmm2, %xmm1, %xmm2 ; AVX-RECIP-NEXT: vaddps %xmm2, %xmm1, %xmm1 @@ -496,7 +496,7 @@ define <4 x float> @v4f32_two_step(<4 x float> %x) #2 { ; FMA-RECIP-LABEL: v4f32_two_step: ; FMA-RECIP: # %bb.0: ; FMA-RECIP-NEXT: vrcpps %xmm0, %xmm1 -; FMA-RECIP-NEXT: vmovaps {{.*#+}} xmm2 = [1,1,1,1] +; FMA-RECIP-NEXT: vmovaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA-RECIP-NEXT: vmovaps %xmm1, %xmm3 ; FMA-RECIP-NEXT: vfnmadd213ps {{.*#+}} xmm3 = -(xmm0 * xmm3) + xmm2 ; FMA-RECIP-NEXT: vfmadd132ps {{.*#+}} xmm3 = (xmm3 * xmm1) + xmm1 @@ -507,7 +507,7 @@ define <4 x float> @v4f32_two_step(<4 x float> %x) #2 { ; BDVER2-LABEL: v4f32_two_step: ; BDVER2: # %bb.0: ; BDVER2-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00] -; BDVER2-NEXT: vmovaps {{.*#+}} xmm2 = [1,1,1,1] sched: [5:0.50] +; BDVER2-NEXT: vmovaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %xmm2, %xmm1, %xmm0, %xmm3 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddps %xmm1, %xmm3, %xmm1, %xmm1 # sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:0.50] @@ -516,7 +516,7 @@ define <4 x float> @v4f32_two_step(<4 x float> %x) #2 { ; ; BTVER2-LABEL: v4f32_two_step: ; BTVER2: # %bb.0: -; BTVER2-NEXT: vmovaps {{.*#+}} xmm3 = [1,1,1,1] sched: [5:1.00] +; BTVER2-NEXT: vmovaps {{.*#+}} xmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:1.00] ; BTVER2-NEXT: vrcpps %xmm0, %xmm1 # sched: [2:1.00] ; BTVER2-NEXT: vmulps %xmm1, %xmm0, %xmm2 # sched: [2:1.00] ; BTVER2-NEXT: vsubps %xmm2, %xmm3, %xmm2 # sched: [3:1.00] @@ -532,7 +532,7 @@ define <4 x float> @v4f32_two_step(<4 x float> %x) #2 { ; SANDY: # %bb.0: ; SANDY-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00] ; SANDY-NEXT: vmulps %xmm1, %xmm0, %xmm2 # sched: [5:1.00] -; SANDY-NEXT: vmovaps {{.*#+}} xmm3 = [1,1,1,1] sched: [6:0.50] +; SANDY-NEXT: vmovaps {{.*#+}} xmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [6:0.50] ; SANDY-NEXT: vsubps %xmm2, %xmm3, %xmm2 # sched: [3:1.00] ; SANDY-NEXT: vmulps %xmm2, %xmm1, %xmm2 # sched: [5:1.00] ; SANDY-NEXT: vaddps %xmm2, %xmm1, %xmm1 # sched: [3:1.00] @@ -545,7 +545,7 @@ define <4 x float> @v4f32_two_step(<4 x float> %x) #2 { ; HASWELL-LABEL: v4f32_two_step: ; HASWELL: # %bb.0: ; HASWELL-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00] -; HASWELL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [6:0.50] +; HASWELL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [6:0.50] ; HASWELL-NEXT: vmovaps %xmm1, %xmm3 # sched: [1:1.00] ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} xmm3 = -(xmm0 * xmm3) + xmm2 sched: [5:0.50] ; HASWELL-NEXT: vfmadd132ps {{.*#+}} xmm3 = (xmm3 * xmm1) + xmm1 sched: [5:0.50] @@ -557,7 +557,7 @@ define <4 x float> @v4f32_two_step(<4 x float> %x) #2 { ; HASWELL-NO-FMA: # %bb.0: ; HASWELL-NO-FMA-NEXT: vrcpps %xmm0, %xmm1 ; HASWELL-NO-FMA-NEXT: vmulps %xmm1, %xmm0, %xmm2 -; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} xmm3 = [1,1,1,1] +; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} xmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; HASWELL-NO-FMA-NEXT: vsubps %xmm2, %xmm3, %xmm2 ; HASWELL-NO-FMA-NEXT: vmulps %xmm2, %xmm1, %xmm2 ; HASWELL-NO-FMA-NEXT: vaddps %xmm2, %xmm1, %xmm1 @@ -570,7 +570,7 @@ define <4 x float> @v4f32_two_step(<4 x float> %x) #2 { ; KNL-LABEL: v4f32_two_step: ; KNL: # %bb.0: ; KNL-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00] -; KNL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [6:0.50] +; KNL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [6:0.50] ; KNL-NEXT: vmovaps %xmm1, %xmm3 # sched: [1:1.00] ; KNL-NEXT: vfnmadd213ps {{.*#+}} xmm3 = -(xmm0 * xmm3) + xmm2 sched: [5:0.50] ; KNL-NEXT: vfmadd132ps {{.*#+}} xmm3 = (xmm3 * xmm1) + xmm1 sched: [5:0.50] @@ -581,7 +581,7 @@ define <4 x float> @v4f32_two_step(<4 x float> %x) #2 { ; SKX-LABEL: v4f32_two_step: ; SKX: # %bb.0: ; SKX-NEXT: vrcpps %xmm0, %xmm1 # sched: [4:1.00] -; SKX-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [6:0.50] +; SKX-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [6:0.50] ; SKX-NEXT: vmovaps %xmm1, %xmm3 # sched: [1:0.33] ; SKX-NEXT: vfnmadd213ps {{.*#+}} xmm3 = -(xmm0 * xmm3) + xmm2 sched: [4:0.50] ; SKX-NEXT: vfmadd132ps {{.*#+}} xmm3 = (xmm3 * xmm1) + xmm1 sched: [4:0.50] @@ -595,7 +595,7 @@ define <4 x float> @v4f32_two_step(<4 x float> %x) #2 { define <8 x float> @v8f32_no_estimate(<8 x float> %x) #0 { ; SSE-LABEL: v8f32_no_estimate: ; SSE: # %bb.0: -; SSE-NEXT: movaps {{.*#+}} xmm2 = [1,1,1,1] +; SSE-NEXT: movaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; SSE-NEXT: movaps %xmm2, %xmm3 ; SSE-NEXT: divps %xmm0, %xmm3 ; SSE-NEXT: divps %xmm1, %xmm2 @@ -605,55 +605,55 @@ define <8 x float> @v8f32_no_estimate(<8 x float> %x) #0 { ; ; AVX-RECIP-LABEL: v8f32_no_estimate: ; AVX-RECIP: # %bb.0: -; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1] +; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX-RECIP-NEXT: vdivps %ymm0, %ymm1, %ymm0 ; AVX-RECIP-NEXT: retq ; ; FMA-RECIP-LABEL: v8f32_no_estimate: ; FMA-RECIP: # %bb.0: -; FMA-RECIP-NEXT: vmovaps {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1] +; FMA-RECIP-NEXT: vmovaps {{.*#+}} ymm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA-RECIP-NEXT: vdivps %ymm0, %ymm1, %ymm0 ; FMA-RECIP-NEXT: retq ; ; BDVER2-LABEL: v8f32_no_estimate: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovaps {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1] sched: [5:0.50] +; BDVER2-NEXT: vmovaps {{.*#+}} ymm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:0.50] ; BDVER2-NEXT: vdivps %ymm0, %ymm1, %ymm0 # sched: [9:19.00] ; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: v8f32_no_estimate: ; BTVER2: # %bb.0: -; BTVER2-NEXT: vmovaps {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1] sched: [5:1.00] +; BTVER2-NEXT: vmovaps {{.*#+}} ymm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:1.00] ; BTVER2-NEXT: vdivps %ymm0, %ymm1, %ymm0 # sched: [38:38.00] ; BTVER2-NEXT: retq # sched: [4:1.00] ; ; SANDY-LABEL: v8f32_no_estimate: ; SANDY: # %bb.0: -; SANDY-NEXT: vmovaps {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; SANDY-NEXT: vmovaps {{.*#+}} ymm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; SANDY-NEXT: vdivps %ymm0, %ymm1, %ymm0 # sched: [29:28.00] ; SANDY-NEXT: retq # sched: [1:1.00] ; ; HASWELL-LABEL: v8f32_no_estimate: ; HASWELL: # %bb.0: -; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; HASWELL-NEXT: vdivps %ymm0, %ymm1, %ymm0 # sched: [21:14.00] ; HASWELL-NEXT: retq # sched: [7:1.00] ; ; HASWELL-NO-FMA-LABEL: v8f32_no_estimate: ; HASWELL-NO-FMA: # %bb.0: -; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1] +; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; HASWELL-NO-FMA-NEXT: vdivps %ymm0, %ymm1, %ymm0 ; HASWELL-NO-FMA-NEXT: retq ; ; KNL-LABEL: v8f32_no_estimate: ; KNL: # %bb.0: -; KNL-NEXT: vbroadcastss {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; KNL-NEXT: vbroadcastss {{.*#+}} ymm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; KNL-NEXT: vdivps %ymm0, %ymm1, %ymm0 # sched: [21:14.00] ; KNL-NEXT: retq # sched: [7:1.00] ; ; SKX-LABEL: v8f32_no_estimate: ; SKX: # %bb.0: -; SKX-NEXT: vbroadcastss {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; SKX-NEXT: vbroadcastss {{.*#+}} ymm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; SKX-NEXT: vdivps %ymm0, %ymm1, %ymm0 # sched: [11:5.00] ; SKX-NEXT: retq # sched: [7:1.00] %div = fdiv fast <8 x float> , %x @@ -665,7 +665,7 @@ define <8 x float> @v8f32_one_step(<8 x float> %x) #1 { ; SSE: # %bb.0: ; SSE-NEXT: rcpps %xmm0, %xmm4 ; SSE-NEXT: mulps %xmm4, %xmm0 -; SSE-NEXT: movaps {{.*#+}} xmm2 = [1,1,1,1] +; SSE-NEXT: movaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; SSE-NEXT: movaps %xmm2, %xmm3 ; SSE-NEXT: subps %xmm0, %xmm3 ; SSE-NEXT: mulps %xmm4, %xmm3 @@ -683,7 +683,7 @@ define <8 x float> @v8f32_one_step(<8 x float> %x) #1 { ; AVX-RECIP: # %bb.0: ; AVX-RECIP-NEXT: vrcpps %ymm0, %ymm1 ; AVX-RECIP-NEXT: vmulps %ymm1, %ymm0, %ymm0 -; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] +; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX-RECIP-NEXT: vsubps %ymm0, %ymm2, %ymm0 ; AVX-RECIP-NEXT: vmulps %ymm0, %ymm1, %ymm0 ; AVX-RECIP-NEXT: vaddps %ymm0, %ymm1, %ymm0 @@ -705,7 +705,7 @@ define <8 x float> @v8f32_one_step(<8 x float> %x) #1 { ; ; BTVER2-LABEL: v8f32_one_step: ; BTVER2: # %bb.0: -; BTVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [5:1.00] +; BTVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:1.00] ; BTVER2-NEXT: vrcpps %ymm0, %ymm1 # sched: [2:2.00] ; BTVER2-NEXT: vmulps %ymm1, %ymm0, %ymm0 # sched: [2:2.00] ; BTVER2-NEXT: vsubps %ymm0, %ymm2, %ymm0 # sched: [3:2.00] @@ -717,7 +717,7 @@ define <8 x float> @v8f32_one_step(<8 x float> %x) #1 { ; SANDY: # %bb.0: ; SANDY-NEXT: vrcpps %ymm0, %ymm1 # sched: [7:2.00] ; SANDY-NEXT: vmulps %ymm1, %ymm0, %ymm0 # sched: [5:1.00] -; SANDY-NEXT: vmovaps {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; SANDY-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; SANDY-NEXT: vsubps %ymm0, %ymm2, %ymm0 # sched: [3:1.00] ; SANDY-NEXT: vmulps %ymm0, %ymm1, %ymm0 # sched: [5:1.00] ; SANDY-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:1.00] @@ -726,7 +726,7 @@ define <8 x float> @v8f32_one_step(<8 x float> %x) #1 { ; HASWELL-LABEL: v8f32_one_step: ; HASWELL: # %bb.0: ; HASWELL-NEXT: vrcpps %ymm0, %ymm1 # sched: [11:2.00] -; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) + ymm2 sched: [5:0.50] ; HASWELL-NEXT: vfmadd132ps {{.*#+}} ymm0 = (ymm0 * ymm1) + ymm1 sched: [5:0.50] ; HASWELL-NEXT: retq # sched: [7:1.00] @@ -735,7 +735,7 @@ define <8 x float> @v8f32_one_step(<8 x float> %x) #1 { ; HASWELL-NO-FMA: # %bb.0: ; HASWELL-NO-FMA-NEXT: vrcpps %ymm0, %ymm1 ; HASWELL-NO-FMA-NEXT: vmulps %ymm1, %ymm0, %ymm0 -; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] +; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; HASWELL-NO-FMA-NEXT: vsubps %ymm0, %ymm2, %ymm0 ; HASWELL-NO-FMA-NEXT: vmulps %ymm0, %ymm1, %ymm0 ; HASWELL-NO-FMA-NEXT: vaddps %ymm0, %ymm1, %ymm0 @@ -744,7 +744,7 @@ define <8 x float> @v8f32_one_step(<8 x float> %x) #1 { ; KNL-LABEL: v8f32_one_step: ; KNL: # %bb.0: ; KNL-NEXT: vrcpps %ymm0, %ymm1 # sched: [11:2.00] -; KNL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; KNL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; KNL-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) + ymm2 sched: [5:0.50] ; KNL-NEXT: vfmadd132ps {{.*#+}} ymm0 = (ymm0 * ymm1) + ymm1 sched: [5:0.50] ; KNL-NEXT: retq # sched: [7:1.00] @@ -766,7 +766,7 @@ define <8 x float> @v8f32_two_step(<8 x float> %x) #2 { ; SSE-NEXT: rcpps %xmm0, %xmm3 ; SSE-NEXT: movaps %xmm0, %xmm4 ; SSE-NEXT: mulps %xmm3, %xmm4 -; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,1,1,1] +; SSE-NEXT: movaps {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; SSE-NEXT: movaps %xmm1, %xmm5 ; SSE-NEXT: subps %xmm4, %xmm5 ; SSE-NEXT: mulps %xmm3, %xmm5 @@ -794,7 +794,7 @@ define <8 x float> @v8f32_two_step(<8 x float> %x) #2 { ; AVX-RECIP: # %bb.0: ; AVX-RECIP-NEXT: vrcpps %ymm0, %ymm1 ; AVX-RECIP-NEXT: vmulps %ymm1, %ymm0, %ymm2 -; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] +; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX-RECIP-NEXT: vsubps %ymm2, %ymm3, %ymm2 ; AVX-RECIP-NEXT: vmulps %ymm2, %ymm1, %ymm2 ; AVX-RECIP-NEXT: vaddps %ymm2, %ymm1, %ymm1 @@ -807,7 +807,7 @@ define <8 x float> @v8f32_two_step(<8 x float> %x) #2 { ; FMA-RECIP-LABEL: v8f32_two_step: ; FMA-RECIP: # %bb.0: ; FMA-RECIP-NEXT: vrcpps %ymm0, %ymm1 -; FMA-RECIP-NEXT: vmovaps {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] +; FMA-RECIP-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA-RECIP-NEXT: vmovaps %ymm1, %ymm3 ; FMA-RECIP-NEXT: vfnmadd213ps {{.*#+}} ymm3 = -(ymm0 * ymm3) + ymm2 ; FMA-RECIP-NEXT: vfmadd132ps {{.*#+}} ymm3 = (ymm3 * ymm1) + ymm1 @@ -818,7 +818,7 @@ define <8 x float> @v8f32_two_step(<8 x float> %x) #2 { ; BDVER2-LABEL: v8f32_two_step: ; BDVER2: # %bb.0: ; BDVER2-NEXT: vrcpps %ymm0, %ymm1 # sched: [5:2.00] -; BDVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [5:0.50] +; BDVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %ymm2, %ymm1, %ymm0, %ymm3 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddps %ymm1, %ymm3, %ymm1, %ymm1 # sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %ymm2, %ymm1, %ymm0, %ymm0 # sched: [5:0.50] @@ -827,7 +827,7 @@ define <8 x float> @v8f32_two_step(<8 x float> %x) #2 { ; ; BTVER2-LABEL: v8f32_two_step: ; BTVER2: # %bb.0: -; BTVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [5:1.00] +; BTVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:1.00] ; BTVER2-NEXT: vrcpps %ymm0, %ymm1 # sched: [2:2.00] ; BTVER2-NEXT: vmulps %ymm1, %ymm0, %ymm2 # sched: [2:2.00] ; BTVER2-NEXT: vsubps %ymm2, %ymm3, %ymm2 # sched: [3:2.00] @@ -843,7 +843,7 @@ define <8 x float> @v8f32_two_step(<8 x float> %x) #2 { ; SANDY: # %bb.0: ; SANDY-NEXT: vrcpps %ymm0, %ymm1 # sched: [7:2.00] ; SANDY-NEXT: vmulps %ymm1, %ymm0, %ymm2 # sched: [5:1.00] -; SANDY-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; SANDY-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; SANDY-NEXT: vsubps %ymm2, %ymm3, %ymm2 # sched: [3:1.00] ; SANDY-NEXT: vmulps %ymm2, %ymm1, %ymm2 # sched: [5:1.00] ; SANDY-NEXT: vaddps %ymm2, %ymm1, %ymm1 # sched: [3:1.00] @@ -856,7 +856,7 @@ define <8 x float> @v8f32_two_step(<8 x float> %x) #2 { ; HASWELL-LABEL: v8f32_two_step: ; HASWELL: # %bb.0: ; HASWELL-NEXT: vrcpps %ymm0, %ymm1 # sched: [11:2.00] -; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; HASWELL-NEXT: vmovaps %ymm1, %ymm3 # sched: [1:1.00] ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} ymm3 = -(ymm0 * ymm3) + ymm2 sched: [5:0.50] ; HASWELL-NEXT: vfmadd132ps {{.*#+}} ymm3 = (ymm3 * ymm1) + ymm1 sched: [5:0.50] @@ -868,7 +868,7 @@ define <8 x float> @v8f32_two_step(<8 x float> %x) #2 { ; HASWELL-NO-FMA: # %bb.0: ; HASWELL-NO-FMA-NEXT: vrcpps %ymm0, %ymm1 ; HASWELL-NO-FMA-NEXT: vmulps %ymm1, %ymm0, %ymm2 -; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] +; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; HASWELL-NO-FMA-NEXT: vsubps %ymm2, %ymm3, %ymm2 ; HASWELL-NO-FMA-NEXT: vmulps %ymm2, %ymm1, %ymm2 ; HASWELL-NO-FMA-NEXT: vaddps %ymm2, %ymm1, %ymm1 @@ -881,7 +881,7 @@ define <8 x float> @v8f32_two_step(<8 x float> %x) #2 { ; KNL-LABEL: v8f32_two_step: ; KNL: # %bb.0: ; KNL-NEXT: vrcpps %ymm0, %ymm1 # sched: [11:2.00] -; KNL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; KNL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; KNL-NEXT: vmovaps %ymm1, %ymm3 # sched: [1:1.00] ; KNL-NEXT: vfnmadd213ps {{.*#+}} ymm3 = -(ymm0 * ymm3) + ymm2 sched: [5:0.50] ; KNL-NEXT: vfmadd132ps {{.*#+}} ymm3 = (ymm3 * ymm1) + ymm1 sched: [5:0.50] @@ -892,7 +892,7 @@ define <8 x float> @v8f32_two_step(<8 x float> %x) #2 { ; SKX-LABEL: v8f32_two_step: ; SKX: # %bb.0: ; SKX-NEXT: vrcpps %ymm0, %ymm1 # sched: [4:1.00] -; SKX-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; SKX-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; SKX-NEXT: vmovaps %ymm1, %ymm3 # sched: [1:0.33] ; SKX-NEXT: vfnmadd213ps {{.*#+}} ymm3 = -(ymm0 * ymm3) + ymm2 sched: [4:0.50] ; SKX-NEXT: vfmadd132ps {{.*#+}} ymm3 = (ymm3 * ymm1) + ymm1 sched: [4:0.50] @@ -906,7 +906,7 @@ define <8 x float> @v8f32_two_step(<8 x float> %x) #2 { define <16 x float> @v16f32_no_estimate(<16 x float> %x) #0 { ; SSE-LABEL: v16f32_no_estimate: ; SSE: # %bb.0: -; SSE-NEXT: movaps {{.*#+}} xmm4 = [1,1,1,1] +; SSE-NEXT: movaps {{.*#+}} xmm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; SSE-NEXT: movaps %xmm4, %xmm5 ; SSE-NEXT: divps %xmm0, %xmm5 ; SSE-NEXT: movaps %xmm4, %xmm6 @@ -922,62 +922,62 @@ define <16 x float> @v16f32_no_estimate(<16 x float> %x) #0 { ; ; AVX-RECIP-LABEL: v16f32_no_estimate: ; AVX-RECIP: # %bb.0: -; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] +; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX-RECIP-NEXT: vdivps %ymm0, %ymm2, %ymm0 ; AVX-RECIP-NEXT: vdivps %ymm1, %ymm2, %ymm1 ; AVX-RECIP-NEXT: retq ; ; FMA-RECIP-LABEL: v16f32_no_estimate: ; FMA-RECIP: # %bb.0: -; FMA-RECIP-NEXT: vmovaps {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] +; FMA-RECIP-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA-RECIP-NEXT: vdivps %ymm0, %ymm2, %ymm0 ; FMA-RECIP-NEXT: vdivps %ymm1, %ymm2, %ymm1 ; FMA-RECIP-NEXT: retq ; ; BDVER2-LABEL: v16f32_no_estimate: ; BDVER2: # %bb.0: -; BDVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [5:0.50] +; BDVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:0.50] ; BDVER2-NEXT: vdivps %ymm0, %ymm2, %ymm0 # sched: [9:19.00] ; BDVER2-NEXT: vdivps %ymm1, %ymm2, %ymm1 # sched: [9:19.00] ; BDVER2-NEXT: retq # sched: [5:1.00] ; ; BTVER2-LABEL: v16f32_no_estimate: ; BTVER2: # %bb.0: -; BTVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [5:1.00] +; BTVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:1.00] ; BTVER2-NEXT: vdivps %ymm0, %ymm2, %ymm0 # sched: [38:38.00] ; BTVER2-NEXT: vdivps %ymm1, %ymm2, %ymm1 # sched: [38:38.00] ; BTVER2-NEXT: retq # sched: [4:1.00] ; ; SANDY-LABEL: v16f32_no_estimate: ; SANDY: # %bb.0: -; SANDY-NEXT: vmovaps {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; SANDY-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; SANDY-NEXT: vdivps %ymm0, %ymm2, %ymm0 # sched: [29:28.00] ; SANDY-NEXT: vdivps %ymm1, %ymm2, %ymm1 # sched: [29:28.00] ; SANDY-NEXT: retq # sched: [1:1.00] ; ; HASWELL-LABEL: v16f32_no_estimate: ; HASWELL: # %bb.0: -; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; HASWELL-NEXT: vdivps %ymm0, %ymm2, %ymm0 # sched: [21:14.00] ; HASWELL-NEXT: vdivps %ymm1, %ymm2, %ymm1 # sched: [21:14.00] ; HASWELL-NEXT: retq # sched: [7:1.00] ; ; HASWELL-NO-FMA-LABEL: v16f32_no_estimate: ; HASWELL-NO-FMA: # %bb.0: -; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] +; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; HASWELL-NO-FMA-NEXT: vdivps %ymm0, %ymm2, %ymm0 ; HASWELL-NO-FMA-NEXT: vdivps %ymm1, %ymm2, %ymm1 ; HASWELL-NO-FMA-NEXT: retq ; ; KNL-LABEL: v16f32_no_estimate: ; KNL: # %bb.0: -; KNL-NEXT: vbroadcastss {{.*#+}} zmm1 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] sched: [10:1.00] +; KNL-NEXT: vbroadcastss {{.*#+}} zmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [10:1.00] ; KNL-NEXT: vdivps %zmm0, %zmm1, %zmm0 # sched: [21:14.00] ; KNL-NEXT: retq # sched: [7:1.00] ; ; SKX-LABEL: v16f32_no_estimate: ; SKX: # %bb.0: -; SKX-NEXT: vbroadcastss {{.*#+}} zmm1 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] sched: [8:0.50] +; SKX-NEXT: vbroadcastss {{.*#+}} zmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [8:0.50] ; SKX-NEXT: vdivps %zmm0, %zmm1, %zmm0 # sched: [18:10.00] ; SKX-NEXT: retq # sched: [7:1.00] %div = fdiv fast <16 x float> , %x @@ -991,7 +991,7 @@ define <16 x float> @v16f32_one_step(<16 x float> %x) #1 { ; SSE-NEXT: movaps %xmm0, %xmm5 ; SSE-NEXT: rcpps %xmm0, %xmm6 ; SSE-NEXT: mulps %xmm6, %xmm5 -; SSE-NEXT: movaps {{.*#+}} xmm3 = [1,1,1,1] +; SSE-NEXT: movaps {{.*#+}} xmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; SSE-NEXT: movaps %xmm3, %xmm0 ; SSE-NEXT: subps %xmm5, %xmm0 ; SSE-NEXT: mulps %xmm6, %xmm0 @@ -1021,7 +1021,7 @@ define <16 x float> @v16f32_one_step(<16 x float> %x) #1 { ; AVX-RECIP: # %bb.0: ; AVX-RECIP-NEXT: vrcpps %ymm0, %ymm2 ; AVX-RECIP-NEXT: vmulps %ymm2, %ymm0, %ymm0 -; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] +; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX-RECIP-NEXT: vsubps %ymm0, %ymm3, %ymm0 ; AVX-RECIP-NEXT: vmulps %ymm0, %ymm2, %ymm0 ; AVX-RECIP-NEXT: vaddps %ymm0, %ymm2, %ymm0 @@ -1035,7 +1035,7 @@ define <16 x float> @v16f32_one_step(<16 x float> %x) #1 { ; FMA-RECIP-LABEL: v16f32_one_step: ; FMA-RECIP: # %bb.0: ; FMA-RECIP-NEXT: vrcpps %ymm0, %ymm2 -; FMA-RECIP-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] +; FMA-RECIP-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA-RECIP-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm2 * ymm0) + ymm3 ; FMA-RECIP-NEXT: vfmadd132ps {{.*#+}} ymm0 = (ymm0 * ymm2) + ymm2 ; FMA-RECIP-NEXT: vrcpps %ymm1, %ymm2 @@ -1046,7 +1046,7 @@ define <16 x float> @v16f32_one_step(<16 x float> %x) #1 { ; BDVER2-LABEL: v16f32_one_step: ; BDVER2: # %bb.0: ; BDVER2-NEXT: vrcpps %ymm0, %ymm2 # sched: [5:2.00] -; BDVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [5:0.50] +; BDVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:0.50] ; BDVER2-NEXT: vrcpps %ymm1, %ymm4 # sched: [5:2.00] ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm2, %ymm0, %ymm0 # sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm4, %ymm1, %ymm1 # sched: [5:0.50] @@ -1056,7 +1056,7 @@ define <16 x float> @v16f32_one_step(<16 x float> %x) #1 { ; ; BTVER2-LABEL: v16f32_one_step: ; BTVER2: # %bb.0: -; BTVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [5:1.00] +; BTVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:1.00] ; BTVER2-NEXT: vrcpps %ymm0, %ymm2 # sched: [2:2.00] ; BTVER2-NEXT: vrcpps %ymm1, %ymm4 # sched: [2:2.00] ; BTVER2-NEXT: vmulps %ymm2, %ymm0, %ymm0 # sched: [2:2.00] @@ -1073,7 +1073,7 @@ define <16 x float> @v16f32_one_step(<16 x float> %x) #1 { ; SANDY: # %bb.0: ; SANDY-NEXT: vrcpps %ymm0, %ymm2 # sched: [7:2.00] ; SANDY-NEXT: vmulps %ymm2, %ymm0, %ymm0 # sched: [5:1.00] -; SANDY-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; SANDY-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; SANDY-NEXT: vsubps %ymm0, %ymm3, %ymm0 # sched: [3:1.00] ; SANDY-NEXT: vmulps %ymm0, %ymm2, %ymm0 # sched: [5:1.00] ; SANDY-NEXT: vaddps %ymm0, %ymm2, %ymm0 # sched: [3:1.00] @@ -1087,7 +1087,7 @@ define <16 x float> @v16f32_one_step(<16 x float> %x) #1 { ; HASWELL-LABEL: v16f32_one_step: ; HASWELL: # %bb.0: ; HASWELL-NEXT: vrcpps %ymm0, %ymm2 # sched: [11:2.00] -; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; HASWELL-NEXT: vrcpps %ymm1, %ymm4 # sched: [11:2.00] ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm2 * ymm0) + ymm3 sched: [5:0.50] ; HASWELL-NEXT: vfmadd132ps {{.*#+}} ymm0 = (ymm0 * ymm2) + ymm2 sched: [5:0.50] @@ -1099,7 +1099,7 @@ define <16 x float> @v16f32_one_step(<16 x float> %x) #1 { ; HASWELL-NO-FMA: # %bb.0: ; HASWELL-NO-FMA-NEXT: vrcpps %ymm0, %ymm2 ; HASWELL-NO-FMA-NEXT: vmulps %ymm2, %ymm0, %ymm0 -; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] +; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; HASWELL-NO-FMA-NEXT: vsubps %ymm0, %ymm3, %ymm0 ; HASWELL-NO-FMA-NEXT: vmulps %ymm0, %ymm2, %ymm0 ; HASWELL-NO-FMA-NEXT: vaddps %ymm0, %ymm2, %ymm0 @@ -1136,7 +1136,7 @@ define <16 x float> @v16f32_two_step(<16 x float> %x) #2 { ; SSE-NEXT: rcpps %xmm0, %xmm0 ; SSE-NEXT: movaps %xmm1, %xmm6 ; SSE-NEXT: mulps %xmm0, %xmm6 -; SSE-NEXT: movaps {{.*#+}} xmm3 = [1,1,1,1] +; SSE-NEXT: movaps {{.*#+}} xmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; SSE-NEXT: movaps %xmm3, %xmm7 ; SSE-NEXT: subps %xmm6, %xmm7 ; SSE-NEXT: mulps %xmm0, %xmm7 @@ -1188,7 +1188,7 @@ define <16 x float> @v16f32_two_step(<16 x float> %x) #2 { ; AVX-RECIP: # %bb.0: ; AVX-RECIP-NEXT: vrcpps %ymm0, %ymm2 ; AVX-RECIP-NEXT: vmulps %ymm2, %ymm0, %ymm3 -; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm4 = [1,1,1,1,1,1,1,1] +; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX-RECIP-NEXT: vsubps %ymm3, %ymm4, %ymm3 ; AVX-RECIP-NEXT: vmulps %ymm3, %ymm2, %ymm3 ; AVX-RECIP-NEXT: vaddps %ymm3, %ymm2, %ymm2 @@ -1210,7 +1210,7 @@ define <16 x float> @v16f32_two_step(<16 x float> %x) #2 { ; FMA-RECIP-LABEL: v16f32_two_step: ; FMA-RECIP: # %bb.0: ; FMA-RECIP-NEXT: vrcpps %ymm0, %ymm2 -; FMA-RECIP-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] +; FMA-RECIP-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA-RECIP-NEXT: vmovaps %ymm2, %ymm4 ; FMA-RECIP-NEXT: vfnmadd213ps {{.*#+}} ymm4 = -(ymm0 * ymm4) + ymm3 ; FMA-RECIP-NEXT: vfmadd132ps {{.*#+}} ymm4 = (ymm4 * ymm2) + ymm2 @@ -1227,7 +1227,7 @@ define <16 x float> @v16f32_two_step(<16 x float> %x) #2 { ; BDVER2-LABEL: v16f32_two_step: ; BDVER2: # %bb.0: ; BDVER2-NEXT: vrcpps %ymm0, %ymm2 # sched: [5:2.00] -; BDVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [5:0.50] +; BDVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm2, %ymm0, %ymm4 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddps %ymm2, %ymm4, %ymm2, %ymm2 # sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm2, %ymm0, %ymm0 # sched: [5:0.50] @@ -1241,7 +1241,7 @@ define <16 x float> @v16f32_two_step(<16 x float> %x) #2 { ; ; BTVER2-LABEL: v16f32_two_step: ; BTVER2: # %bb.0: -; BTVER2-NEXT: vmovaps {{.*#+}} ymm4 = [1,1,1,1,1,1,1,1] sched: [5:1.00] +; BTVER2-NEXT: vmovaps {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:1.00] ; BTVER2-NEXT: vrcpps %ymm0, %ymm2 # sched: [2:2.00] ; BTVER2-NEXT: vmulps %ymm2, %ymm0, %ymm3 # sched: [2:2.00] ; BTVER2-NEXT: vsubps %ymm3, %ymm4, %ymm3 # sched: [3:2.00] @@ -1266,7 +1266,7 @@ define <16 x float> @v16f32_two_step(<16 x float> %x) #2 { ; SANDY: # %bb.0: ; SANDY-NEXT: vrcpps %ymm0, %ymm2 # sched: [7:2.00] ; SANDY-NEXT: vmulps %ymm2, %ymm0, %ymm3 # sched: [5:1.00] -; SANDY-NEXT: vmovaps {{.*#+}} ymm4 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; SANDY-NEXT: vmovaps {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; SANDY-NEXT: vsubps %ymm3, %ymm4, %ymm3 # sched: [3:1.00] ; SANDY-NEXT: vmulps %ymm3, %ymm2, %ymm3 # sched: [5:1.00] ; SANDY-NEXT: vaddps %ymm3, %ymm2, %ymm2 # sched: [3:1.00] @@ -1288,7 +1288,7 @@ define <16 x float> @v16f32_two_step(<16 x float> %x) #2 { ; HASWELL-LABEL: v16f32_two_step: ; HASWELL: # %bb.0: ; HASWELL-NEXT: vrcpps %ymm0, %ymm2 # sched: [11:2.00] -; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; HASWELL-NEXT: vmovaps %ymm2, %ymm4 # sched: [1:1.00] ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} ymm4 = -(ymm0 * ymm4) + ymm3 sched: [5:0.50] ; HASWELL-NEXT: vfmadd132ps {{.*#+}} ymm4 = (ymm4 * ymm2) + ymm2 sched: [5:0.50] @@ -1306,7 +1306,7 @@ define <16 x float> @v16f32_two_step(<16 x float> %x) #2 { ; HASWELL-NO-FMA: # %bb.0: ; HASWELL-NO-FMA-NEXT: vrcpps %ymm0, %ymm2 ; HASWELL-NO-FMA-NEXT: vmulps %ymm2, %ymm0, %ymm3 -; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm4 = [1,1,1,1,1,1,1,1] +; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; HASWELL-NO-FMA-NEXT: vsubps %ymm3, %ymm4, %ymm3 ; HASWELL-NO-FMA-NEXT: vmulps %ymm3, %ymm2, %ymm3 ; HASWELL-NO-FMA-NEXT: vaddps %ymm3, %ymm2, %ymm2 @@ -1328,7 +1328,7 @@ define <16 x float> @v16f32_two_step(<16 x float> %x) #2 { ; KNL-LABEL: v16f32_two_step: ; KNL: # %bb.0: ; KNL-NEXT: vrcp14ps %zmm0, %zmm1 # sched: [11:2.00] -; KNL-NEXT: vbroadcastss {{.*#+}} zmm2 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] sched: [10:1.00] +; KNL-NEXT: vbroadcastss {{.*#+}} zmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [10:1.00] ; KNL-NEXT: vmovaps %zmm1, %zmm3 # sched: [1:1.00] ; KNL-NEXT: vfnmadd213ps {{.*#+}} zmm3 = -(zmm0 * zmm3) + zmm2 sched: [5:0.50] ; KNL-NEXT: vfmadd132ps {{.*#+}} zmm3 = (zmm3 * zmm1) + zmm1 sched: [5:0.50] @@ -1339,7 +1339,7 @@ define <16 x float> @v16f32_two_step(<16 x float> %x) #2 { ; SKX-LABEL: v16f32_two_step: ; SKX: # %bb.0: ; SKX-NEXT: vrcp14ps %zmm0, %zmm1 # sched: [4:2.00] -; SKX-NEXT: vbroadcastss {{.*#+}} zmm2 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] sched: [8:0.50] +; SKX-NEXT: vbroadcastss {{.*#+}} zmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [8:0.50] ; SKX-NEXT: vmovaps %zmm1, %zmm3 # sched: [1:0.33] ; SKX-NEXT: vfnmadd213ps {{.*#+}} zmm3 = -(zmm0 * zmm3) + zmm2 sched: [4:0.50] ; SKX-NEXT: vfmadd132ps {{.*#+}} zmm3 = (zmm3 * zmm1) + zmm1 sched: [4:0.50] diff --git a/test/CodeGen/X86/recip-fastmath2.ll b/test/CodeGen/X86/recip-fastmath2.ll index 2a773f44956..dbe2689077e 100644 --- a/test/CodeGen/X86/recip-fastmath2.ll +++ b/test/CodeGen/X86/recip-fastmath2.ll @@ -433,7 +433,7 @@ define <4 x float> @v4f32_one_step2(<4 x float> %x) #1 { ; SSE: # %bb.0: ; SSE-NEXT: rcpps %xmm0, %xmm2 ; SSE-NEXT: mulps %xmm2, %xmm0 -; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,1,1,1] +; SSE-NEXT: movaps {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; SSE-NEXT: subps %xmm0, %xmm1 ; SSE-NEXT: mulps %xmm2, %xmm1 ; SSE-NEXT: addps %xmm2, %xmm1 @@ -445,7 +445,7 @@ define <4 x float> @v4f32_one_step2(<4 x float> %x) #1 { ; AVX-RECIP: # %bb.0: ; AVX-RECIP-NEXT: vrcpps %xmm0, %xmm1 ; AVX-RECIP-NEXT: vmulps %xmm1, %xmm0, %xmm0 -; AVX-RECIP-NEXT: vmovaps {{.*#+}} xmm2 = [1,1,1,1] +; AVX-RECIP-NEXT: vmovaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX-RECIP-NEXT: vsubps %xmm0, %xmm2, %xmm0 ; AVX-RECIP-NEXT: vmulps %xmm0, %xmm1, %xmm0 ; AVX-RECIP-NEXT: vaddps %xmm0, %xmm1, %xmm0 @@ -470,7 +470,7 @@ define <4 x float> @v4f32_one_step2(<4 x float> %x) #1 { ; ; BTVER2-LABEL: v4f32_one_step2: ; BTVER2: # %bb.0: -; BTVER2-NEXT: vmovaps {{.*#+}} xmm2 = [1,1,1,1] sched: [5:1.00] +; BTVER2-NEXT: vmovaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:1.00] ; BTVER2-NEXT: vrcpps %xmm0, %xmm1 # sched: [2:1.00] ; BTVER2-NEXT: vmulps %xmm1, %xmm0, %xmm0 # sched: [2:1.00] ; BTVER2-NEXT: vsubps %xmm0, %xmm2, %xmm0 # sched: [3:1.00] @@ -483,7 +483,7 @@ define <4 x float> @v4f32_one_step2(<4 x float> %x) #1 { ; SANDY: # %bb.0: ; SANDY-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00] ; SANDY-NEXT: vmulps %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; SANDY-NEXT: vmovaps {{.*#+}} xmm2 = [1,1,1,1] sched: [6:0.50] +; SANDY-NEXT: vmovaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [6:0.50] ; SANDY-NEXT: vsubps %xmm0, %xmm2, %xmm0 # sched: [3:1.00] ; SANDY-NEXT: vmulps %xmm0, %xmm1, %xmm0 # sched: [5:1.00] ; SANDY-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [3:1.00] @@ -493,7 +493,7 @@ define <4 x float> @v4f32_one_step2(<4 x float> %x) #1 { ; HASWELL-LABEL: v4f32_one_step2: ; HASWELL: # %bb.0: ; HASWELL-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00] -; HASWELL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [6:0.50] +; HASWELL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [6:0.50] ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) + xmm2 sched: [5:0.50] ; HASWELL-NEXT: vfmadd132ps {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm1 sched: [5:0.50] ; HASWELL-NEXT: vmulps {{.*}}(%rip), %xmm0, %xmm0 # sched: [11:0.50] @@ -503,7 +503,7 @@ define <4 x float> @v4f32_one_step2(<4 x float> %x) #1 { ; HASWELL-NO-FMA: # %bb.0: ; HASWELL-NO-FMA-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00] ; HASWELL-NO-FMA-NEXT: vmulps %xmm1, %xmm0, %xmm0 # sched: [5:0.50] -; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [6:0.50] +; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [6:0.50] ; HASWELL-NO-FMA-NEXT: vsubps %xmm0, %xmm2, %xmm0 # sched: [3:1.00] ; HASWELL-NO-FMA-NEXT: vmulps %xmm0, %xmm1, %xmm0 # sched: [5:0.50] ; HASWELL-NO-FMA-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [3:1.00] @@ -513,7 +513,7 @@ define <4 x float> @v4f32_one_step2(<4 x float> %x) #1 { ; KNL-LABEL: v4f32_one_step2: ; KNL: # %bb.0: ; KNL-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00] -; KNL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [6:0.50] +; KNL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [6:0.50] ; KNL-NEXT: vfnmadd213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) + xmm2 sched: [5:0.50] ; KNL-NEXT: vfmadd132ps {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm1 sched: [5:0.50] ; KNL-NEXT: vmulps {{.*}}(%rip), %xmm0, %xmm0 # sched: [11:0.50] @@ -535,11 +535,11 @@ define <4 x float> @v4f32_one_step_2_divs(<4 x float> %x) #1 { ; SSE: # %bb.0: ; SSE-NEXT: rcpps %xmm0, %xmm1 ; SSE-NEXT: mulps %xmm1, %xmm0 -; SSE-NEXT: movaps {{.*#+}} xmm2 = [1,1,1,1] +; SSE-NEXT: movaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; SSE-NEXT: subps %xmm0, %xmm2 ; SSE-NEXT: mulps %xmm1, %xmm2 ; SSE-NEXT: addps %xmm1, %xmm2 -; SSE-NEXT: movaps {{.*#+}} xmm0 = [1,2,3,4] +; SSE-NEXT: movaps {{.*#+}} xmm0 = [1.0E+0,2.0E+0,3.0E+0,4.0E+0] ; SSE-NEXT: mulps %xmm2, %xmm0 ; SSE-NEXT: mulps %xmm2, %xmm0 ; SSE-NEXT: retq @@ -548,7 +548,7 @@ define <4 x float> @v4f32_one_step_2_divs(<4 x float> %x) #1 { ; AVX-RECIP: # %bb.0: ; AVX-RECIP-NEXT: vrcpps %xmm0, %xmm1 ; AVX-RECIP-NEXT: vmulps %xmm1, %xmm0, %xmm0 -; AVX-RECIP-NEXT: vmovaps {{.*#+}} xmm2 = [1,1,1,1] +; AVX-RECIP-NEXT: vmovaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX-RECIP-NEXT: vsubps %xmm0, %xmm2, %xmm0 ; AVX-RECIP-NEXT: vmulps %xmm0, %xmm1, %xmm0 ; AVX-RECIP-NEXT: vaddps %xmm0, %xmm1, %xmm0 @@ -576,7 +576,7 @@ define <4 x float> @v4f32_one_step_2_divs(<4 x float> %x) #1 { ; ; BTVER2-LABEL: v4f32_one_step_2_divs: ; BTVER2: # %bb.0: -; BTVER2-NEXT: vmovaps {{.*#+}} xmm2 = [1,1,1,1] sched: [5:1.00] +; BTVER2-NEXT: vmovaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:1.00] ; BTVER2-NEXT: vrcpps %xmm0, %xmm1 # sched: [2:1.00] ; BTVER2-NEXT: vmulps %xmm1, %xmm0, %xmm0 # sched: [2:1.00] ; BTVER2-NEXT: vsubps %xmm0, %xmm2, %xmm0 # sched: [3:1.00] @@ -590,7 +590,7 @@ define <4 x float> @v4f32_one_step_2_divs(<4 x float> %x) #1 { ; SANDY: # %bb.0: ; SANDY-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00] ; SANDY-NEXT: vmulps %xmm1, %xmm0, %xmm0 # sched: [5:1.00] -; SANDY-NEXT: vmovaps {{.*#+}} xmm2 = [1,1,1,1] sched: [6:0.50] +; SANDY-NEXT: vmovaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [6:0.50] ; SANDY-NEXT: vsubps %xmm0, %xmm2, %xmm0 # sched: [3:1.00] ; SANDY-NEXT: vmulps %xmm0, %xmm1, %xmm0 # sched: [5:1.00] ; SANDY-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [3:1.00] @@ -601,7 +601,7 @@ define <4 x float> @v4f32_one_step_2_divs(<4 x float> %x) #1 { ; HASWELL-LABEL: v4f32_one_step_2_divs: ; HASWELL: # %bb.0: ; HASWELL-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00] -; HASWELL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [6:0.50] +; HASWELL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [6:0.50] ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) + xmm2 sched: [5:0.50] ; HASWELL-NEXT: vfmadd132ps {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm1 sched: [5:0.50] ; HASWELL-NEXT: vmulps {{.*}}(%rip), %xmm0, %xmm1 # sched: [11:0.50] @@ -612,7 +612,7 @@ define <4 x float> @v4f32_one_step_2_divs(<4 x float> %x) #1 { ; HASWELL-NO-FMA: # %bb.0: ; HASWELL-NO-FMA-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00] ; HASWELL-NO-FMA-NEXT: vmulps %xmm1, %xmm0, %xmm0 # sched: [5:0.50] -; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [6:0.50] +; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [6:0.50] ; HASWELL-NO-FMA-NEXT: vsubps %xmm0, %xmm2, %xmm0 # sched: [3:1.00] ; HASWELL-NO-FMA-NEXT: vmulps %xmm0, %xmm1, %xmm0 # sched: [5:0.50] ; HASWELL-NO-FMA-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [3:1.00] @@ -623,7 +623,7 @@ define <4 x float> @v4f32_one_step_2_divs(<4 x float> %x) #1 { ; KNL-LABEL: v4f32_one_step_2_divs: ; KNL: # %bb.0: ; KNL-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00] -; KNL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [6:0.50] +; KNL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [6:0.50] ; KNL-NEXT: vfnmadd213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) + xmm2 sched: [5:0.50] ; KNL-NEXT: vfmadd132ps {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm1 sched: [5:0.50] ; KNL-NEXT: vmulps {{.*}}(%rip), %xmm0, %xmm1 # sched: [11:0.50] @@ -649,7 +649,7 @@ define <4 x float> @v4f32_two_step2(<4 x float> %x) #2 { ; SSE-NEXT: rcpps %xmm0, %xmm2 ; SSE-NEXT: movaps %xmm0, %xmm3 ; SSE-NEXT: mulps %xmm2, %xmm3 -; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,1,1,1] +; SSE-NEXT: movaps {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; SSE-NEXT: movaps %xmm1, %xmm4 ; SSE-NEXT: subps %xmm3, %xmm4 ; SSE-NEXT: mulps %xmm2, %xmm4 @@ -666,7 +666,7 @@ define <4 x float> @v4f32_two_step2(<4 x float> %x) #2 { ; AVX-RECIP: # %bb.0: ; AVX-RECIP-NEXT: vrcpps %xmm0, %xmm1 ; AVX-RECIP-NEXT: vmulps %xmm1, %xmm0, %xmm2 -; AVX-RECIP-NEXT: vmovaps {{.*#+}} xmm3 = [1,1,1,1] +; AVX-RECIP-NEXT: vmovaps {{.*#+}} xmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX-RECIP-NEXT: vsubps %xmm2, %xmm3, %xmm2 ; AVX-RECIP-NEXT: vmulps %xmm2, %xmm1, %xmm2 ; AVX-RECIP-NEXT: vaddps %xmm2, %xmm1, %xmm1 @@ -680,7 +680,7 @@ define <4 x float> @v4f32_two_step2(<4 x float> %x) #2 { ; FMA-RECIP-LABEL: v4f32_two_step2: ; FMA-RECIP: # %bb.0: ; FMA-RECIP-NEXT: vrcpps %xmm0, %xmm1 -; FMA-RECIP-NEXT: vmovaps {{.*#+}} xmm2 = [1,1,1,1] +; FMA-RECIP-NEXT: vmovaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA-RECIP-NEXT: vmovaps %xmm1, %xmm3 ; FMA-RECIP-NEXT: vfnmadd213ps {{.*#+}} xmm3 = -(xmm0 * xmm3) + xmm2 ; FMA-RECIP-NEXT: vfmadd132ps {{.*#+}} xmm3 = (xmm3 * xmm1) + xmm1 @@ -692,7 +692,7 @@ define <4 x float> @v4f32_two_step2(<4 x float> %x) #2 { ; BDVER2-LABEL: v4f32_two_step2: ; BDVER2: # %bb.0: ; BDVER2-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00] -; BDVER2-NEXT: vmovaps {{.*#+}} xmm2 = [1,1,1,1] sched: [5:0.50] +; BDVER2-NEXT: vmovaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %xmm2, %xmm1, %xmm0, %xmm3 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddps %xmm1, %xmm3, %xmm1, %xmm1 # sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %xmm2, %xmm1, %xmm0, %xmm0 # sched: [5:0.50] @@ -702,7 +702,7 @@ define <4 x float> @v4f32_two_step2(<4 x float> %x) #2 { ; ; BTVER2-LABEL: v4f32_two_step2: ; BTVER2: # %bb.0: -; BTVER2-NEXT: vmovaps {{.*#+}} xmm3 = [1,1,1,1] sched: [5:1.00] +; BTVER2-NEXT: vmovaps {{.*#+}} xmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:1.00] ; BTVER2-NEXT: vrcpps %xmm0, %xmm1 # sched: [2:1.00] ; BTVER2-NEXT: vmulps %xmm1, %xmm0, %xmm2 # sched: [2:1.00] ; BTVER2-NEXT: vsubps %xmm2, %xmm3, %xmm2 # sched: [3:1.00] @@ -719,7 +719,7 @@ define <4 x float> @v4f32_two_step2(<4 x float> %x) #2 { ; SANDY: # %bb.0: ; SANDY-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00] ; SANDY-NEXT: vmulps %xmm1, %xmm0, %xmm2 # sched: [5:1.00] -; SANDY-NEXT: vmovaps {{.*#+}} xmm3 = [1,1,1,1] sched: [6:0.50] +; SANDY-NEXT: vmovaps {{.*#+}} xmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [6:0.50] ; SANDY-NEXT: vsubps %xmm2, %xmm3, %xmm2 # sched: [3:1.00] ; SANDY-NEXT: vmulps %xmm2, %xmm1, %xmm2 # sched: [5:1.00] ; SANDY-NEXT: vaddps %xmm2, %xmm1, %xmm1 # sched: [3:1.00] @@ -733,7 +733,7 @@ define <4 x float> @v4f32_two_step2(<4 x float> %x) #2 { ; HASWELL-LABEL: v4f32_two_step2: ; HASWELL: # %bb.0: ; HASWELL-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00] -; HASWELL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [6:0.50] +; HASWELL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [6:0.50] ; HASWELL-NEXT: vmovaps %xmm1, %xmm3 # sched: [1:1.00] ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} xmm3 = -(xmm0 * xmm3) + xmm2 sched: [5:0.50] ; HASWELL-NEXT: vfmadd132ps {{.*#+}} xmm3 = (xmm3 * xmm1) + xmm1 sched: [5:0.50] @@ -746,7 +746,7 @@ define <4 x float> @v4f32_two_step2(<4 x float> %x) #2 { ; HASWELL-NO-FMA: # %bb.0: ; HASWELL-NO-FMA-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00] ; HASWELL-NO-FMA-NEXT: vmulps %xmm1, %xmm0, %xmm2 # sched: [5:0.50] -; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} xmm3 = [1,1,1,1] sched: [6:0.50] +; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} xmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [6:0.50] ; HASWELL-NO-FMA-NEXT: vsubps %xmm2, %xmm3, %xmm2 # sched: [3:1.00] ; HASWELL-NO-FMA-NEXT: vmulps %xmm2, %xmm1, %xmm2 # sched: [5:0.50] ; HASWELL-NO-FMA-NEXT: vaddps %xmm2, %xmm1, %xmm1 # sched: [3:1.00] @@ -760,7 +760,7 @@ define <4 x float> @v4f32_two_step2(<4 x float> %x) #2 { ; KNL-LABEL: v4f32_two_step2: ; KNL: # %bb.0: ; KNL-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00] -; KNL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [6:0.50] +; KNL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [6:0.50] ; KNL-NEXT: vmovaps %xmm1, %xmm3 # sched: [1:1.00] ; KNL-NEXT: vfnmadd213ps {{.*#+}} xmm3 = -(xmm0 * xmm3) + xmm2 sched: [5:0.50] ; KNL-NEXT: vfmadd132ps {{.*#+}} xmm3 = (xmm3 * xmm1) + xmm1 sched: [5:0.50] @@ -772,7 +772,7 @@ define <4 x float> @v4f32_two_step2(<4 x float> %x) #2 { ; SKX-LABEL: v4f32_two_step2: ; SKX: # %bb.0: ; SKX-NEXT: vrcpps %xmm0, %xmm1 # sched: [4:1.00] -; SKX-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [6:0.50] +; SKX-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [6:0.50] ; SKX-NEXT: vmovaps %xmm1, %xmm3 # sched: [1:0.33] ; SKX-NEXT: vfnmadd213ps {{.*#+}} xmm3 = -(xmm0 * xmm3) + xmm2 sched: [4:0.50] ; SKX-NEXT: vfmadd132ps {{.*#+}} xmm3 = (xmm3 * xmm1) + xmm1 sched: [4:0.50] @@ -789,7 +789,7 @@ define <8 x float> @v8f32_one_step2(<8 x float> %x) #1 { ; SSE: # %bb.0: ; SSE-NEXT: rcpps %xmm1, %xmm4 ; SSE-NEXT: mulps %xmm4, %xmm1 -; SSE-NEXT: movaps {{.*#+}} xmm2 = [1,1,1,1] +; SSE-NEXT: movaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; SSE-NEXT: movaps %xmm2, %xmm3 ; SSE-NEXT: subps %xmm1, %xmm3 ; SSE-NEXT: mulps %xmm4, %xmm3 @@ -809,7 +809,7 @@ define <8 x float> @v8f32_one_step2(<8 x float> %x) #1 { ; AVX-RECIP: # %bb.0: ; AVX-RECIP-NEXT: vrcpps %ymm0, %ymm1 ; AVX-RECIP-NEXT: vmulps %ymm1, %ymm0, %ymm0 -; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] +; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX-RECIP-NEXT: vsubps %ymm0, %ymm2, %ymm0 ; AVX-RECIP-NEXT: vmulps %ymm0, %ymm1, %ymm0 ; AVX-RECIP-NEXT: vaddps %ymm0, %ymm1, %ymm0 @@ -834,7 +834,7 @@ define <8 x float> @v8f32_one_step2(<8 x float> %x) #1 { ; ; BTVER2-LABEL: v8f32_one_step2: ; BTVER2: # %bb.0: -; BTVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [5:1.00] +; BTVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:1.00] ; BTVER2-NEXT: vrcpps %ymm0, %ymm1 # sched: [2:2.00] ; BTVER2-NEXT: vmulps %ymm1, %ymm0, %ymm0 # sched: [2:2.00] ; BTVER2-NEXT: vsubps %ymm0, %ymm2, %ymm0 # sched: [3:2.00] @@ -847,7 +847,7 @@ define <8 x float> @v8f32_one_step2(<8 x float> %x) #1 { ; SANDY: # %bb.0: ; SANDY-NEXT: vrcpps %ymm0, %ymm1 # sched: [7:2.00] ; SANDY-NEXT: vmulps %ymm1, %ymm0, %ymm0 # sched: [5:1.00] -; SANDY-NEXT: vmovaps {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; SANDY-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; SANDY-NEXT: vsubps %ymm0, %ymm2, %ymm0 # sched: [3:1.00] ; SANDY-NEXT: vmulps %ymm0, %ymm1, %ymm0 # sched: [5:1.00] ; SANDY-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:1.00] @@ -857,7 +857,7 @@ define <8 x float> @v8f32_one_step2(<8 x float> %x) #1 { ; HASWELL-LABEL: v8f32_one_step2: ; HASWELL: # %bb.0: ; HASWELL-NEXT: vrcpps %ymm0, %ymm1 # sched: [11:2.00] -; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) + ymm2 sched: [5:0.50] ; HASWELL-NEXT: vfmadd132ps {{.*#+}} ymm0 = (ymm0 * ymm1) + ymm1 sched: [5:0.50] ; HASWELL-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm0 # sched: [12:0.50] @@ -867,7 +867,7 @@ define <8 x float> @v8f32_one_step2(<8 x float> %x) #1 { ; HASWELL-NO-FMA: # %bb.0: ; HASWELL-NO-FMA-NEXT: vrcpps %ymm0, %ymm1 # sched: [11:2.00] ; HASWELL-NO-FMA-NEXT: vmulps %ymm1, %ymm0, %ymm0 # sched: [5:0.50] -; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; HASWELL-NO-FMA-NEXT: vsubps %ymm0, %ymm2, %ymm0 # sched: [3:1.00] ; HASWELL-NO-FMA-NEXT: vmulps %ymm0, %ymm1, %ymm0 # sched: [5:0.50] ; HASWELL-NO-FMA-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:1.00] @@ -877,7 +877,7 @@ define <8 x float> @v8f32_one_step2(<8 x float> %x) #1 { ; KNL-LABEL: v8f32_one_step2: ; KNL: # %bb.0: ; KNL-NEXT: vrcpps %ymm0, %ymm1 # sched: [11:2.00] -; KNL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; KNL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; KNL-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) + ymm2 sched: [5:0.50] ; KNL-NEXT: vfmadd132ps {{.*#+}} ymm0 = (ymm0 * ymm1) + ymm1 sched: [5:0.50] ; KNL-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm0 # sched: [12:0.50] @@ -899,7 +899,7 @@ define <8 x float> @v8f32_one_step_2_divs(<8 x float> %x) #1 { ; SSE: # %bb.0: ; SSE-NEXT: rcpps %xmm0, %xmm2 ; SSE-NEXT: mulps %xmm2, %xmm0 -; SSE-NEXT: movaps {{.*#+}} xmm3 = [1,1,1,1] +; SSE-NEXT: movaps {{.*#+}} xmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; SSE-NEXT: movaps %xmm3, %xmm4 ; SSE-NEXT: subps %xmm0, %xmm4 ; SSE-NEXT: mulps %xmm2, %xmm4 @@ -909,9 +909,9 @@ define <8 x float> @v8f32_one_step_2_divs(<8 x float> %x) #1 { ; SSE-NEXT: subps %xmm1, %xmm3 ; SSE-NEXT: mulps %xmm0, %xmm3 ; SSE-NEXT: addps %xmm0, %xmm3 -; SSE-NEXT: movaps {{.*#+}} xmm1 = [5,6,7,8] +; SSE-NEXT: movaps {{.*#+}} xmm1 = [5.0E+0,6.0E+0,7.0E+0,8.0E+0] ; SSE-NEXT: mulps %xmm3, %xmm1 -; SSE-NEXT: movaps {{.*#+}} xmm0 = [1,2,3,4] +; SSE-NEXT: movaps {{.*#+}} xmm0 = [1.0E+0,2.0E+0,3.0E+0,4.0E+0] ; SSE-NEXT: mulps %xmm4, %xmm0 ; SSE-NEXT: mulps %xmm4, %xmm0 ; SSE-NEXT: mulps %xmm3, %xmm1 @@ -921,7 +921,7 @@ define <8 x float> @v8f32_one_step_2_divs(<8 x float> %x) #1 { ; AVX-RECIP: # %bb.0: ; AVX-RECIP-NEXT: vrcpps %ymm0, %ymm1 ; AVX-RECIP-NEXT: vmulps %ymm1, %ymm0, %ymm0 -; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] +; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX-RECIP-NEXT: vsubps %ymm0, %ymm2, %ymm0 ; AVX-RECIP-NEXT: vmulps %ymm0, %ymm1, %ymm0 ; AVX-RECIP-NEXT: vaddps %ymm0, %ymm1, %ymm0 @@ -949,7 +949,7 @@ define <8 x float> @v8f32_one_step_2_divs(<8 x float> %x) #1 { ; ; BTVER2-LABEL: v8f32_one_step_2_divs: ; BTVER2: # %bb.0: -; BTVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [5:1.00] +; BTVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:1.00] ; BTVER2-NEXT: vrcpps %ymm0, %ymm1 # sched: [2:2.00] ; BTVER2-NEXT: vmulps %ymm1, %ymm0, %ymm0 # sched: [2:2.00] ; BTVER2-NEXT: vsubps %ymm0, %ymm2, %ymm0 # sched: [3:2.00] @@ -963,7 +963,7 @@ define <8 x float> @v8f32_one_step_2_divs(<8 x float> %x) #1 { ; SANDY: # %bb.0: ; SANDY-NEXT: vrcpps %ymm0, %ymm1 # sched: [7:2.00] ; SANDY-NEXT: vmulps %ymm1, %ymm0, %ymm0 # sched: [5:1.00] -; SANDY-NEXT: vmovaps {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; SANDY-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; SANDY-NEXT: vsubps %ymm0, %ymm2, %ymm0 # sched: [3:1.00] ; SANDY-NEXT: vmulps %ymm0, %ymm1, %ymm0 # sched: [5:1.00] ; SANDY-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:1.00] @@ -974,7 +974,7 @@ define <8 x float> @v8f32_one_step_2_divs(<8 x float> %x) #1 { ; HASWELL-LABEL: v8f32_one_step_2_divs: ; HASWELL: # %bb.0: ; HASWELL-NEXT: vrcpps %ymm0, %ymm1 # sched: [11:2.00] -; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) + ymm2 sched: [5:0.50] ; HASWELL-NEXT: vfmadd132ps {{.*#+}} ymm0 = (ymm0 * ymm1) + ymm1 sched: [5:0.50] ; HASWELL-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm1 # sched: [12:0.50] @@ -985,7 +985,7 @@ define <8 x float> @v8f32_one_step_2_divs(<8 x float> %x) #1 { ; HASWELL-NO-FMA: # %bb.0: ; HASWELL-NO-FMA-NEXT: vrcpps %ymm0, %ymm1 # sched: [11:2.00] ; HASWELL-NO-FMA-NEXT: vmulps %ymm1, %ymm0, %ymm0 # sched: [5:0.50] -; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; HASWELL-NO-FMA-NEXT: vsubps %ymm0, %ymm2, %ymm0 # sched: [3:1.00] ; HASWELL-NO-FMA-NEXT: vmulps %ymm0, %ymm1, %ymm0 # sched: [5:0.50] ; HASWELL-NO-FMA-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:1.00] @@ -996,7 +996,7 @@ define <8 x float> @v8f32_one_step_2_divs(<8 x float> %x) #1 { ; KNL-LABEL: v8f32_one_step_2_divs: ; KNL: # %bb.0: ; KNL-NEXT: vrcpps %ymm0, %ymm1 # sched: [11:2.00] -; KNL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; KNL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; KNL-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) + ymm2 sched: [5:0.50] ; KNL-NEXT: vfmadd132ps {{.*#+}} ymm0 = (ymm0 * ymm1) + ymm1 sched: [5:0.50] ; KNL-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm1 # sched: [12:0.50] @@ -1023,7 +1023,7 @@ define <8 x float> @v8f32_two_step2(<8 x float> %x) #2 { ; SSE-NEXT: rcpps %xmm1, %xmm3 ; SSE-NEXT: movaps %xmm1, %xmm4 ; SSE-NEXT: mulps %xmm3, %xmm4 -; SSE-NEXT: movaps {{.*#+}} xmm0 = [1,1,1,1] +; SSE-NEXT: movaps {{.*#+}} xmm0 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; SSE-NEXT: movaps %xmm0, %xmm5 ; SSE-NEXT: subps %xmm4, %xmm5 ; SSE-NEXT: mulps %xmm3, %xmm5 @@ -1053,7 +1053,7 @@ define <8 x float> @v8f32_two_step2(<8 x float> %x) #2 { ; AVX-RECIP: # %bb.0: ; AVX-RECIP-NEXT: vrcpps %ymm0, %ymm1 ; AVX-RECIP-NEXT: vmulps %ymm1, %ymm0, %ymm2 -; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] +; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX-RECIP-NEXT: vsubps %ymm2, %ymm3, %ymm2 ; AVX-RECIP-NEXT: vmulps %ymm2, %ymm1, %ymm2 ; AVX-RECIP-NEXT: vaddps %ymm2, %ymm1, %ymm1 @@ -1067,7 +1067,7 @@ define <8 x float> @v8f32_two_step2(<8 x float> %x) #2 { ; FMA-RECIP-LABEL: v8f32_two_step2: ; FMA-RECIP: # %bb.0: ; FMA-RECIP-NEXT: vrcpps %ymm0, %ymm1 -; FMA-RECIP-NEXT: vmovaps {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] +; FMA-RECIP-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA-RECIP-NEXT: vmovaps %ymm1, %ymm3 ; FMA-RECIP-NEXT: vfnmadd213ps {{.*#+}} ymm3 = -(ymm0 * ymm3) + ymm2 ; FMA-RECIP-NEXT: vfmadd132ps {{.*#+}} ymm3 = (ymm3 * ymm1) + ymm1 @@ -1079,7 +1079,7 @@ define <8 x float> @v8f32_two_step2(<8 x float> %x) #2 { ; BDVER2-LABEL: v8f32_two_step2: ; BDVER2: # %bb.0: ; BDVER2-NEXT: vrcpps %ymm0, %ymm1 # sched: [5:2.00] -; BDVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [5:0.50] +; BDVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %ymm2, %ymm1, %ymm0, %ymm3 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddps %ymm1, %ymm3, %ymm1, %ymm1 # sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %ymm2, %ymm1, %ymm0, %ymm0 # sched: [5:0.50] @@ -1089,7 +1089,7 @@ define <8 x float> @v8f32_two_step2(<8 x float> %x) #2 { ; ; BTVER2-LABEL: v8f32_two_step2: ; BTVER2: # %bb.0: -; BTVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [5:1.00] +; BTVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:1.00] ; BTVER2-NEXT: vrcpps %ymm0, %ymm1 # sched: [2:2.00] ; BTVER2-NEXT: vmulps %ymm1, %ymm0, %ymm2 # sched: [2:2.00] ; BTVER2-NEXT: vsubps %ymm2, %ymm3, %ymm2 # sched: [3:2.00] @@ -1106,7 +1106,7 @@ define <8 x float> @v8f32_two_step2(<8 x float> %x) #2 { ; SANDY: # %bb.0: ; SANDY-NEXT: vrcpps %ymm0, %ymm1 # sched: [7:2.00] ; SANDY-NEXT: vmulps %ymm1, %ymm0, %ymm2 # sched: [5:1.00] -; SANDY-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; SANDY-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; SANDY-NEXT: vsubps %ymm2, %ymm3, %ymm2 # sched: [3:1.00] ; SANDY-NEXT: vmulps %ymm2, %ymm1, %ymm2 # sched: [5:1.00] ; SANDY-NEXT: vaddps %ymm2, %ymm1, %ymm1 # sched: [3:1.00] @@ -1120,7 +1120,7 @@ define <8 x float> @v8f32_two_step2(<8 x float> %x) #2 { ; HASWELL-LABEL: v8f32_two_step2: ; HASWELL: # %bb.0: ; HASWELL-NEXT: vrcpps %ymm0, %ymm1 # sched: [11:2.00] -; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; HASWELL-NEXT: vmovaps %ymm1, %ymm3 # sched: [1:1.00] ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} ymm3 = -(ymm0 * ymm3) + ymm2 sched: [5:0.50] ; HASWELL-NEXT: vfmadd132ps {{.*#+}} ymm3 = (ymm3 * ymm1) + ymm1 sched: [5:0.50] @@ -1133,7 +1133,7 @@ define <8 x float> @v8f32_two_step2(<8 x float> %x) #2 { ; HASWELL-NO-FMA: # %bb.0: ; HASWELL-NO-FMA-NEXT: vrcpps %ymm0, %ymm1 # sched: [11:2.00] ; HASWELL-NO-FMA-NEXT: vmulps %ymm1, %ymm0, %ymm2 # sched: [5:0.50] -; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; HASWELL-NO-FMA-NEXT: vsubps %ymm2, %ymm3, %ymm2 # sched: [3:1.00] ; HASWELL-NO-FMA-NEXT: vmulps %ymm2, %ymm1, %ymm2 # sched: [5:0.50] ; HASWELL-NO-FMA-NEXT: vaddps %ymm2, %ymm1, %ymm1 # sched: [3:1.00] @@ -1147,7 +1147,7 @@ define <8 x float> @v8f32_two_step2(<8 x float> %x) #2 { ; KNL-LABEL: v8f32_two_step2: ; KNL: # %bb.0: ; KNL-NEXT: vrcpps %ymm0, %ymm1 # sched: [11:2.00] -; KNL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; KNL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; KNL-NEXT: vmovaps %ymm1, %ymm3 # sched: [1:1.00] ; KNL-NEXT: vfnmadd213ps {{.*#+}} ymm3 = -(ymm0 * ymm3) + ymm2 sched: [5:0.50] ; KNL-NEXT: vfmadd132ps {{.*#+}} ymm3 = (ymm3 * ymm1) + ymm1 sched: [5:0.50] @@ -1159,7 +1159,7 @@ define <8 x float> @v8f32_two_step2(<8 x float> %x) #2 { ; SKX-LABEL: v8f32_two_step2: ; SKX: # %bb.0: ; SKX-NEXT: vrcpps %ymm0, %ymm1 # sched: [4:1.00] -; SKX-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; SKX-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; SKX-NEXT: vmovaps %ymm1, %ymm3 # sched: [1:0.33] ; SKX-NEXT: vfnmadd213ps {{.*#+}} ymm3 = -(ymm0 * ymm3) + ymm2 sched: [4:0.50] ; SKX-NEXT: vfmadd132ps {{.*#+}} ymm3 = (ymm3 * ymm1) + ymm1 sched: [4:0.50] @@ -1300,7 +1300,7 @@ define <16 x float> @v16f32_one_step2(<16 x float> %x) #1 { ; SSE-NEXT: movaps %xmm0, %xmm6 ; SSE-NEXT: rcpps %xmm3, %xmm2 ; SSE-NEXT: mulps %xmm2, %xmm4 -; SSE-NEXT: movaps {{.*#+}} xmm0 = [1,1,1,1] +; SSE-NEXT: movaps {{.*#+}} xmm0 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; SSE-NEXT: movaps %xmm0, %xmm3 ; SSE-NEXT: subps %xmm4, %xmm3 ; SSE-NEXT: mulps %xmm2, %xmm3 @@ -1333,7 +1333,7 @@ define <16 x float> @v16f32_one_step2(<16 x float> %x) #1 { ; AVX-RECIP: # %bb.0: ; AVX-RECIP-NEXT: vrcpps %ymm1, %ymm2 ; AVX-RECIP-NEXT: vmulps %ymm2, %ymm1, %ymm1 -; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] +; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX-RECIP-NEXT: vsubps %ymm1, %ymm3, %ymm1 ; AVX-RECIP-NEXT: vmulps %ymm1, %ymm2, %ymm1 ; AVX-RECIP-NEXT: vaddps %ymm1, %ymm2, %ymm1 @@ -1349,7 +1349,7 @@ define <16 x float> @v16f32_one_step2(<16 x float> %x) #1 { ; FMA-RECIP-LABEL: v16f32_one_step2: ; FMA-RECIP: # %bb.0: ; FMA-RECIP-NEXT: vrcpps %ymm1, %ymm2 -; FMA-RECIP-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] +; FMA-RECIP-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA-RECIP-NEXT: vfnmadd213ps {{.*#+}} ymm1 = -(ymm2 * ymm1) + ymm3 ; FMA-RECIP-NEXT: vfmadd132ps {{.*#+}} ymm1 = (ymm1 * ymm2) + ymm2 ; FMA-RECIP-NEXT: vrcpps %ymm0, %ymm2 @@ -1362,7 +1362,7 @@ define <16 x float> @v16f32_one_step2(<16 x float> %x) #1 { ; BDVER2-LABEL: v16f32_one_step2: ; BDVER2: # %bb.0: ; BDVER2-NEXT: vrcpps %ymm1, %ymm2 # sched: [5:2.00] -; BDVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [5:0.50] +; BDVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:0.50] ; BDVER2-NEXT: vrcpps %ymm0, %ymm4 # sched: [5:2.00] ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm2, %ymm1, %ymm1 # sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm4, %ymm0, %ymm0 # sched: [5:0.50] @@ -1374,7 +1374,7 @@ define <16 x float> @v16f32_one_step2(<16 x float> %x) #1 { ; ; BTVER2-LABEL: v16f32_one_step2: ; BTVER2: # %bb.0: -; BTVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [5:1.00] +; BTVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:1.00] ; BTVER2-NEXT: vrcpps %ymm1, %ymm2 # sched: [2:2.00] ; BTVER2-NEXT: vrcpps %ymm0, %ymm4 # sched: [2:2.00] ; BTVER2-NEXT: vmulps %ymm2, %ymm1, %ymm1 # sched: [2:2.00] @@ -1393,7 +1393,7 @@ define <16 x float> @v16f32_one_step2(<16 x float> %x) #1 { ; SANDY: # %bb.0: ; SANDY-NEXT: vrcpps %ymm1, %ymm2 # sched: [7:2.00] ; SANDY-NEXT: vmulps %ymm2, %ymm1, %ymm1 # sched: [5:1.00] -; SANDY-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; SANDY-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; SANDY-NEXT: vsubps %ymm1, %ymm3, %ymm1 # sched: [3:1.00] ; SANDY-NEXT: vmulps %ymm1, %ymm2, %ymm1 # sched: [5:1.00] ; SANDY-NEXT: vaddps %ymm1, %ymm2, %ymm1 # sched: [3:1.00] @@ -1409,7 +1409,7 @@ define <16 x float> @v16f32_one_step2(<16 x float> %x) #1 { ; HASWELL-LABEL: v16f32_one_step2: ; HASWELL: # %bb.0: ; HASWELL-NEXT: vrcpps %ymm1, %ymm2 # sched: [11:2.00] -; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; HASWELL-NEXT: vrcpps %ymm0, %ymm4 # sched: [11:2.00] ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} ymm1 = -(ymm2 * ymm1) + ymm3 sched: [5:0.50] ; HASWELL-NEXT: vfmadd132ps {{.*#+}} ymm1 = (ymm1 * ymm2) + ymm2 sched: [5:0.50] @@ -1423,7 +1423,7 @@ define <16 x float> @v16f32_one_step2(<16 x float> %x) #1 { ; HASWELL-NO-FMA: # %bb.0: ; HASWELL-NO-FMA-NEXT: vrcpps %ymm1, %ymm2 # sched: [11:2.00] ; HASWELL-NO-FMA-NEXT: vmulps %ymm2, %ymm1, %ymm1 # sched: [5:0.50] -; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; HASWELL-NO-FMA-NEXT: vsubps %ymm1, %ymm3, %ymm1 # sched: [3:1.00] ; HASWELL-NO-FMA-NEXT: vmulps %ymm1, %ymm2, %ymm1 # sched: [5:0.50] ; HASWELL-NO-FMA-NEXT: vaddps %ymm1, %ymm2, %ymm1 # sched: [3:1.00] @@ -1460,7 +1460,7 @@ define <16 x float> @v16f32_one_step_2_divs(<16 x float> %x) #1 { ; SSE: # %bb.0: ; SSE-NEXT: rcpps %xmm0, %xmm6 ; SSE-NEXT: mulps %xmm6, %xmm0 -; SSE-NEXT: movaps {{.*#+}} xmm4 = [1,1,1,1] +; SSE-NEXT: movaps {{.*#+}} xmm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; SSE-NEXT: movaps %xmm4, %xmm5 ; SSE-NEXT: subps %xmm0, %xmm5 ; SSE-NEXT: mulps %xmm6, %xmm5 @@ -1482,13 +1482,13 @@ define <16 x float> @v16f32_one_step_2_divs(<16 x float> %x) #1 { ; SSE-NEXT: subps %xmm3, %xmm4 ; SSE-NEXT: mulps %xmm0, %xmm4 ; SSE-NEXT: addps %xmm0, %xmm4 -; SSE-NEXT: movaps {{.*#+}} xmm3 = [13,14,15,16] +; SSE-NEXT: movaps {{.*#+}} xmm3 = [1.3E+1,1.4E+1,1.5E+1,1.6E+1] ; SSE-NEXT: mulps %xmm4, %xmm3 -; SSE-NEXT: movaps {{.*#+}} xmm2 = [9,10,11,12] +; SSE-NEXT: movaps {{.*#+}} xmm2 = [9.0E+0,1.0E+1,1.1E+1,1.2E+1] ; SSE-NEXT: mulps %xmm7, %xmm2 -; SSE-NEXT: movaps {{.*#+}} xmm1 = [5,6,7,8] +; SSE-NEXT: movaps {{.*#+}} xmm1 = [5.0E+0,6.0E+0,7.0E+0,8.0E+0] ; SSE-NEXT: mulps %xmm6, %xmm1 -; SSE-NEXT: movaps {{.*#+}} xmm0 = [1,2,3,4] +; SSE-NEXT: movaps {{.*#+}} xmm0 = [1.0E+0,2.0E+0,3.0E+0,4.0E+0] ; SSE-NEXT: mulps %xmm5, %xmm0 ; SSE-NEXT: mulps %xmm5, %xmm0 ; SSE-NEXT: mulps %xmm6, %xmm1 @@ -1500,7 +1500,7 @@ define <16 x float> @v16f32_one_step_2_divs(<16 x float> %x) #1 { ; AVX-RECIP: # %bb.0: ; AVX-RECIP-NEXT: vrcpps %ymm0, %ymm2 ; AVX-RECIP-NEXT: vmulps %ymm2, %ymm0, %ymm0 -; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] +; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX-RECIP-NEXT: vsubps %ymm0, %ymm3, %ymm0 ; AVX-RECIP-NEXT: vmulps %ymm0, %ymm2, %ymm0 ; AVX-RECIP-NEXT: vaddps %ymm0, %ymm2, %ymm0 @@ -1518,7 +1518,7 @@ define <16 x float> @v16f32_one_step_2_divs(<16 x float> %x) #1 { ; FMA-RECIP-LABEL: v16f32_one_step_2_divs: ; FMA-RECIP: # %bb.0: ; FMA-RECIP-NEXT: vrcpps %ymm0, %ymm2 -; FMA-RECIP-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] +; FMA-RECIP-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA-RECIP-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm2 * ymm0) + ymm3 ; FMA-RECIP-NEXT: vfmadd132ps {{.*#+}} ymm0 = (ymm0 * ymm2) + ymm2 ; FMA-RECIP-NEXT: vrcpps %ymm1, %ymm2 @@ -1533,7 +1533,7 @@ define <16 x float> @v16f32_one_step_2_divs(<16 x float> %x) #1 { ; BDVER2-LABEL: v16f32_one_step_2_divs: ; BDVER2: # %bb.0: ; BDVER2-NEXT: vrcpps %ymm0, %ymm2 # sched: [5:2.00] -; BDVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [5:0.50] +; BDVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm2, %ymm0, %ymm0 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddps %ymm2, %ymm0, %ymm2, %ymm0 # sched: [5:0.50] ; BDVER2-NEXT: vrcpps %ymm1, %ymm2 # sched: [5:2.00] @@ -1547,7 +1547,7 @@ define <16 x float> @v16f32_one_step_2_divs(<16 x float> %x) #1 { ; ; BTVER2-LABEL: v16f32_one_step_2_divs: ; BTVER2: # %bb.0: -; BTVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [5:1.00] +; BTVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:1.00] ; BTVER2-NEXT: vrcpps %ymm0, %ymm2 # sched: [2:2.00] ; BTVER2-NEXT: vmulps %ymm2, %ymm0, %ymm0 # sched: [2:2.00] ; BTVER2-NEXT: vsubps %ymm0, %ymm3, %ymm0 # sched: [3:2.00] @@ -1568,7 +1568,7 @@ define <16 x float> @v16f32_one_step_2_divs(<16 x float> %x) #1 { ; SANDY: # %bb.0: ; SANDY-NEXT: vrcpps %ymm0, %ymm2 # sched: [7:2.00] ; SANDY-NEXT: vmulps %ymm2, %ymm0, %ymm0 # sched: [5:1.00] -; SANDY-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; SANDY-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; SANDY-NEXT: vsubps %ymm0, %ymm3, %ymm0 # sched: [3:1.00] ; SANDY-NEXT: vrcpps %ymm1, %ymm4 # sched: [7:2.00] ; SANDY-NEXT: vmulps %ymm0, %ymm2, %ymm0 # sched: [5:1.00] @@ -1586,7 +1586,7 @@ define <16 x float> @v16f32_one_step_2_divs(<16 x float> %x) #1 { ; HASWELL-LABEL: v16f32_one_step_2_divs: ; HASWELL: # %bb.0: ; HASWELL-NEXT: vrcpps %ymm0, %ymm2 # sched: [11:2.00] -; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm2 * ymm0) + ymm3 sched: [5:0.50] ; HASWELL-NEXT: vfmadd132ps {{.*#+}} ymm0 = (ymm0 * ymm2) + ymm2 sched: [5:0.50] ; HASWELL-NEXT: vrcpps %ymm1, %ymm2 # sched: [11:2.00] @@ -1602,7 +1602,7 @@ define <16 x float> @v16f32_one_step_2_divs(<16 x float> %x) #1 { ; HASWELL-NO-FMA: # %bb.0: ; HASWELL-NO-FMA-NEXT: vrcpps %ymm0, %ymm2 # sched: [11:2.00] ; HASWELL-NO-FMA-NEXT: vmulps %ymm2, %ymm0, %ymm0 # sched: [5:0.50] -; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; HASWELL-NO-FMA-NEXT: vsubps %ymm0, %ymm3, %ymm0 # sched: [3:1.00] ; HASWELL-NO-FMA-NEXT: vrcpps %ymm1, %ymm4 # sched: [11:2.00] ; HASWELL-NO-FMA-NEXT: vmulps %ymm0, %ymm2, %ymm0 # sched: [5:0.50] @@ -1647,7 +1647,7 @@ define <16 x float> @v16f32_two_step2(<16 x float> %x) #2 { ; SSE-NEXT: movaps %xmm0, %xmm4 ; SSE-NEXT: rcpps %xmm3, %xmm2 ; SSE-NEXT: mulps %xmm2, %xmm3 -; SSE-NEXT: movaps {{.*#+}} xmm0 = [1,1,1,1] +; SSE-NEXT: movaps {{.*#+}} xmm0 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; SSE-NEXT: movaps %xmm0, %xmm7 ; SSE-NEXT: subps %xmm3, %xmm7 ; SSE-NEXT: mulps %xmm2, %xmm7 @@ -1703,7 +1703,7 @@ define <16 x float> @v16f32_two_step2(<16 x float> %x) #2 { ; AVX-RECIP: # %bb.0: ; AVX-RECIP-NEXT: vrcpps %ymm1, %ymm2 ; AVX-RECIP-NEXT: vmulps %ymm2, %ymm1, %ymm3 -; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm4 = [1,1,1,1,1,1,1,1] +; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX-RECIP-NEXT: vsubps %ymm3, %ymm4, %ymm3 ; AVX-RECIP-NEXT: vmulps %ymm3, %ymm2, %ymm3 ; AVX-RECIP-NEXT: vaddps %ymm3, %ymm2, %ymm2 @@ -1727,7 +1727,7 @@ define <16 x float> @v16f32_two_step2(<16 x float> %x) #2 { ; FMA-RECIP-LABEL: v16f32_two_step2: ; FMA-RECIP: # %bb.0: ; FMA-RECIP-NEXT: vrcpps %ymm1, %ymm2 -; FMA-RECIP-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] +; FMA-RECIP-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; FMA-RECIP-NEXT: vmovaps %ymm2, %ymm4 ; FMA-RECIP-NEXT: vfnmadd213ps {{.*#+}} ymm4 = -(ymm1 * ymm4) + ymm3 ; FMA-RECIP-NEXT: vfmadd132ps {{.*#+}} ymm4 = (ymm4 * ymm2) + ymm2 @@ -1746,7 +1746,7 @@ define <16 x float> @v16f32_two_step2(<16 x float> %x) #2 { ; BDVER2-LABEL: v16f32_two_step2: ; BDVER2: # %bb.0: ; BDVER2-NEXT: vrcpps %ymm1, %ymm2 # sched: [5:2.00] -; BDVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [5:0.50] +; BDVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm2, %ymm1, %ymm4 # sched: [5:0.50] ; BDVER2-NEXT: vfmaddps %ymm2, %ymm4, %ymm2, %ymm2 # sched: [5:0.50] ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm2, %ymm1, %ymm1 # sched: [5:0.50] @@ -1762,7 +1762,7 @@ define <16 x float> @v16f32_two_step2(<16 x float> %x) #2 { ; ; BTVER2-LABEL: v16f32_two_step2: ; BTVER2: # %bb.0: -; BTVER2-NEXT: vmovaps {{.*#+}} ymm4 = [1,1,1,1,1,1,1,1] sched: [5:1.00] +; BTVER2-NEXT: vmovaps {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [5:1.00] ; BTVER2-NEXT: vrcpps %ymm1, %ymm2 # sched: [2:2.00] ; BTVER2-NEXT: vmulps %ymm2, %ymm1, %ymm3 # sched: [2:2.00] ; BTVER2-NEXT: vsubps %ymm3, %ymm4, %ymm3 # sched: [3:2.00] @@ -1789,7 +1789,7 @@ define <16 x float> @v16f32_two_step2(<16 x float> %x) #2 { ; SANDY: # %bb.0: ; SANDY-NEXT: vrcpps %ymm1, %ymm2 # sched: [7:2.00] ; SANDY-NEXT: vmulps %ymm2, %ymm1, %ymm3 # sched: [5:1.00] -; SANDY-NEXT: vmovaps {{.*#+}} ymm4 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; SANDY-NEXT: vmovaps {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; SANDY-NEXT: vsubps %ymm3, %ymm4, %ymm3 # sched: [3:1.00] ; SANDY-NEXT: vmulps %ymm3, %ymm2, %ymm3 # sched: [5:1.00] ; SANDY-NEXT: vaddps %ymm3, %ymm2, %ymm2 # sched: [3:1.00] @@ -1813,7 +1813,7 @@ define <16 x float> @v16f32_two_step2(<16 x float> %x) #2 { ; HASWELL-LABEL: v16f32_two_step2: ; HASWELL: # %bb.0: ; HASWELL-NEXT: vrcpps %ymm1, %ymm2 # sched: [11:2.00] -; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; HASWELL-NEXT: vmovaps %ymm2, %ymm4 # sched: [1:1.00] ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} ymm4 = -(ymm1 * ymm4) + ymm3 sched: [5:0.50] ; HASWELL-NEXT: vfmadd132ps {{.*#+}} ymm4 = (ymm4 * ymm2) + ymm2 sched: [5:0.50] @@ -1833,7 +1833,7 @@ define <16 x float> @v16f32_two_step2(<16 x float> %x) #2 { ; HASWELL-NO-FMA: # %bb.0: ; HASWELL-NO-FMA-NEXT: vrcpps %ymm1, %ymm2 # sched: [11:2.00] ; HASWELL-NO-FMA-NEXT: vmulps %ymm2, %ymm1, %ymm3 # sched: [5:0.50] -; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm4 = [1,1,1,1,1,1,1,1] sched: [7:0.50] +; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [7:0.50] ; HASWELL-NO-FMA-NEXT: vsubps %ymm3, %ymm4, %ymm3 # sched: [3:1.00] ; HASWELL-NO-FMA-NEXT: vmulps %ymm3, %ymm2, %ymm3 # sched: [5:0.50] ; HASWELL-NO-FMA-NEXT: vaddps %ymm3, %ymm2, %ymm2 # sched: [3:1.00] @@ -1857,7 +1857,7 @@ define <16 x float> @v16f32_two_step2(<16 x float> %x) #2 { ; KNL-LABEL: v16f32_two_step2: ; KNL: # %bb.0: ; KNL-NEXT: vrcp14ps %zmm0, %zmm1 # sched: [11:2.00] -; KNL-NEXT: vbroadcastss {{.*#+}} zmm2 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] sched: [10:1.00] +; KNL-NEXT: vbroadcastss {{.*#+}} zmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [10:1.00] ; KNL-NEXT: vmovaps %zmm1, %zmm3 # sched: [1:1.00] ; KNL-NEXT: vfnmadd213ps {{.*#+}} zmm3 = -(zmm0 * zmm3) + zmm2 sched: [5:0.50] ; KNL-NEXT: vfmadd132ps {{.*#+}} zmm3 = (zmm3 * zmm1) + zmm1 sched: [5:0.50] @@ -1869,7 +1869,7 @@ define <16 x float> @v16f32_two_step2(<16 x float> %x) #2 { ; SKX-LABEL: v16f32_two_step2: ; SKX: # %bb.0: ; SKX-NEXT: vrcp14ps %zmm0, %zmm1 # sched: [4:2.00] -; SKX-NEXT: vbroadcastss {{.*#+}} zmm2 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] sched: [8:0.50] +; SKX-NEXT: vbroadcastss {{.*#+}} zmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] sched: [8:0.50] ; SKX-NEXT: vmovaps %zmm1, %zmm3 # sched: [1:0.33] ; SKX-NEXT: vfnmadd213ps {{.*#+}} zmm3 = -(zmm0 * zmm3) + zmm2 sched: [4:0.50] ; SKX-NEXT: vfmadd132ps {{.*#+}} zmm3 = (zmm3 * zmm1) + zmm1 sched: [4:0.50] diff --git a/test/CodeGen/X86/select_const.ll b/test/CodeGen/X86/select_const.ll index dcd57d2f537..68c83391e60 100644 --- a/test/CodeGen/X86/select_const.ll +++ b/test/CodeGen/X86/select_const.ll @@ -468,10 +468,10 @@ define <2 x double> @sel_constants_fmul_constant_vec(i1 %cond) { ; CHECK-NEXT: testb $1, %dil ; CHECK-NEXT: jne .LBB37_1 ; CHECK-NEXT: # %bb.2: -; CHECK-NEXT: movaps {{.*#+}} xmm0 = [118.83,34.539999999999999] +; CHECK-NEXT: movaps {{.*#+}} xmm0 = [1.1883E+2,3.4539999999999999E+1] ; CHECK-NEXT: retq ; CHECK-NEXT: .LBB37_1: -; CHECK-NEXT: movaps {{.*#+}} xmm0 = [-20.399999999999999,37.68] +; CHECK-NEXT: movaps {{.*#+}} xmm0 = [-2.0399999999999999E+1,3.768E+1] ; CHECK-NEXT: retq %sel = select i1 %cond, <2 x double> , <2 x double> %bo = fmul <2 x double> %sel, diff --git a/test/CodeGen/X86/splat-for-size.ll b/test/CodeGen/X86/splat-for-size.ll index 7567dbcdad0..7aae59080fd 100644 --- a/test/CodeGen/X86/splat-for-size.ll +++ b/test/CodeGen/X86/splat-for-size.ll @@ -9,7 +9,7 @@ define <2 x double> @splat_v2f64(<2 x double> %x) #0 { ; CHECK-LABEL: splat_v2f64: ; CHECK: # %bb.0: -; CHECK-NEXT: vmovddup {{.*#+}} xmm1 = [1,1] +; CHECK-NEXT: vmovddup {{.*#+}} xmm1 = [1.0E+0,1.0E+0] ; CHECK-NEXT: # xmm1 = mem[0,0] ; CHECK-NEXT: vaddpd %xmm1, %xmm0, %xmm0 ; CHECK-NEXT: retq @@ -20,7 +20,7 @@ define <2 x double> @splat_v2f64(<2 x double> %x) #0 { define <4 x double> @splat_v4f64(<4 x double> %x) #1 { ; CHECK-LABEL: splat_v4f64: ; CHECK: # %bb.0: -; CHECK-NEXT: vbroadcastsd {{.*#+}} ymm1 = [1,1,1,1] +; CHECK-NEXT: vbroadcastsd {{.*#+}} ymm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; CHECK-NEXT: vaddpd %ymm1, %ymm0, %ymm0 ; CHECK-NEXT: retq %add = fadd <4 x double> %x, @@ -30,7 +30,7 @@ define <4 x double> @splat_v4f64(<4 x double> %x) #1 { define <4 x float> @splat_v4f32(<4 x float> %x) #0 { ; CHECK-LABEL: splat_v4f32: ; CHECK: # %bb.0: -; CHECK-NEXT: vbroadcastss {{.*#+}} xmm1 = [1,1,1,1] +; CHECK-NEXT: vbroadcastss {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; CHECK-NEXT: vaddps %xmm1, %xmm0, %xmm0 ; CHECK-NEXT: retq %add = fadd <4 x float> %x, @@ -40,7 +40,7 @@ define <4 x float> @splat_v4f32(<4 x float> %x) #0 { define <8 x float> @splat_v8f32(<8 x float> %x) #1 { ; CHECK-LABEL: splat_v8f32: ; CHECK: # %bb.0: -; CHECK-NEXT: vbroadcastss {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1] +; CHECK-NEXT: vbroadcastss {{.*#+}} ymm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; CHECK-NEXT: vaddps %ymm1, %ymm0, %ymm0 ; CHECK-NEXT: retq %add = fadd <8 x float> %x, diff --git a/test/CodeGen/X86/sqrt-fastmath.ll b/test/CodeGen/X86/sqrt-fastmath.ll index 78a0514b91d..6e0273d513f 100644 --- a/test/CodeGen/X86/sqrt-fastmath.ll +++ b/test/CodeGen/X86/sqrt-fastmath.ll @@ -178,7 +178,7 @@ define <4 x float> @sqrt_v4f32_check_denorms(<4 x float> %x) #3 { ; SSE-NEXT: rsqrtps %xmm0, %xmm2 ; SSE-NEXT: movaps %xmm0, %xmm1 ; SSE-NEXT: mulps %xmm2, %xmm1 -; SSE-NEXT: movaps {{.*#+}} xmm3 = [-0.5,-0.5,-0.5,-0.5] +; SSE-NEXT: movaps {{.*#+}} xmm3 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; SSE-NEXT: mulps %xmm1, %xmm3 ; SSE-NEXT: mulps %xmm2, %xmm1 ; SSE-NEXT: addps {{.*}}(%rip), %xmm1 @@ -208,9 +208,9 @@ define <4 x float> @sqrt_v4f32_check_denorms(<4 x float> %x) #3 { ; AVX512: # %bb.0: ; AVX512-NEXT: vrsqrtps %xmm0, %xmm1 ; AVX512-NEXT: vmulps %xmm1, %xmm0, %xmm2 -; AVX512-NEXT: vbroadcastss {{.*#+}} xmm3 = [-3,-3,-3,-3] +; AVX512-NEXT: vbroadcastss {{.*#+}} xmm3 = [-3.0E+0,-3.0E+0,-3.0E+0,-3.0E+0] ; AVX512-NEXT: vfmadd231ps {{.*#+}} xmm3 = (xmm2 * xmm1) + xmm3 -; AVX512-NEXT: vbroadcastss {{.*#+}} xmm1 = [-0.5,-0.5,-0.5,-0.5] +; AVX512-NEXT: vbroadcastss {{.*#+}} xmm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; AVX512-NEXT: vmulps %xmm3, %xmm1, %xmm1 ; AVX512-NEXT: vmulps %xmm1, %xmm2, %xmm1 ; AVX512-NEXT: vbroadcastss {{.*#+}} xmm2 = [NaN,NaN,NaN,NaN] @@ -282,21 +282,21 @@ define <4 x float> @v4f32_no_estimate(<4 x float> %x) #0 { ; SSE-LABEL: v4f32_no_estimate: ; SSE: # %bb.0: ; SSE-NEXT: sqrtps %xmm0, %xmm1 -; SSE-NEXT: movaps {{.*#+}} xmm0 = [1,1,1,1] +; SSE-NEXT: movaps {{.*#+}} xmm0 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; SSE-NEXT: divps %xmm1, %xmm0 ; SSE-NEXT: retq ; ; AVX1-LABEL: v4f32_no_estimate: ; AVX1: # %bb.0: ; AVX1-NEXT: vsqrtps %xmm0, %xmm0 -; AVX1-NEXT: vmovaps {{.*#+}} xmm1 = [1,1,1,1] +; AVX1-NEXT: vmovaps {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX1-NEXT: vdivps %xmm0, %xmm1, %xmm0 ; AVX1-NEXT: retq ; ; AVX512-LABEL: v4f32_no_estimate: ; AVX512: # %bb.0: ; AVX512-NEXT: vsqrtps %xmm0, %xmm0 -; AVX512-NEXT: vbroadcastss {{.*#+}} xmm1 = [1,1,1,1] +; AVX512-NEXT: vbroadcastss {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX512-NEXT: vdivps %xmm0, %xmm1, %xmm0 ; AVX512-NEXT: retq %sqrt = tail call <4 x float> @llvm.sqrt.v4f32(<4 x float> %x) @@ -331,9 +331,9 @@ define <4 x float> @v4f32_estimate(<4 x float> %x) #1 { ; AVX512: # %bb.0: ; AVX512-NEXT: vrsqrtps %xmm0, %xmm1 ; AVX512-NEXT: vmulps %xmm1, %xmm0, %xmm0 -; AVX512-NEXT: vbroadcastss {{.*#+}} xmm2 = [-3,-3,-3,-3] +; AVX512-NEXT: vbroadcastss {{.*#+}} xmm2 = [-3.0E+0,-3.0E+0,-3.0E+0,-3.0E+0] ; AVX512-NEXT: vfmadd213ps {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm2 -; AVX512-NEXT: vbroadcastss {{.*#+}} xmm2 = [-0.5,-0.5,-0.5,-0.5] +; AVX512-NEXT: vbroadcastss {{.*#+}} xmm2 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; AVX512-NEXT: vmulps %xmm0, %xmm2, %xmm0 ; AVX512-NEXT: vmulps %xmm0, %xmm1, %xmm0 ; AVX512-NEXT: retq @@ -347,7 +347,7 @@ define <8 x float> @v8f32_no_estimate(<8 x float> %x) #0 { ; SSE: # %bb.0: ; SSE-NEXT: sqrtps %xmm1, %xmm2 ; SSE-NEXT: sqrtps %xmm0, %xmm3 -; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,1,1,1] +; SSE-NEXT: movaps {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; SSE-NEXT: movaps %xmm1, %xmm0 ; SSE-NEXT: divps %xmm3, %xmm0 ; SSE-NEXT: divps %xmm2, %xmm1 @@ -356,14 +356,14 @@ define <8 x float> @v8f32_no_estimate(<8 x float> %x) #0 { ; AVX1-LABEL: v8f32_no_estimate: ; AVX1: # %bb.0: ; AVX1-NEXT: vsqrtps %ymm0, %ymm0 -; AVX1-NEXT: vmovaps {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1] +; AVX1-NEXT: vmovaps {{.*#+}} ymm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX1-NEXT: vdivps %ymm0, %ymm1, %ymm0 ; AVX1-NEXT: retq ; ; AVX512-LABEL: v8f32_no_estimate: ; AVX512: # %bb.0: ; AVX512-NEXT: vsqrtps %ymm0, %ymm0 -; AVX512-NEXT: vbroadcastss {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1] +; AVX512-NEXT: vbroadcastss {{.*#+}} ymm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX512-NEXT: vdivps %ymm0, %ymm1, %ymm0 ; AVX512-NEXT: retq %sqrt = tail call <8 x float> @llvm.sqrt.v8f32(<8 x float> %x) @@ -375,11 +375,11 @@ define <8 x float> @v8f32_estimate(<8 x float> %x) #1 { ; SSE-LABEL: v8f32_estimate: ; SSE: # %bb.0: ; SSE-NEXT: rsqrtps %xmm0, %xmm3 -; SSE-NEXT: movaps {{.*#+}} xmm4 = [-0.5,-0.5,-0.5,-0.5] +; SSE-NEXT: movaps {{.*#+}} xmm4 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; SSE-NEXT: movaps %xmm3, %xmm2 ; SSE-NEXT: mulps %xmm3, %xmm2 ; SSE-NEXT: mulps %xmm0, %xmm2 -; SSE-NEXT: movaps {{.*#+}} xmm0 = [-3,-3,-3,-3] +; SSE-NEXT: movaps {{.*#+}} xmm0 = [-3.0E+0,-3.0E+0,-3.0E+0,-3.0E+0] ; SSE-NEXT: addps %xmm0, %xmm2 ; SSE-NEXT: mulps %xmm4, %xmm2 ; SSE-NEXT: mulps %xmm3, %xmm2 @@ -408,9 +408,9 @@ define <8 x float> @v8f32_estimate(<8 x float> %x) #1 { ; AVX512: # %bb.0: ; AVX512-NEXT: vrsqrtps %ymm0, %ymm1 ; AVX512-NEXT: vmulps %ymm1, %ymm0, %ymm0 -; AVX512-NEXT: vbroadcastss {{.*#+}} ymm2 = [-3,-3,-3,-3,-3,-3,-3,-3] +; AVX512-NEXT: vbroadcastss {{.*#+}} ymm2 = [-3.0E+0,-3.0E+0,-3.0E+0,-3.0E+0,-3.0E+0,-3.0E+0,-3.0E+0,-3.0E+0] ; AVX512-NEXT: vfmadd213ps {{.*#+}} ymm0 = (ymm1 * ymm0) + ymm2 -; AVX512-NEXT: vbroadcastss {{.*#+}} ymm2 = [-0.5,-0.5,-0.5,-0.5,-0.5,-0.5,-0.5,-0.5] +; AVX512-NEXT: vbroadcastss {{.*#+}} ymm2 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; AVX512-NEXT: vmulps %ymm0, %ymm2, %ymm0 ; AVX512-NEXT: vmulps %ymm0, %ymm1, %ymm0 ; AVX512-NEXT: retq @@ -426,7 +426,7 @@ define <16 x float> @v16f32_no_estimate(<16 x float> %x) #0 { ; SSE-NEXT: sqrtps %xmm2, %xmm5 ; SSE-NEXT: sqrtps %xmm1, %xmm2 ; SSE-NEXT: sqrtps %xmm0, %xmm1 -; SSE-NEXT: movaps {{.*#+}} xmm3 = [1,1,1,1] +; SSE-NEXT: movaps {{.*#+}} xmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; SSE-NEXT: movaps %xmm3, %xmm0 ; SSE-NEXT: divps %xmm1, %xmm0 ; SSE-NEXT: movaps %xmm3, %xmm1 @@ -440,7 +440,7 @@ define <16 x float> @v16f32_no_estimate(<16 x float> %x) #0 { ; AVX1: # %bb.0: ; AVX1-NEXT: vsqrtps %ymm1, %ymm1 ; AVX1-NEXT: vsqrtps %ymm0, %ymm0 -; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] +; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX1-NEXT: vdivps %ymm0, %ymm2, %ymm0 ; AVX1-NEXT: vdivps %ymm1, %ymm2, %ymm1 ; AVX1-NEXT: retq @@ -448,7 +448,7 @@ define <16 x float> @v16f32_no_estimate(<16 x float> %x) #0 { ; AVX512-LABEL: v16f32_no_estimate: ; AVX512: # %bb.0: ; AVX512-NEXT: vsqrtps %zmm0, %zmm0 -; AVX512-NEXT: vbroadcastss {{.*#+}} zmm1 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] +; AVX512-NEXT: vbroadcastss {{.*#+}} zmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX512-NEXT: vdivps %zmm0, %zmm1, %zmm0 ; AVX512-NEXT: retq %sqrt = tail call <16 x float> @llvm.sqrt.v16f32(<16 x float> %x) @@ -462,11 +462,11 @@ define <16 x float> @v16f32_estimate(<16 x float> %x) #1 { ; SSE-NEXT: movaps %xmm1, %xmm4 ; SSE-NEXT: movaps %xmm0, %xmm1 ; SSE-NEXT: rsqrtps %xmm0, %xmm5 -; SSE-NEXT: movaps {{.*#+}} xmm6 = [-0.5,-0.5,-0.5,-0.5] +; SSE-NEXT: movaps {{.*#+}} xmm6 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; SSE-NEXT: movaps %xmm5, %xmm0 ; SSE-NEXT: mulps %xmm5, %xmm0 ; SSE-NEXT: mulps %xmm1, %xmm0 -; SSE-NEXT: movaps {{.*#+}} xmm7 = [-3,-3,-3,-3] +; SSE-NEXT: movaps {{.*#+}} xmm7 = [-3.0E+0,-3.0E+0,-3.0E+0,-3.0E+0] ; SSE-NEXT: addps %xmm7, %xmm0 ; SSE-NEXT: mulps %xmm6, %xmm0 ; SSE-NEXT: mulps %xmm5, %xmm0 @@ -498,10 +498,10 @@ define <16 x float> @v16f32_estimate(<16 x float> %x) #1 { ; AVX1-LABEL: v16f32_estimate: ; AVX1: # %bb.0: ; AVX1-NEXT: vrsqrtps %ymm0, %ymm2 -; AVX1-NEXT: vmovaps {{.*#+}} ymm3 = [-0.5,-0.5,-0.5,-0.5,-0.5,-0.5,-0.5,-0.5] +; AVX1-NEXT: vmovaps {{.*#+}} ymm3 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; AVX1-NEXT: vmulps %ymm2, %ymm2, %ymm4 ; AVX1-NEXT: vmulps %ymm4, %ymm0, %ymm0 -; AVX1-NEXT: vmovaps {{.*#+}} ymm4 = [-3,-3,-3,-3,-3,-3,-3,-3] +; AVX1-NEXT: vmovaps {{.*#+}} ymm4 = [-3.0E+0,-3.0E+0,-3.0E+0,-3.0E+0,-3.0E+0,-3.0E+0,-3.0E+0,-3.0E+0] ; AVX1-NEXT: vaddps %ymm4, %ymm0, %ymm0 ; AVX1-NEXT: vmulps %ymm0, %ymm3, %ymm0 ; AVX1-NEXT: vmulps %ymm0, %ymm2, %ymm0 diff --git a/test/CodeGen/X86/sse2.ll b/test/CodeGen/X86/sse2.ll index b2efb5b2933..be019aff514 100644 --- a/test/CodeGen/X86/sse2.ll +++ b/test/CodeGen/X86/sse2.ll @@ -395,7 +395,7 @@ define void @test12() nounwind { ; SSE-LABEL: test12: ; SSE: # %bb.0: ; SSE-NEXT: movapd 0, %xmm0 -; SSE-NEXT: movapd {{.*#+}} xmm1 = [1,1,1,1] +; SSE-NEXT: movapd {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; SSE-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1] ; SSE-NEXT: xorps %xmm2, %xmm2 ; SSE-NEXT: movhlps {{.*#+}} xmm2 = xmm0[1],xmm2[1] @@ -416,7 +416,7 @@ define void @test12() nounwind { ; AVX512-LABEL: test12: ; AVX512: # %bb.0: ; AVX512-NEXT: vmovaps 0, %xmm0 -; AVX512-NEXT: vbroadcastss {{.*#+}} xmm1 = [1,1,1,1] +; AVX512-NEXT: vbroadcastss {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; AVX512-NEXT: vblendps {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3] ; AVX512-NEXT: vxorps %xmm2, %xmm2, %xmm2 ; AVX512-NEXT: vunpckhpd {{.*#+}} xmm0 = xmm0[1],xmm2[1] diff --git a/test/CodeGen/X86/subvector-broadcast.ll b/test/CodeGen/X86/subvector-broadcast.ll index 5e93944c7ac..a05288ac031 100644 --- a/test/CodeGen/X86/subvector-broadcast.ll +++ b/test/CodeGen/X86/subvector-broadcast.ll @@ -949,7 +949,7 @@ entry: define void @fallback_broadcast_v4f64_to_v8f64(<4 x double> %a, <8 x double> %b) { ; X32-AVX-LABEL: fallback_broadcast_v4f64_to_v8f64: ; X32-AVX: # %bb.0: # %entry -; X32-AVX-NEXT: vmovapd {{.*#+}} ymm3 = [1,2,3,4] +; X32-AVX-NEXT: vmovapd {{.*#+}} ymm3 = [1.0E+0,2.0E+0,3.0E+0,4.0E+0] ; X32-AVX-NEXT: vaddpd %ymm3, %ymm0, %ymm0 ; X32-AVX-NEXT: vaddpd %ymm3, %ymm2, %ymm2 ; X32-AVX-NEXT: vaddpd %ymm3, %ymm1, %ymm1 @@ -963,7 +963,7 @@ define void @fallback_broadcast_v4f64_to_v8f64(<4 x double> %a, <8 x double> %b) ; ; X32-AVX512-LABEL: fallback_broadcast_v4f64_to_v8f64: ; X32-AVX512: # %bb.0: # %entry -; X32-AVX512-NEXT: vmovapd {{.*#+}} ymm2 = [1,2,3,4] +; X32-AVX512-NEXT: vmovapd {{.*#+}} ymm2 = [1.0E+0,2.0E+0,3.0E+0,4.0E+0] ; X32-AVX512-NEXT: vaddpd %ymm2, %ymm0, %ymm0 ; X32-AVX512-NEXT: vinsertf64x4 $1, %ymm2, %zmm2, %zmm2 ; X32-AVX512-NEXT: vaddpd %zmm2, %zmm1, %zmm1 @@ -975,7 +975,7 @@ define void @fallback_broadcast_v4f64_to_v8f64(<4 x double> %a, <8 x double> %b) ; ; X64-AVX-LABEL: fallback_broadcast_v4f64_to_v8f64: ; X64-AVX: # %bb.0: # %entry -; X64-AVX-NEXT: vmovapd {{.*#+}} ymm3 = [1,2,3,4] +; X64-AVX-NEXT: vmovapd {{.*#+}} ymm3 = [1.0E+0,2.0E+0,3.0E+0,4.0E+0] ; X64-AVX-NEXT: vaddpd %ymm3, %ymm0, %ymm0 ; X64-AVX-NEXT: vaddpd %ymm3, %ymm2, %ymm2 ; X64-AVX-NEXT: vaddpd %ymm3, %ymm1, %ymm1 @@ -989,7 +989,7 @@ define void @fallback_broadcast_v4f64_to_v8f64(<4 x double> %a, <8 x double> %b) ; ; X64-AVX512-LABEL: fallback_broadcast_v4f64_to_v8f64: ; X64-AVX512: # %bb.0: # %entry -; X64-AVX512-NEXT: vmovapd {{.*#+}} ymm2 = [1,2,3,4] +; X64-AVX512-NEXT: vmovapd {{.*#+}} ymm2 = [1.0E+0,2.0E+0,3.0E+0,4.0E+0] ; X64-AVX512-NEXT: vaddpd %ymm2, %ymm0, %ymm0 ; X64-AVX512-NEXT: vinsertf64x4 $1, %ymm2, %zmm2, %zmm2 ; X64-AVX512-NEXT: vaddpd %zmm2, %zmm1, %zmm1 diff --git a/test/CodeGen/X86/v4f32-immediate.ll b/test/CodeGen/X86/v4f32-immediate.ll index a0eb4092599..690ef825f7a 100644 --- a/test/CodeGen/X86/v4f32-immediate.ll +++ b/test/CodeGen/X86/v4f32-immediate.ll @@ -5,12 +5,12 @@ define <4 x float> @foo() { ; X32-LABEL: foo: ; X32: # %bb.0: -; X32-NEXT: movaps {{.*#+}} xmm0 = [3.22354245,2.29999995,1.20000005,0.100000001] +; X32-NEXT: movaps {{.*#+}} xmm0 = [3.22354245E+0,2.29999995E+0,1.20000005E+0,1.00000001E-1] ; X32-NEXT: retl ; ; X64-LABEL: foo: ; X64: # %bb.0: -; X64-NEXT: movaps {{.*#+}} xmm0 = [3.22354245,2.29999995,1.20000005,0.100000001] +; X64-NEXT: movaps {{.*#+}} xmm0 = [3.22354245E+0,2.29999995E+0,1.20000005E+0,1.00000001E-1] ; X64-NEXT: retq ret <4 x float> } diff --git a/test/CodeGen/X86/vec_cast3.ll b/test/CodeGen/X86/vec_cast3.ll index b805b336106..e0cc4f3e396 100644 --- a/test/CodeGen/X86/vec_cast3.ll +++ b/test/CodeGen/X86/vec_cast3.ll @@ -90,7 +90,7 @@ define <2 x float> @cvt_v2u32_v2f32(<2 x i32> %src) { ; CHECK: ## %bb.0: ; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1 ; CHECK-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3] -; CHECK-NEXT: vmovaps {{.*#+}} xmm1 = [4503599627370496,4503599627370496] +; CHECK-NEXT: vmovaps {{.*#+}} xmm1 = [4.503599627370496E+15,4.503599627370496E+15] ; CHECK-NEXT: vorps %xmm1, %xmm0, %xmm0 ; CHECK-NEXT: vsubpd %xmm1, %xmm0, %xmm0 ; CHECK-NEXT: vcvtpd2ps %xmm0, %xmm0 @@ -99,7 +99,7 @@ define <2 x float> @cvt_v2u32_v2f32(<2 x i32> %src) { ; CHECK-WIDE-LABEL: cvt_v2u32_v2f32: ; CHECK-WIDE: ## %bb.0: ; CHECK-WIDE-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero -; CHECK-WIDE-NEXT: vmovdqa {{.*#+}} xmm1 = [4503599627370496,4503599627370496] +; CHECK-WIDE-NEXT: vmovdqa {{.*#+}} xmm1 = [4.503599627370496E+15,4.503599627370496E+15] ; CHECK-WIDE-NEXT: vpor %xmm1, %xmm0, %xmm0 ; CHECK-WIDE-NEXT: vsubpd %xmm1, %xmm0, %xmm0 ; CHECK-WIDE-NEXT: vcvtpd2ps %xmm0, %xmm0 diff --git a/test/CodeGen/X86/vec_floor.ll b/test/CodeGen/X86/vec_floor.ll index 3bbc468d07d..ef499af7540 100644 --- a/test/CodeGen/X86/vec_floor.ll +++ b/test/CodeGen/X86/vec_floor.ll @@ -703,17 +703,17 @@ declare <16 x float> @llvm.nearbyint.v16f32(<16 x float> %p) define <2 x double> @const_floor_v2f64() { ; SSE41-LABEL: const_floor_v2f64: ; SSE41: ## %bb.0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [-2,2] +; SSE41-NEXT: movaps {{.*#+}} xmm0 = [-2.0E+0,2.0E+0] ; SSE41-NEXT: retq ; ; AVX-LABEL: const_floor_v2f64: ; AVX: ## %bb.0: -; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [-2,2] +; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [-2.0E+0,2.0E+0] ; AVX-NEXT: retq ; ; AVX512-LABEL: const_floor_v2f64: ; AVX512: ## %bb.0: -; AVX512-NEXT: vmovaps {{.*#+}} xmm0 = [-2,2] +; AVX512-NEXT: vmovaps {{.*#+}} xmm0 = [-2.0E+0,2.0E+0] ; AVX512-NEXT: retq %t = call <2 x double> @llvm.floor.v2f64(<2 x double> ) ret <2 x double> %t @@ -722,17 +722,17 @@ define <2 x double> @const_floor_v2f64() { define <4 x float> @const_floor_v4f32() { ; SSE41-LABEL: const_floor_v4f32: ; SSE41: ## %bb.0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [-4,6,-9,2] +; SSE41-NEXT: movaps {{.*#+}} xmm0 = [-4.0E+0,6.0E+0,-9.0E+0,2.0E+0] ; SSE41-NEXT: retq ; ; AVX-LABEL: const_floor_v4f32: ; AVX: ## %bb.0: -; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [-4,6,-9,2] +; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [-4.0E+0,6.0E+0,-9.0E+0,2.0E+0] ; AVX-NEXT: retq ; ; AVX512-LABEL: const_floor_v4f32: ; AVX512: ## %bb.0: -; AVX512-NEXT: vmovaps {{.*#+}} xmm0 = [-4,6,-9,2] +; AVX512-NEXT: vmovaps {{.*#+}} xmm0 = [-4.0E+0,6.0E+0,-9.0E+0,2.0E+0] ; AVX512-NEXT: retq %t = call <4 x float> @llvm.floor.v4f32(<4 x float> ) ret <4 x float> %t @@ -741,17 +741,17 @@ define <4 x float> @const_floor_v4f32() { define <2 x double> @const_ceil_v2f64() { ; SSE41-LABEL: const_ceil_v2f64: ; SSE41: ## %bb.0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [-1,3] +; SSE41-NEXT: movaps {{.*#+}} xmm0 = [-1.0E+0,3.0E+0] ; SSE41-NEXT: retq ; ; AVX-LABEL: const_ceil_v2f64: ; AVX: ## %bb.0: -; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [-1,3] +; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [-1.0E+0,3.0E+0] ; AVX-NEXT: retq ; ; AVX512-LABEL: const_ceil_v2f64: ; AVX512: ## %bb.0: -; AVX512-NEXT: vmovaps {{.*#+}} xmm0 = [-1,3] +; AVX512-NEXT: vmovaps {{.*#+}} xmm0 = [-1.0E+0,3.0E+0] ; AVX512-NEXT: retq %t = call <2 x double> @llvm.ceil.v2f64(<2 x double> ) ret <2 x double> %t @@ -760,17 +760,17 @@ define <2 x double> @const_ceil_v2f64() { define <4 x float> @const_ceil_v4f32() { ; SSE41-LABEL: const_ceil_v4f32: ; SSE41: ## %bb.0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [-3,6,-9,3] +; SSE41-NEXT: movaps {{.*#+}} xmm0 = [-3.0E+0,6.0E+0,-9.0E+0,3.0E+0] ; SSE41-NEXT: retq ; ; AVX-LABEL: const_ceil_v4f32: ; AVX: ## %bb.0: -; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [-3,6,-9,3] +; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [-3.0E+0,6.0E+0,-9.0E+0,3.0E+0] ; AVX-NEXT: retq ; ; AVX512-LABEL: const_ceil_v4f32: ; AVX512: ## %bb.0: -; AVX512-NEXT: vmovaps {{.*#+}} xmm0 = [-3,6,-9,3] +; AVX512-NEXT: vmovaps {{.*#+}} xmm0 = [-3.0E+0,6.0E+0,-9.0E+0,3.0E+0] ; AVX512-NEXT: retq %t = call <4 x float> @llvm.ceil.v4f32(<4 x float> ) ret <4 x float> %t @@ -779,17 +779,17 @@ define <4 x float> @const_ceil_v4f32() { define <2 x double> @const_trunc_v2f64() { ; SSE41-LABEL: const_trunc_v2f64: ; SSE41: ## %bb.0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [-1,2] +; SSE41-NEXT: movaps {{.*#+}} xmm0 = [-1.0E+0,2.0E+0] ; SSE41-NEXT: retq ; ; AVX-LABEL: const_trunc_v2f64: ; AVX: ## %bb.0: -; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [-1,2] +; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [-1.0E+0,2.0E+0] ; AVX-NEXT: retq ; ; AVX512-LABEL: const_trunc_v2f64: ; AVX512: ## %bb.0: -; AVX512-NEXT: vmovaps {{.*#+}} xmm0 = [-1,2] +; AVX512-NEXT: vmovaps {{.*#+}} xmm0 = [-1.0E+0,2.0E+0] ; AVX512-NEXT: retq %t = call <2 x double> @llvm.trunc.v2f64(<2 x double> ) ret <2 x double> %t @@ -798,17 +798,17 @@ define <2 x double> @const_trunc_v2f64() { define <4 x float> @const_trunc_v4f32() { ; SSE41-LABEL: const_trunc_v4f32: ; SSE41: ## %bb.0: -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [-3,6,-9,2] +; SSE41-NEXT: movaps {{.*#+}} xmm0 = [-3.0E+0,6.0E+0,-9.0E+0,2.0E+0] ; SSE41-NEXT: retq ; ; AVX-LABEL: const_trunc_v4f32: ; AVX: ## %bb.0: -; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [-3,6,-9,2] +; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [-3.0E+0,6.0E+0,-9.0E+0,2.0E+0] ; AVX-NEXT: retq ; ; AVX512-LABEL: const_trunc_v4f32: ; AVX512: ## %bb.0: -; AVX512-NEXT: vmovaps {{.*#+}} xmm0 = [-3,6,-9,2] +; AVX512-NEXT: vmovaps {{.*#+}} xmm0 = [-3.0E+0,6.0E+0,-9.0E+0,2.0E+0] ; AVX512-NEXT: retq %t = call <4 x float> @llvm.trunc.v4f32(<4 x float> ) ret <4 x float> %t diff --git a/test/CodeGen/X86/vec_fp_to_int.ll b/test/CodeGen/X86/vec_fp_to_int.ll index 84a4385f2c9..e80abc91cd1 100644 --- a/test/CodeGen/X86/vec_fp_to_int.ll +++ b/test/CodeGen/X86/vec_fp_to_int.ll @@ -630,7 +630,7 @@ define <4 x i32> @fptoui_4f64_to_2i32(<2 x double> %a) { ; AVX1-LABEL: fptoui_4f64_to_2i32: ; AVX1: # %bb.0: ; AVX1-NEXT: vmovapd %xmm0, %xmm0 -; AVX1-NEXT: vmovapd {{.*#+}} ymm1 = [2147483648,2147483648,2147483648,2147483648] +; AVX1-NEXT: vmovapd {{.*#+}} ymm1 = [2.147483648E+9,2.147483648E+9,2.147483648E+9,2.147483648E+9] ; AVX1-NEXT: vcmpltpd %ymm1, %ymm0, %ymm2 ; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3 ; AVX1-NEXT: vpackssdw %xmm3, %xmm2, %xmm2 @@ -645,7 +645,7 @@ define <4 x i32> @fptoui_4f64_to_2i32(<2 x double> %a) { ; AVX2-LABEL: fptoui_4f64_to_2i32: ; AVX2: # %bb.0: ; AVX2-NEXT: vmovapd %xmm0, %xmm0 -; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm1 = [2147483648,2147483648,2147483648,2147483648] +; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm1 = [2.147483648E+9,2.147483648E+9,2.147483648E+9,2.147483648E+9] ; AVX2-NEXT: vcmpltpd %ymm1, %ymm0, %ymm2 ; AVX2-NEXT: vextractf128 $1, %ymm2, %xmm3 ; AVX2-NEXT: vpackssdw %xmm3, %xmm2, %xmm2 @@ -952,7 +952,7 @@ define <4 x i32> @fptoui_4f64_to_4i32(<4 x double> %a) { ; ; AVX1-LABEL: fptoui_4f64_to_4i32: ; AVX1: # %bb.0: -; AVX1-NEXT: vmovapd {{.*#+}} ymm1 = [2147483648,2147483648,2147483648,2147483648] +; AVX1-NEXT: vmovapd {{.*#+}} ymm1 = [2.147483648E+9,2.147483648E+9,2.147483648E+9,2.147483648E+9] ; AVX1-NEXT: vcmpltpd %ymm1, %ymm0, %ymm2 ; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3 ; AVX1-NEXT: vpackssdw %xmm3, %xmm2, %xmm2 @@ -966,7 +966,7 @@ define <4 x i32> @fptoui_4f64_to_4i32(<4 x double> %a) { ; ; AVX2-LABEL: fptoui_4f64_to_4i32: ; AVX2: # %bb.0: -; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm1 = [2147483648,2147483648,2147483648,2147483648] +; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm1 = [2.147483648E+9,2.147483648E+9,2.147483648E+9,2.147483648E+9] ; AVX2-NEXT: vcmpltpd %ymm1, %ymm0, %ymm2 ; AVX2-NEXT: vextractf128 $1, %ymm2, %xmm3 ; AVX2-NEXT: vpackssdw %xmm3, %xmm2, %xmm2 diff --git a/test/CodeGen/X86/vec_fpext.ll b/test/CodeGen/X86/vec_fpext.ll index 7bc05fb39f0..b66d5d1bfff 100644 --- a/test/CodeGen/X86/vec_fpext.ll +++ b/test/CodeGen/X86/vec_fpext.ll @@ -253,42 +253,42 @@ entry: define <2 x double> @fpext_fromconst() { ; X32-SSE-LABEL: fpext_fromconst: ; X32-SSE: # %bb.0: # %entry -; X32-SSE-NEXT: movaps {{.*#+}} xmm0 = [1,-2] +; X32-SSE-NEXT: movaps {{.*#+}} xmm0 = [1.0E+0,-2.0E+0] ; X32-SSE-NEXT: # encoding: [0x0f,0x28,0x05,A,A,A,A] ; X32-SSE-NEXT: # fixup A - offset: 3, value: {{\.LCPI.*}}, kind: FK_Data_4 ; X32-SSE-NEXT: retl # encoding: [0xc3] ; ; X32-AVX-LABEL: fpext_fromconst: ; X32-AVX: # %bb.0: # %entry -; X32-AVX-NEXT: vmovaps {{.*#+}} xmm0 = [1,-2] +; X32-AVX-NEXT: vmovaps {{.*#+}} xmm0 = [1.0E+0,-2.0E+0] ; X32-AVX-NEXT: # encoding: [0xc5,0xf8,0x28,0x05,A,A,A,A] ; X32-AVX-NEXT: # fixup A - offset: 4, value: {{\.LCPI.*}}, kind: FK_Data_4 ; X32-AVX-NEXT: retl # encoding: [0xc3] ; ; X32-AVX512VL-LABEL: fpext_fromconst: ; X32-AVX512VL: # %bb.0: # %entry -; X32-AVX512VL-NEXT: vmovaps {{\.LCPI.*}}, %xmm0 # EVEX TO VEX Compression xmm0 = [1,-2] +; X32-AVX512VL-NEXT: vmovaps {{\.LCPI.*}}, %xmm0 # EVEX TO VEX Compression xmm0 = [1.0E+0,-2.0E+0] ; X32-AVX512VL-NEXT: # encoding: [0xc5,0xf8,0x28,0x05,A,A,A,A] ; X32-AVX512VL-NEXT: # fixup A - offset: 4, value: {{\.LCPI.*}}, kind: FK_Data_4 ; X32-AVX512VL-NEXT: retl # encoding: [0xc3] ; ; X64-SSE-LABEL: fpext_fromconst: ; X64-SSE: # %bb.0: # %entry -; X64-SSE-NEXT: movaps {{.*#+}} xmm0 = [1,-2] +; X64-SSE-NEXT: movaps {{.*#+}} xmm0 = [1.0E+0,-2.0E+0] ; X64-SSE-NEXT: # encoding: [0x0f,0x28,0x05,A,A,A,A] ; X64-SSE-NEXT: # fixup A - offset: 3, value: {{\.LCPI.*}}-4, kind: reloc_riprel_4byte ; X64-SSE-NEXT: retq # encoding: [0xc3] ; ; X64-AVX-LABEL: fpext_fromconst: ; X64-AVX: # %bb.0: # %entry -; X64-AVX-NEXT: vmovaps {{.*#+}} xmm0 = [1,-2] +; X64-AVX-NEXT: vmovaps {{.*#+}} xmm0 = [1.0E+0,-2.0E+0] ; X64-AVX-NEXT: # encoding: [0xc5,0xf8,0x28,0x05,A,A,A,A] ; X64-AVX-NEXT: # fixup A - offset: 4, value: {{\.LCPI.*}}-4, kind: reloc_riprel_4byte ; X64-AVX-NEXT: retq # encoding: [0xc3] ; ; X64-AVX512VL-LABEL: fpext_fromconst: ; X64-AVX512VL: # %bb.0: # %entry -; X64-AVX512VL-NEXT: vmovaps {{.*}}(%rip), %xmm0 # EVEX TO VEX Compression xmm0 = [1,-2] +; X64-AVX512VL-NEXT: vmovaps {{.*}}(%rip), %xmm0 # EVEX TO VEX Compression xmm0 = [1.0E+0,-2.0E+0] ; X64-AVX512VL-NEXT: # encoding: [0xc5,0xf8,0x28,0x05,A,A,A,A] ; X64-AVX512VL-NEXT: # fixup A - offset: 4, value: {{\.LCPI.*}}-4, kind: reloc_riprel_4byte ; X64-AVX512VL-NEXT: retq # encoding: [0xc3] diff --git a/test/CodeGen/X86/vec_int_to_fp.ll b/test/CodeGen/X86/vec_int_to_fp.ll index 14cce63ca96..af68937326c 100644 --- a/test/CodeGen/X86/vec_int_to_fp.ll +++ b/test/CodeGen/X86/vec_int_to_fp.ll @@ -680,7 +680,7 @@ define <2 x double> @uitofp_4i32_to_2f64(<4 x i32> %a) { ; AVX2: # %bb.0: ; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1 ; AVX2-NEXT: vcvtdq2pd %xmm1, %ymm1 -; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm2 = [65536,65536,65536,65536] +; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm2 = [6.5536E+4,6.5536E+4,6.5536E+4,6.5536E+4] ; AVX2-NEXT: vmulpd %ymm2, %ymm1, %ymm1 ; AVX2-NEXT: vxorpd %xmm2, %xmm2, %xmm2 ; AVX2-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3],xmm0[4],xmm2[5],xmm0[6],xmm2[7] @@ -954,7 +954,7 @@ define <4 x double> @uitofp_4i32_to_4f64(<4 x i32> %a) { ; SSE2-NEXT: movdqa %xmm0, %xmm1 ; SSE2-NEXT: psrld $16, %xmm1 ; SSE2-NEXT: cvtdq2pd %xmm1, %xmm1 -; SSE2-NEXT: movapd {{.*#+}} xmm2 = [65536,65536] +; SSE2-NEXT: movapd {{.*#+}} xmm2 = [6.5536E+4,6.5536E+4] ; SSE2-NEXT: mulpd %xmm2, %xmm1 ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,0,1] ; SSE2-NEXT: pand {{.*}}(%rip), %xmm0 @@ -974,7 +974,7 @@ define <4 x double> @uitofp_4i32_to_4f64(<4 x i32> %a) { ; SSE41-NEXT: movdqa %xmm0, %xmm1 ; SSE41-NEXT: psrld $16, %xmm1 ; SSE41-NEXT: cvtdq2pd %xmm1, %xmm1 -; SSE41-NEXT: movapd {{.*#+}} xmm2 = [65536,65536] +; SSE41-NEXT: movapd {{.*#+}} xmm2 = [6.5536E+4,6.5536E+4] ; SSE41-NEXT: mulpd %xmm2, %xmm1 ; SSE41-NEXT: pxor %xmm3, %xmm3 ; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm0[2,3,0,1] @@ -1004,7 +1004,7 @@ define <4 x double> @uitofp_4i32_to_4f64(<4 x i32> %a) { ; AVX2: # %bb.0: ; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1 ; AVX2-NEXT: vcvtdq2pd %xmm1, %ymm1 -; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm2 = [65536,65536,65536,65536] +; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm2 = [6.5536E+4,6.5536E+4,6.5536E+4,6.5536E+4] ; AVX2-NEXT: vmulpd %ymm2, %ymm1, %ymm1 ; AVX2-NEXT: vxorpd %xmm2, %xmm2, %xmm2 ; AVX2-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3],xmm0[4],xmm2[5],xmm0[6],xmm2[7] @@ -3777,7 +3777,7 @@ define <4 x double> @uitofp_load_4i32_to_4f64(<4 x i32> *%a) { ; SSE2-NEXT: movdqa %xmm0, %xmm1 ; SSE2-NEXT: psrld $16, %xmm1 ; SSE2-NEXT: cvtdq2pd %xmm1, %xmm1 -; SSE2-NEXT: movapd {{.*#+}} xmm2 = [65536,65536] +; SSE2-NEXT: movapd {{.*#+}} xmm2 = [6.5536E+4,6.5536E+4] ; SSE2-NEXT: mulpd %xmm2, %xmm1 ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,0,1] ; SSE2-NEXT: pand {{.*}}(%rip), %xmm0 @@ -3798,7 +3798,7 @@ define <4 x double> @uitofp_load_4i32_to_4f64(<4 x i32> *%a) { ; SSE41-NEXT: movdqa %xmm0, %xmm1 ; SSE41-NEXT: psrld $16, %xmm1 ; SSE41-NEXT: cvtdq2pd %xmm1, %xmm1 -; SSE41-NEXT: movapd {{.*#+}} xmm2 = [65536,65536] +; SSE41-NEXT: movapd {{.*#+}} xmm2 = [6.5536E+4,6.5536E+4] ; SSE41-NEXT: mulpd %xmm2, %xmm1 ; SSE41-NEXT: pxor %xmm3, %xmm3 ; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm0[2,3,0,1] @@ -3830,7 +3830,7 @@ define <4 x double> @uitofp_load_4i32_to_4f64(<4 x i32> *%a) { ; AVX2-NEXT: vmovdqa (%rdi), %xmm0 ; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1 ; AVX2-NEXT: vcvtdq2pd %xmm1, %ymm1 -; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm2 = [65536,65536,65536,65536] +; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm2 = [6.5536E+4,6.5536E+4,6.5536E+4,6.5536E+4] ; AVX2-NEXT: vmulpd %ymm2, %ymm1, %ymm1 ; AVX2-NEXT: vxorpd %xmm2, %xmm2, %xmm2 ; AVX2-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3],xmm0[4],xmm2[5],xmm0[6],xmm2[7] diff --git a/test/CodeGen/X86/vec_ss_load_fold.ll b/test/CodeGen/X86/vec_ss_load_fold.ll index 6b3f7acac90..1f5503067c6 100644 --- a/test/CodeGen/X86/vec_ss_load_fold.ll +++ b/test/CodeGen/X86/vec_ss_load_fold.ll @@ -247,22 +247,22 @@ define <4 x float> @test4(<4 x float> %A, float *%b, i32 %C) nounwind { define <2 x double> @test5() nounwind uwtable readnone noinline { ; X32-LABEL: test5: ; X32: ## %bb.0: ## %entry -; X32-NEXT: movaps {{.*#+}} xmm0 = [128,123.321] +; X32-NEXT: movaps {{.*#+}} xmm0 = [1.28E+2,1.23321E+2] ; X32-NEXT: retl ; ; X64-LABEL: test5: ; X64: ## %bb.0: ## %entry -; X64-NEXT: movaps {{.*#+}} xmm0 = [128,123.321] +; X64-NEXT: movaps {{.*#+}} xmm0 = [1.28E+2,1.23321E+2] ; X64-NEXT: retq ; ; X32_AVX-LABEL: test5: ; X32_AVX: ## %bb.0: ## %entry -; X32_AVX-NEXT: vmovaps {{.*#+}} xmm0 = [128,123.321] +; X32_AVX-NEXT: vmovaps {{.*#+}} xmm0 = [1.28E+2,1.23321E+2] ; X32_AVX-NEXT: retl ; ; X64_AVX-LABEL: test5: ; X64_AVX: ## %bb.0: ## %entry -; X64_AVX-NEXT: vmovaps {{.*#+}} xmm0 = [128,123.321] +; X64_AVX-NEXT: vmovaps {{.*#+}} xmm0 = [1.28E+2,1.23321E+2] ; X64_AVX-NEXT: retq entry: %0 = tail call <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double> , i32 128) nounwind readnone diff --git a/test/CodeGen/X86/vec_uint_to_fp-fastmath.ll b/test/CodeGen/X86/vec_uint_to_fp-fastmath.ll index 8abd26805e6..5f4489c5ed2 100644 --- a/test/CodeGen/X86/vec_uint_to_fp-fastmath.ll +++ b/test/CodeGen/X86/vec_uint_to_fp-fastmath.ll @@ -109,7 +109,7 @@ define <8 x float> @test_uitofp_v8i32_to_v8f32(<8 x i32> %arg) { ; SSE2-NEXT: movdqa %xmm0, %xmm2 ; SSE2-NEXT: psrld $16, %xmm2 ; SSE2-NEXT: cvtdq2ps %xmm2, %xmm2 -; SSE2-NEXT: movaps {{.*#+}} xmm3 = [65536,65536,65536,65536] +; SSE2-NEXT: movaps {{.*#+}} xmm3 = [6.5536E+4,6.5536E+4,6.5536E+4,6.5536E+4] ; SSE2-NEXT: mulps %xmm3, %xmm2 ; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [65535,65535,65535,65535] ; SSE2-NEXT: pand %xmm4, %xmm0 @@ -129,7 +129,7 @@ define <8 x float> @test_uitofp_v8i32_to_v8f32(<8 x i32> %arg) { ; SSE41-NEXT: movdqa %xmm0, %xmm2 ; SSE41-NEXT: psrld $16, %xmm2 ; SSE41-NEXT: cvtdq2ps %xmm2, %xmm2 -; SSE41-NEXT: movaps {{.*#+}} xmm3 = [65536,65536,65536,65536] +; SSE41-NEXT: movaps {{.*#+}} xmm3 = [6.5536E+4,6.5536E+4,6.5536E+4,6.5536E+4] ; SSE41-NEXT: mulps %xmm3, %xmm2 ; SSE41-NEXT: pxor %xmm4, %xmm4 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1],xmm0[2],xmm4[3],xmm0[4],xmm4[5],xmm0[6],xmm4[7] diff --git a/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll b/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll index f13178ed5ce..44c19483154 100644 --- a/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll +++ b/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll @@ -26,13 +26,13 @@ entry: define <2 x double> @constrained_vector_fdiv_v2f64() { ; NO-FMA-LABEL: constrained_vector_fdiv_v2f64: ; NO-FMA: # %bb.0: # %entry -; NO-FMA-NEXT: movapd {{.*#+}} xmm0 = [1,2] +; NO-FMA-NEXT: movapd {{.*#+}} xmm0 = [1.0E+0,2.0E+0] ; NO-FMA-NEXT: divpd {{.*}}(%rip), %xmm0 ; NO-FMA-NEXT: retq ; ; HAS-FMA-LABEL: constrained_vector_fdiv_v2f64: ; HAS-FMA: # %bb.0: # %entry -; HAS-FMA-NEXT: vmovapd {{.*#+}} xmm0 = [1,2] +; HAS-FMA-NEXT: vmovapd {{.*#+}} xmm0 = [1.0E+0,2.0E+0] ; HAS-FMA-NEXT: vdivpd {{.*}}(%rip), %xmm0, %xmm0 ; HAS-FMA-NEXT: retq entry: @@ -82,7 +82,7 @@ entry: define <3 x double> @constrained_vector_fdiv_v3f64() { ; NO-FMA-LABEL: constrained_vector_fdiv_v3f64: ; NO-FMA: # %bb.0: # %entry -; NO-FMA-NEXT: movapd {{.*#+}} xmm0 = [1,2] +; NO-FMA-NEXT: movapd {{.*#+}} xmm0 = [1.0E+0,2.0E+0] ; NO-FMA-NEXT: divpd {{.*}}(%rip), %xmm0 ; NO-FMA-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; NO-FMA-NEXT: divsd {{.*}}(%rip), %xmm1 @@ -96,7 +96,7 @@ define <3 x double> @constrained_vector_fdiv_v3f64() { ; HAS-FMA: # %bb.0: # %entry ; HAS-FMA-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero ; HAS-FMA-NEXT: vdivsd {{.*}}(%rip), %xmm0, %xmm0 -; HAS-FMA-NEXT: vmovapd {{.*#+}} xmm1 = [1,2] +; HAS-FMA-NEXT: vmovapd {{.*#+}} xmm1 = [1.0E+0,2.0E+0] ; HAS-FMA-NEXT: vdivpd {{.*}}(%rip), %xmm1, %xmm1 ; HAS-FMA-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; HAS-FMA-NEXT: retq @@ -112,16 +112,16 @@ entry: define <4 x double> @constrained_vector_fdiv_v4f64() { ; NO-FMA-LABEL: constrained_vector_fdiv_v4f64: ; NO-FMA: # %bb.0: # %entry -; NO-FMA-NEXT: movapd {{.*#+}} xmm2 = [10,10] -; NO-FMA-NEXT: movapd {{.*#+}} xmm0 = [1,2] +; NO-FMA-NEXT: movapd {{.*#+}} xmm2 = [1.0E+1,1.0E+1] +; NO-FMA-NEXT: movapd {{.*#+}} xmm0 = [1.0E+0,2.0E+0] ; NO-FMA-NEXT: divpd %xmm2, %xmm0 -; NO-FMA-NEXT: movapd {{.*#+}} xmm1 = [3,4] +; NO-FMA-NEXT: movapd {{.*#+}} xmm1 = [3.0E+0,4.0E+0] ; NO-FMA-NEXT: divpd %xmm2, %xmm1 ; NO-FMA-NEXT: retq ; ; HAS-FMA-LABEL: constrained_vector_fdiv_v4f64: ; HAS-FMA: # %bb.0: # %entry -; HAS-FMA-NEXT: vmovapd {{.*#+}} ymm0 = [1,2,3,4] +; HAS-FMA-NEXT: vmovapd {{.*#+}} ymm0 = [1.0E+0,2.0E+0,3.0E+0,4.0E+0] ; HAS-FMA-NEXT: vdivpd {{.*}}(%rip), %ymm0, %ymm0 ; HAS-FMA-NEXT: retq entry: @@ -499,7 +499,7 @@ define <4 x double> @constrained_vector_fmul_v4f64() { ; NO-FMA-LABEL: constrained_vector_fmul_v4f64: ; NO-FMA: # %bb.0: # %entry ; NO-FMA-NEXT: movapd {{.*#+}} xmm1 = [1.7976931348623157E+308,1.7976931348623157E+308] -; NO-FMA-NEXT: movapd {{.*#+}} xmm0 = [2,3] +; NO-FMA-NEXT: movapd {{.*#+}} xmm0 = [2.0E+0,3.0E+0] ; NO-FMA-NEXT: mulpd %xmm1, %xmm0 ; NO-FMA-NEXT: mulpd {{.*}}(%rip), %xmm1 ; NO-FMA-NEXT: retq @@ -630,7 +630,7 @@ define <4 x double> @constrained_vector_fadd_v4f64() { ; NO-FMA-LABEL: constrained_vector_fadd_v4f64: ; NO-FMA: # %bb.0: # %entry ; NO-FMA-NEXT: movapd {{.*#+}} xmm1 = [1.7976931348623157E+308,1.7976931348623157E+308] -; NO-FMA-NEXT: movapd {{.*#+}} xmm0 = [1,0.10000000000000001] +; NO-FMA-NEXT: movapd {{.*#+}} xmm0 = [1.0E+0,1.0000000000000001E-1] ; NO-FMA-NEXT: addpd %xmm1, %xmm0 ; NO-FMA-NEXT: addpd {{.*}}(%rip), %xmm1 ; NO-FMA-NEXT: retq @@ -836,8 +836,8 @@ define <2 x double> @constrained_vector_fma_v2f64() { ; ; HAS-FMA-LABEL: constrained_vector_fma_v2f64: ; HAS-FMA: # %bb.0: # %entry -; HAS-FMA-NEXT: vmovapd {{.*#+}} xmm1 = [1.5,0.5] -; HAS-FMA-NEXT: vmovapd {{.*#+}} xmm0 = [3.5,2.5] +; HAS-FMA-NEXT: vmovapd {{.*#+}} xmm1 = [1.5E+0,5.0E-1] +; HAS-FMA-NEXT: vmovapd {{.*#+}} xmm0 = [3.5E+0,2.5E+0] ; HAS-FMA-NEXT: vfmadd213pd {{.*#+}} xmm0 = (xmm1 * xmm0) + mem ; HAS-FMA-NEXT: retq entry: @@ -936,8 +936,8 @@ define <3 x double> @constrained_vector_fma_v3f64() { ; HAS-FMA-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero ; HAS-FMA-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero ; HAS-FMA-NEXT: vfmadd213sd {{.*#+}} xmm1 = (xmm0 * xmm1) + mem -; HAS-FMA-NEXT: vmovapd {{.*#+}} xmm0 = [2.5,1.5] -; HAS-FMA-NEXT: vmovapd {{.*#+}} xmm2 = [5.5,4.5] +; HAS-FMA-NEXT: vmovapd {{.*#+}} xmm0 = [2.5E+0,1.5E+0] +; HAS-FMA-NEXT: vmovapd {{.*#+}} xmm2 = [5.5E+0,4.5E+0] ; HAS-FMA-NEXT: vfmadd213pd {{.*#+}} xmm2 = (xmm0 * xmm2) + mem ; HAS-FMA-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm0 ; HAS-FMA-NEXT: retq @@ -987,8 +987,8 @@ define <4 x double> @constrained_vector_fma_v4f64() { ; ; HAS-FMA-LABEL: constrained_vector_fma_v4f64: ; HAS-FMA: # %bb.0: # %entry -; HAS-FMA-NEXT: vmovapd {{.*#+}} ymm1 = [3.5,2.5,1.5,0.5] -; HAS-FMA-NEXT: vmovapd {{.*#+}} ymm0 = [7.5,6.5,5.5,4.5] +; HAS-FMA-NEXT: vmovapd {{.*#+}} ymm1 = [3.5E+0,2.5E+0,1.5E+0,5.0E-1] +; HAS-FMA-NEXT: vmovapd {{.*#+}} ymm0 = [7.5E+0,6.5E+0,5.5E+0,4.5E+0] ; HAS-FMA-NEXT: vfmadd213pd {{.*#+}} ymm0 = (ymm1 * ymm0) + mem ; HAS-FMA-NEXT: retq entry: @@ -1037,8 +1037,8 @@ define <4 x float> @constrained_vector_fma_v4f32() { ; ; HAS-FMA-LABEL: constrained_vector_fma_v4f32: ; HAS-FMA: # %bb.0: # %entry -; HAS-FMA-NEXT: vmovaps {{.*#+}} xmm1 = [3.5,2.5,1.5,0.5] -; HAS-FMA-NEXT: vmovaps {{.*#+}} xmm0 = [7.5,6.5,5.5,4.5] +; HAS-FMA-NEXT: vmovaps {{.*#+}} xmm1 = [3.5E+0,2.5E+0,1.5E+0,5.0E-1] +; HAS-FMA-NEXT: vmovaps {{.*#+}} xmm0 = [7.5E+0,6.5E+0,5.5E+0,4.5E+0] ; HAS-FMA-NEXT: vfmadd213ps {{.*#+}} xmm0 = (xmm1 * xmm0) + mem ; HAS-FMA-NEXT: retq entry: @@ -1115,8 +1115,8 @@ define <8 x float> @constrained_vector_fma_v8f32() { ; ; HAS-FMA-LABEL: constrained_vector_fma_v8f32: ; HAS-FMA: # %bb.0: # %entry -; HAS-FMA-NEXT: vmovaps {{.*#+}} ymm1 = [3.5,2.5,1.5,0.5,7.5,6.5,5.5,4.5] -; HAS-FMA-NEXT: vmovaps {{.*#+}} ymm0 = [7.5,6.5,5.5,4.5,11.5,10.5,9.5,8.5] +; HAS-FMA-NEXT: vmovaps {{.*#+}} ymm1 = [3.5E+0,2.5E+0,1.5E+0,5.0E-1,7.5E+0,6.5E+0,5.5E+0,4.5E+0] +; HAS-FMA-NEXT: vmovaps {{.*#+}} ymm0 = [7.5E+0,6.5E+0,5.5E+0,4.5E+0,1.15E+1,1.05E+1,9.5E+0,8.5E+0] ; HAS-FMA-NEXT: vfmadd213ps {{.*#+}} ymm0 = (ymm1 * ymm0) + mem ; HAS-FMA-NEXT: retq entry: diff --git a/test/CodeGen/X86/vector-shuffle-combining-avx.ll b/test/CodeGen/X86/vector-shuffle-combining-avx.ll index af3ef0894ac..ace577ce9a3 100644 --- a/test/CodeGen/X86/vector-shuffle-combining-avx.ll +++ b/test/CodeGen/X86/vector-shuffle-combining-avx.ll @@ -383,12 +383,12 @@ define <4 x float> @combine_vpermilvar_4f32_as_insertps(<4 x float> %a0) { define <2 x double> @constant_fold_vpermilvar_pd() { ; X32-LABEL: constant_fold_vpermilvar_pd: ; X32: # %bb.0: -; X32-NEXT: vmovaps {{.*#+}} xmm0 = [2,1] +; X32-NEXT: vmovaps {{.*#+}} xmm0 = [2.0E+0,1.0E+0] ; X32-NEXT: retl ; ; X64-LABEL: constant_fold_vpermilvar_pd: ; X64: # %bb.0: -; X64-NEXT: vmovaps {{.*#+}} xmm0 = [2,1] +; X64-NEXT: vmovaps {{.*#+}} xmm0 = [2.0E+0,1.0E+0] ; X64-NEXT: retq %1 = call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double> , <2 x i64> ) ret <2 x double> %1 @@ -397,12 +397,12 @@ define <2 x double> @constant_fold_vpermilvar_pd() { define <4 x double> @constant_fold_vpermilvar_pd_256() { ; X32-LABEL: constant_fold_vpermilvar_pd_256: ; X32: # %bb.0: -; X32-NEXT: vmovaps {{.*#+}} ymm0 = [2,1,3,4] +; X32-NEXT: vmovaps {{.*#+}} ymm0 = [2.0E+0,1.0E+0,3.0E+0,4.0E+0] ; X32-NEXT: retl ; ; X64-LABEL: constant_fold_vpermilvar_pd_256: ; X64: # %bb.0: -; X64-NEXT: vmovaps {{.*#+}} ymm0 = [2,1,3,4] +; X64-NEXT: vmovaps {{.*#+}} ymm0 = [2.0E+0,1.0E+0,3.0E+0,4.0E+0] ; X64-NEXT: retq %1 = call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> , <4 x i64> ) ret <4 x double> %1 @@ -411,12 +411,12 @@ define <4 x double> @constant_fold_vpermilvar_pd_256() { define <4 x float> @constant_fold_vpermilvar_ps() { ; X32-LABEL: constant_fold_vpermilvar_ps: ; X32: # %bb.0: -; X32-NEXT: vmovaps {{.*#+}} xmm0 = [4,1,3,2] +; X32-NEXT: vmovaps {{.*#+}} xmm0 = [4.0E+0,1.0E+0,3.0E+0,2.0E+0] ; X32-NEXT: retl ; ; X64-LABEL: constant_fold_vpermilvar_ps: ; X64: # %bb.0: -; X64-NEXT: vmovaps {{.*#+}} xmm0 = [4,1,3,2] +; X64-NEXT: vmovaps {{.*#+}} xmm0 = [4.0E+0,1.0E+0,3.0E+0,2.0E+0] ; X64-NEXT: retq %1 = call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> , <4 x i32> ) ret <4 x float> %1 @@ -425,12 +425,12 @@ define <4 x float> @constant_fold_vpermilvar_ps() { define <8 x float> @constant_fold_vpermilvar_ps_256() { ; X32-LABEL: constant_fold_vpermilvar_ps_256: ; X32: # %bb.0: -; X32-NEXT: vmovaps {{.*#+}} ymm0 = [1,1,3,2,5,6,6,6] +; X32-NEXT: vmovaps {{.*#+}} ymm0 = [1.0E+0,1.0E+0,3.0E+0,2.0E+0,5.0E+0,6.0E+0,6.0E+0,6.0E+0] ; X32-NEXT: retl ; ; X64-LABEL: constant_fold_vpermilvar_ps_256: ; X64: # %bb.0: -; X64-NEXT: vmovaps {{.*#+}} ymm0 = [1,1,3,2,5,6,6,6] +; X64-NEXT: vmovaps {{.*#+}} ymm0 = [1.0E+0,1.0E+0,3.0E+0,2.0E+0,5.0E+0,6.0E+0,6.0E+0,6.0E+0] ; X64-NEXT: retq %1 = call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> , <8 x i32> ) ret <8 x float> %1 diff --git a/test/CodeGen/X86/vector-shuffle-combining-avx2.ll b/test/CodeGen/X86/vector-shuffle-combining-avx2.ll index ae2a5513bfd..95d53ace5d3 100644 --- a/test/CodeGen/X86/vector-shuffle-combining-avx2.ll +++ b/test/CodeGen/X86/vector-shuffle-combining-avx2.ll @@ -691,7 +691,7 @@ define <8 x i32> @constant_fold_permd() { define <8 x float> @constant_fold_permps() { ; CHECK-LABEL: constant_fold_permps: ; CHECK: # %bb.0: -; CHECK-NEXT: vmovaps {{.*#+}} ymm0 = [5,7,3,2,8,2,6,1] +; CHECK-NEXT: vmovaps {{.*#+}} ymm0 = [5.0E+0,7.0E+0,3.0E+0,2.0E+0,8.0E+0,2.0E+0,6.0E+0,1.0E+0] ; CHECK-NEXT: ret{{[l|q]}} %1 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> , <8 x i32> ) ret <8 x float> %1 diff --git a/test/CodeGen/X86/vector-shuffle-combining-xop.ll b/test/CodeGen/X86/vector-shuffle-combining-xop.ll index 52b5edd7abe..5fe0a2b460b 100644 --- a/test/CodeGen/X86/vector-shuffle-combining-xop.ll +++ b/test/CodeGen/X86/vector-shuffle-combining-xop.ll @@ -384,12 +384,12 @@ define void @buildvector_v4f32_07z6(float %a, <4 x float> %b, <4 x float>* %ptr) define <2 x double> @constant_fold_vpermil2pd() { ; X32-LABEL: constant_fold_vpermil2pd: ; X32: # %bb.0: -; X32-NEXT: vmovaps {{.*#+}} xmm0 = [-2,2] +; X32-NEXT: vmovaps {{.*#+}} xmm0 = [-2.0E+0,2.0E+0] ; X32-NEXT: retl ; ; X64-LABEL: constant_fold_vpermil2pd: ; X64: # %bb.0: -; X64-NEXT: vmovaps {{.*#+}} xmm0 = [-2,2] +; X64-NEXT: vmovaps {{.*#+}} xmm0 = [-2.0E+0,2.0E+0] ; X64-NEXT: retq %1 = call <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double> , <2 x double> , <2 x i64> , i8 2) ret <2 x double> %1 @@ -398,12 +398,12 @@ define <2 x double> @constant_fold_vpermil2pd() { define <4 x double> @constant_fold_vpermil2pd_256() { ; X32-LABEL: constant_fold_vpermil2pd_256: ; X32: # %bb.0: -; X32-NEXT: vmovaps {{.*#+}} ymm0 = [-4,0,4,3] +; X32-NEXT: vmovaps {{.*#+}} ymm0 = [-4.0E+0,0.0E+0,4.0E+0,3.0E+0] ; X32-NEXT: retl ; ; X64-LABEL: constant_fold_vpermil2pd_256: ; X64: # %bb.0: -; X64-NEXT: vmovaps {{.*#+}} ymm0 = [-4,0,4,3] +; X64-NEXT: vmovaps {{.*#+}} ymm0 = [-4.0E+0,0.0E+0,4.0E+0,3.0E+0] ; X64-NEXT: retq %1 = call <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double> , <4 x double> , <4 x i64> , i8 2) ret <4 x double> %1 @@ -412,12 +412,12 @@ define <4 x double> @constant_fold_vpermil2pd_256() { define <4 x float> @constant_fold_vpermil2ps() { ; X32-LABEL: constant_fold_vpermil2ps: ; X32: # %bb.0: -; X32-NEXT: vmovaps {{.*#+}} xmm0 = [-4,1,3,0] +; X32-NEXT: vmovaps {{.*#+}} xmm0 = [-4.0E+0,1.0E+0,3.0E+0,0.0E+0] ; X32-NEXT: retl ; ; X64-LABEL: constant_fold_vpermil2ps: ; X64: # %bb.0: -; X64-NEXT: vmovaps {{.*#+}} xmm0 = [-4,1,3,0] +; X64-NEXT: vmovaps {{.*#+}} xmm0 = [-4.0E+0,1.0E+0,3.0E+0,0.0E+0] ; X64-NEXT: retq %1 = call <4 x float> @llvm.x86.xop.vpermil2ps(<4 x float> , <4 x float> , <4 x i32> , i8 2) ret <4 x float> %1 @@ -426,12 +426,12 @@ define <4 x float> @constant_fold_vpermil2ps() { define <8 x float> @constant_fold_vpermil2ps_256() { ; X32-LABEL: constant_fold_vpermil2ps_256: ; X32: # %bb.0: -; X32-NEXT: vmovaps {{.*#+}} ymm0 = [-8,1,3,0,5,0,5,7] +; X32-NEXT: vmovaps {{.*#+}} ymm0 = [-8.0E+0,1.0E+0,3.0E+0,0.0E+0,5.0E+0,0.0E+0,5.0E+0,7.0E+0] ; X32-NEXT: retl ; ; X64-LABEL: constant_fold_vpermil2ps_256: ; X64: # %bb.0: -; X64-NEXT: vmovaps {{.*#+}} ymm0 = [-8,1,3,0,5,0,5,7] +; X64-NEXT: vmovaps {{.*#+}} ymm0 = [-8.0E+0,1.0E+0,3.0E+0,0.0E+0,5.0E+0,0.0E+0,5.0E+0,7.0E+0] ; X64-NEXT: retq %1 = call <8 x float> @llvm.x86.xop.vpermil2ps.256(<8 x float> , <8 x float> , <8 x i32> , i8 2) ret <8 x float> %1 diff --git a/test/CodeGen/X86/vector-shuffle-combining.ll b/test/CodeGen/X86/vector-shuffle-combining.ll index 01e36681400..9c7163f39da 100644 --- a/test/CodeGen/X86/vector-shuffle-combining.ll +++ b/test/CodeGen/X86/vector-shuffle-combining.ll @@ -2642,14 +2642,14 @@ define void @combine_scalar_load_with_blend_with_zero(double* %a0, <4 x float>* define <4 x float> @combine_constant_insertion_v4f32(float %f) { ; SSE2-LABEL: combine_constant_insertion_v4f32: ; SSE2: # %bb.0: -; SSE2-NEXT: movaps {{.*#+}} xmm1 = +; SSE2-NEXT: movaps {{.*#+}} xmm1 = ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3] ; SSE2-NEXT: movaps %xmm1, %xmm0 ; SSE2-NEXT: retq ; ; SSSE3-LABEL: combine_constant_insertion_v4f32: ; SSSE3: # %bb.0: -; SSSE3-NEXT: movaps {{.*#+}} xmm1 = +; SSSE3-NEXT: movaps {{.*#+}} xmm1 = ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3] ; SSSE3-NEXT: movaps %xmm1, %xmm0 ; SSSE3-NEXT: retq @@ -2809,14 +2809,14 @@ define <4 x float> @PR30264(<4 x float> %x) { ; ; SSE41-LABEL: PR30264: ; SSE41: # %bb.0: -; SSE41-NEXT: movaps {{.*#+}} xmm1 = +; SSE41-NEXT: movaps {{.*#+}} xmm1 = ; SSE41-NEXT: insertps {{.*#+}} xmm1 = xmm0[0],zero,xmm1[2,3] ; SSE41-NEXT: movaps %xmm1, %xmm0 ; SSE41-NEXT: retq ; ; AVX-LABEL: PR30264: ; AVX: # %bb.0: -; AVX-NEXT: vmovaps {{.*#+}} xmm1 = +; AVX-NEXT: vmovaps {{.*#+}} xmm1 = ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],zero,xmm1[2,3] ; AVX-NEXT: retq %shuf1 = shufflevector <4 x float> %x, <4 x float> , <4 x i32> diff --git a/test/CodeGen/X86/vselect-avx.ll b/test/CodeGen/X86/vselect-avx.ll index e27493e9758..145da66558f 100644 --- a/test/CodeGen/X86/vselect-avx.ll +++ b/test/CodeGen/X86/vselect-avx.ll @@ -46,7 +46,7 @@ define void @test2(double** %call1559, i64 %indvars.iv4198, <4 x i1> %tmp1895) { ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX1-NEXT: movq (%rdi,%rsi,8), %rax -; AVX1-NEXT: vmovapd {{.*#+}} ymm1 = [0.5,0.5,0.5,0.5] +; AVX1-NEXT: vmovapd {{.*#+}} ymm1 = [5.0E-1,5.0E-1,5.0E-1,5.0E-1] ; AVX1-NEXT: vblendvpd %ymm0, {{.*}}(%rip), %ymm1, %ymm0 ; AVX1-NEXT: vmovupd %ymm0, (%rax) ; AVX1-NEXT: vzeroupper @@ -57,8 +57,8 @@ define void @test2(double** %call1559, i64 %indvars.iv4198, <4 x i1> %tmp1895) { ; AVX2-NEXT: vpslld $31, %xmm0, %xmm0 ; AVX2-NEXT: vpmovsxdq %xmm0, %ymm0 ; AVX2-NEXT: movq (%rdi,%rsi,8), %rax -; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm1 = [-0.5,-0.5,-0.5,-0.5] -; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm2 = [0.5,0.5,0.5,0.5] +; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] +; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm2 = [5.0E-1,5.0E-1,5.0E-1,5.0E-1] ; AVX2-NEXT: vblendvpd %ymm0, %ymm1, %ymm2, %ymm0 ; AVX2-NEXT: vmovupd %ymm0, (%rax) ; AVX2-NEXT: vzeroupper diff --git a/test/CodeGen/X86/widen_arith-6.ll b/test/CodeGen/X86/widen_arith-6.ll index 73b8f4ea276..c039096604e 100644 --- a/test/CodeGen/X86/widen_arith-6.ll +++ b/test/CodeGen/X86/widen_arith-6.ll @@ -14,7 +14,7 @@ define void @update(<3 x float>* %dst, <3 x float>* %src, i32 %n) nounwind { ; CHECK-NEXT: movl $1073741824, {{[0-9]+}}(%esp) # imm = 0x40000000 ; CHECK-NEXT: movl $1065353216, {{[0-9]+}}(%esp) # imm = 0x3F800000 ; CHECK-NEXT: movl $0, {{[0-9]+}}(%esp) -; CHECK-NEXT: movaps {{.*#+}} xmm0 = <1976.04004,1976.04004,1976.04004,u> +; CHECK-NEXT: movaps {{.*#+}} xmm0 = <1.97604004E+3,1.97604004E+3,1.97604004E+3,u> ; CHECK-NEXT: jmp .LBB0_1 ; CHECK-NEXT: .p2align 4, 0x90 ; CHECK-NEXT: .LBB0_2: # %forbody diff --git a/test/CodeGen/X86/x86-setcc-int-to-fp-combine.ll b/test/CodeGen/X86/x86-setcc-int-to-fp-combine.ll index e9f291d239b..70a72e7ee1a 100644 --- a/test/CodeGen/X86/x86-setcc-int-to-fp-combine.ll +++ b/test/CodeGen/X86/x86-setcc-int-to-fp-combine.ll @@ -52,7 +52,7 @@ define void @foo2(<4 x float>* noalias %result) nounwind { ; CHECK-NEXT: .long 1088421888 ## float 7 ; CHECK-LABEL: foo2: ; CHECK: ## %bb.0: -; CHECK-NEXT: movaps {{.*#+}} xmm0 = [4,5,6,7] +; CHECK-NEXT: movaps {{.*#+}} xmm0 = [4.0E+0,5.0E+0,6.0E+0,7.0E+0] ; CHECK-NEXT: movaps %xmm0, (%rdi) ; CHECK-NEXT: retq %val = uitofp <4 x i32> to <4 x float> @@ -89,7 +89,7 @@ define void @foo4(<4 x float>* noalias %result) nounwind { ; CHECK-NEXT: .long 1132396544 ## float 255 ; CHECK-LABEL: foo4: ; CHECK: ## %bb.0: -; CHECK-NEXT: movaps {{.*#+}} xmm0 = [1,127,128,255] +; CHECK-NEXT: movaps {{.*#+}} xmm0 = [1.0E+0,1.27E+2,1.28E+2,2.55E+2] ; CHECK-NEXT: movaps %xmm0, (%rdi) ; CHECK-NEXT: retq %val = uitofp <4 x i8> to <4 x float>