From 371053ed236e1063a34cfe313cdc16fe53ec4c51 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Mon, 14 Dec 2020 11:39:43 +0000
Subject: [PATCH] [IRCE] Add test case for PR48051

---
 test/Transforms/IRCE/pr48051.ll | 59 +++++++++++++++++++++++++++++++++
 1 file changed, 59 insertions(+)
 create mode 100644 test/Transforms/IRCE/pr48051.ll

diff --git a/test/Transforms/IRCE/pr48051.ll b/test/Transforms/IRCE/pr48051.ll
new file mode 100644
index 00000000000..f682e0613f2
--- /dev/null
+++ b/test/Transforms/IRCE/pr48051.ll
@@ -0,0 +1,59 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -irce -S | FileCheck %s
+
+; Reduced from https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=26832
+
+define void @scalar_after_vectorization_0() {
+; CHECK-LABEL: @scalar_after_vectorization_0(
+; CHECK-NEXT:  outer.ph:
+; CHECK-NEXT:    [[B4:%.*]] = sub i64 9223372036854775807, -9223372036854775808
+; CHECK-NEXT:    [[B21:%.*]] = and i64 [[B4]], [[B4]]
+; CHECK-NEXT:    [[B9:%.*]] = lshr i64 9223372036854775807, -1
+; CHECK-NEXT:    br label [[OUTER_BODY:%.*]]
+; CHECK:       outer.body:
+; CHECK-NEXT:    [[I:%.*]] = phi i64 [ 1, [[OUTER_PH:%.*]] ], [ [[I_NEXT:%.*]], [[INNER_END:%.*]] ]
+; CHECK-NEXT:    [[T0:%.*]] = mul nuw nsw i64 [[I]], undef
+; CHECK-NEXT:    br label [[INNER_BODY:%.*]]
+; CHECK:       inner.body:
+; CHECK-NEXT:    [[J:%.*]] = phi i64 [ 1, [[OUTER_BODY]] ], [ [[T1:%.*]], [[INNER_BODY]] ]
+; CHECK-NEXT:    [[T1]] = add nuw nsw i64 [[J]], [[T0]]
+; CHECK-NEXT:    [[B3:%.*]] = mul i64 [[T1]], undef
+; CHECK-NEXT:    [[B13:%.*]] = mul i64 [[B3]], 4294967296
+; CHECK-NEXT:    [[C2:%.*]] = icmp slt i64 undef, [[B13]]
+; CHECK-NEXT:    br i1 [[C2]], label [[INNER_BODY]], label [[INNER_END]]
+; CHECK:       inner.end:
+; CHECK-NEXT:    [[B16:%.*]] = urem i64 [[B4]], [[B9]]
+; CHECK-NEXT:    [[I_NEXT]] = add i64 [[I]], [[B16]]
+; CHECK-NEXT:    [[C:%.*]] = icmp ult i64 [[B21]], [[I_NEXT]]
+; CHECK-NEXT:    br i1 [[C]], label [[OUTER_BODY]], label [[OUTER_END:%.*]]
+; CHECK:       outer.end:
+; CHECK-NEXT:    ret void
+;
+outer.ph:
+  br label %outer.body
+
+outer.body:                                       ; preds = %inner.end, %outer.ph
+  %i = phi i64 [ 1, %outer.ph ], [ %i.next, %inner.end ]
+  %t0 = mul nuw nsw i64 %i, undef
+  br label %inner.body
+
+inner.body:                                       ; preds = %inner.body, %outer.body
+  %j = phi i64 [ 1, %outer.body ], [ %t1, %inner.body ]
+  %t1 = add nuw nsw i64 %j, %t0
+  %B3 = mul i64 %t1, undef
+  %B13 = mul i64 %B3, 4294967296
+  %C2 = icmp slt i64 undef, %B13
+  br i1 %C2, label %inner.body, label %inner.end
+
+inner.end:                                        ; preds = %inner.body
+  %B4 = sub i64 9223372036854775807, -9223372036854775808
+  %B21 = and i64 %B4, %B4
+  %B9 = lshr i64 9223372036854775807, -1
+  %B16 = urem i64 %B4, %B9
+  %i.next = add i64 %i, %B16
+  %C = icmp ult i64 %B21, %i.next
+  br i1 %C, label %outer.body, label %outer.end
+
+outer.end:                                        ; preds = %inner.end
+  ret void
+}