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[InstCombine] add one-use check to add+xor transform

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As shown in the affected test, we could increase instruction
count without this limitation. There's another test with extra
use that shows we still convert directly to a real "sext" if
possible.
This commit is contained in:
Sanjay Patel 2020-10-10 10:35:18 -04:00
parent 846ed8e1d0
commit 372d448d9b
2 changed files with 2 additions and 3 deletions
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2
lib/Transforms/InstCombine/InstCombineAddSub.cpp
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@ -1290,7 +1290,7 @@ Instruction *InstCombinerImpl::visitAdd(BinaryOperator &I) {
Type *Ty = I.getType();
if (ConstantInt *CI = dyn_cast<ConstantInt>(RHS)) {
Value *XorLHS = nullptr; ConstantInt *XorRHS = nullptr;
if (match(LHS, m_Xor(m_Value(XorLHS), m_ConstantInt(XorRHS)))) {
if (match(LHS, m_OneUse(m_Xor(m_Value(XorLHS), m_ConstantInt(XorRHS))))) {
unsigned TySizeBits = Ty->getScalarSizeInBits();
const APInt &RHSVal = CI->getValue();
unsigned ExtendAmt = 0;

3
test/Transforms/InstCombine/signext.ll
View File

@ -22,8 +22,7 @@ define i32 @sextinreg_extra_use(i32 %x) {
; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 65535
; CHECK-NEXT: [[T2:%.*]] = xor i32 [[T1]], -32768
; CHECK-NEXT: call void @use(i32 [[T2]])
; CHECK-NEXT: [[SEXT:%.*]] = shl i32 [[X]], 16
; CHECK-NEXT: [[T3:%.*]] = ashr exact i32 [[SEXT]], 16
; CHECK-NEXT: [[T3:%.*]] = add nsw i32 [[T2]], 32768
; CHECK-NEXT: ret i32 [[T3]]
;
%t1 = and i32 %x, 65535