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Use arrays or initializer lists to feed ArrayRefs instead of SmallVector where possible.

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No functionality change intended.

llvm-svn: 274431
This commit is contained in:
Benjamin Kramer 2016-07-02 11:41:39 +00:00
parent e75e1b5f4a
commit 37a7d5e6b0
9 changed files with 28 additions and 55 deletions
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8
lib/Analysis/ScalarEvolution.cpp
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@ -3022,9 +3022,7 @@ ScalarEvolution::getGEPExpr(Type *PointeeType, const SCEV *BaseExpr,
const SCEV *ScalarEvolution::getSMaxExpr(const SCEV *LHS,
const SCEV *RHS) {
SmallVector<const SCEV *, 2> Ops;
Ops.push_back(LHS);
Ops.push_back(RHS);
SmallVector<const SCEV *, 2> Ops = {LHS, RHS};
return getSMaxExpr(Ops);
}
@ -3125,9 +3123,7 @@ ScalarEvolution::getSMaxExpr(SmallVectorImpl<const SCEV *> &Ops) {
const SCEV *ScalarEvolution::getUMaxExpr(const SCEV *LHS,
const SCEV *RHS) {
SmallVector<const SCEV *, 2> Ops;
Ops.push_back(LHS);
Ops.push_back(RHS);
SmallVector<const SCEV *, 2> Ops = {LHS, RHS};
return getUMaxExpr(Ops);
}

15
lib/Target/AArch64/AArch64CollectLOH.cpp
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@ -628,10 +628,7 @@ static void computeADRP(const InstrToInstrs &UseToDefs,
continue;
}
DEBUG(dbgs() << "Record AdrpAdrp:\n" << *L2 << '\n' << *L1 << '\n');
SmallVector<const MachineInstr *, 2> Args;
Args.push_back(L2);
Args.push_back(L1);
AArch64FI.addLOHDirective(MCLOH_AdrpAdrp, Args);
AArch64FI.addLOHDirective(MCLOH_AdrpAdrp, {L1, L2});
++NumADRPSimpleCandidate;
}
#ifdef DEBUG
@ -765,13 +762,9 @@ static bool registerADRCandidate(const MachineInstr &Use,
"ADD already involved in LOH.");
DEBUG(dbgs() << "Record AdrpAdd\n" << Def << '\n' << Use << '\n');
SmallVector<const MachineInstr *, 2> Args;
Args.push_back(&Def);
Args.push_back(&Use);
AArch64FI.addLOHDirective(Use.getOpcode() == AArch64::ADDXri ? MCLOH_AdrpAdd
: MCLOH_AdrpLdrGot,
Args);
AArch64FI.addLOHDirective(
Use.getOpcode() == AArch64::ADDXri ? MCLOH_AdrpAdd : MCLOH_AdrpLdrGot,
{&Def, &Use});
return true;
}

14
lib/Target/AArch64/AArch64ISelLowering.cpp
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@ -3535,11 +3535,8 @@ SDValue AArch64TargetLowering::LowerELFTLSDescCallSeq(SDValue SymAddr,
SDValue Chain = DAG.getEntryNode();
SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
SmallVector<SDValue, 2> Ops;
Ops.push_back(Chain);
Ops.push_back(SymAddr);
Chain = DAG.getNode(AArch64ISD::TLSDESC_CALLSEQ, DL, NodeTys, Ops);
Chain =
DAG.getNode(AArch64ISD::TLSDESC_CALLSEQ, DL, NodeTys, {Chain, SymAddr});
SDValue Glue = Chain.getValue(1);
return DAG.getCopyFromReg(Chain, DL, AArch64::X0, PtrVT, Glue);
@ -8931,9 +8928,10 @@ static SDValue performPostLD1Combine(SDNode *N,
LoadSDN->getMemOperand());
// Update the uses.
SmallVector<SDValue, 2> NewResults;
NewResults.push_back(SDValue(LD, 0)); // The result of load
NewResults.push_back(SDValue(UpdN.getNode(), 2)); // Chain
SDValue NewResults[] = {
SDValue(LD, 0), // The result of load
SDValue(UpdN.getNode(), 2) // Chain
};
DCI.CombineTo(LD, NewResults);
DCI.CombineTo(N, SDValue(UpdN.getNode(), 0)); // Dup/Inserted Result
DCI.CombineTo(User, SDValue(UpdN.getNode(), 1)); // Write back register

8
lib/Target/AArch64/AArch64MachineFunctionInfo.h
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@ -166,15 +166,15 @@ public:
SmallVector<const MachineInstr *, 3> Args;
public:
typedef SmallVectorImpl<const MachineInstr *> LOHArgs;
typedef ArrayRef<const MachineInstr *> LOHArgs;
MILOHDirective(MCLOHType Kind, const LOHArgs &Args)
MILOHDirective(MCLOHType Kind, LOHArgs Args)
: Kind(Kind), Args(Args.begin(), Args.end()) {
assert(isValidMCLOHType(Kind) && "Invalid LOH directive type!");
}
MCLOHType getKind() const { return Kind; }
const LOHArgs &getArgs() const { return Args; }
LOHArgs getArgs() const { return Args; }
};
typedef MILOHDirective::LOHArgs MILOHArgs;
@ -183,7 +183,7 @@ public:
const MILOHContainer &getLOHContainer() const { return LOHContainerSet; }
/// Add a LOH directive of this @p Kind and this @p Args.
void addLOHDirective(MCLOHType Kind, const MILOHArgs &Args) {
void addLOHDirective(MCLOHType Kind, MILOHArgs Args) {
LOHContainerSet.push_back(MILOHDirective(Kind, Args));
LOHRelated.insert(Args.begin(), Args.end());
}

5
lib/Target/NVPTX/NVPTXGenericToNVVM.cpp
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@ -182,11 +182,8 @@ Value *GenericToNVVM::getOrInsertCVTA(Module *M, Function *F,
// Insert the address space conversion.
Type *ResultType =
PointerType::get(Type::getInt8Ty(Context), llvm::ADDRESS_SPACE_GENERIC);
SmallVector<Type *, 2> ParamTypes;
ParamTypes.push_back(ResultType);
ParamTypes.push_back(DestTy);
Function *CVTAFunction = Intrinsic::getDeclaration(
M, Intrinsic::nvvm_ptr_global_to_gen, ParamTypes);
M, Intrinsic::nvvm_ptr_global_to_gen, {ResultType, DestTy});
CVTA = Builder.CreateCall(CVTAFunction, CVTA, "cvta");
// Another bitcast from i8 * to <the element type of GVType> * is
// required.

5
lib/Target/PowerPC/PPCTLSDynamicCall.cpp
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@ -73,10 +73,7 @@ protected:
DebugLoc DL = MI->getDebugLoc();
unsigned GPR3 = Is64Bit ? PPC::X3 : PPC::R3;
unsigned Opc1, Opc2;
SmallVector<unsigned, 4> OrigRegs;
OrigRegs.push_back(OutReg);
OrigRegs.push_back(InReg);
OrigRegs.push_back(GPR3);
const unsigned OrigRegs[] = {OutReg, InReg, GPR3};
switch (MI->getOpcode()) {
default:

13
lib/Target/Sparc/SparcISelLowering.cpp
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@ -2076,16 +2076,15 @@ SDValue SparcTargetLowering::LowerGlobalTLSAddress(SDValue Op,
SDValue Symbol = withTargetFlags(Op, callTF, DAG);
SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
SmallVector<SDValue, 4> Ops;
Ops.push_back(Chain);
Ops.push_back(Callee);
Ops.push_back(Symbol);
Ops.push_back(DAG.getRegister(SP::O0, PtrVT));
const uint32_t *Mask = Subtarget->getRegisterInfo()->getCallPreservedMask(
DAG.getMachineFunction(), CallingConv::C);
assert(Mask && "Missing call preserved mask for calling convention");
Ops.push_back(DAG.getRegisterMask(Mask));
Ops.push_back(InFlag);
SDValue Ops[] = {Chain,
Callee,
Symbol,
DAG.getRegister(SP::O0, PtrVT),
DAG.getRegisterMask(Mask),
InFlag};
Chain = DAG.getNode(SPISD::TLS_CALL, DL, NodeTys, Ops);
InFlag = Chain.getValue(1);
Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(1, DL, true),

8
lib/Target/XCore/XCoreLowerThreadLocal.cpp
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@ -179,7 +179,6 @@ static bool isZeroLengthArray(Type *Ty) {
bool XCoreLowerThreadLocal::lowerGlobal(GlobalVariable *GV) {
Module *M = GV->getParent();
LLVMContext &Ctx = M->getContext();
if (!GV->isThreadLocal())
return false;
@ -210,11 +209,8 @@ bool XCoreLowerThreadLocal::lowerGlobal(GlobalVariable *GV) {
Function *GetID = Intrinsic::getDeclaration(GV->getParent(),
Intrinsic::xcore_getid);
Value *ThreadID = Builder.CreateCall(GetID, {});
SmallVector<Value *, 2> Indices;
Indices.push_back(Constant::getNullValue(Type::getInt64Ty(Ctx)));
Indices.push_back(ThreadID);
Value *Addr =
Builder.CreateInBoundsGEP(NewGV->getValueType(), NewGV, Indices);
Value *Addr = Builder.CreateInBoundsGEP(NewGV->getValueType(), NewGV,
{Builder.getInt64(0), ThreadID});
U->replaceUsesOfWith(GV, Addr);
}

7
lib/Transforms/Instrumentation/GCOVProfiling.cpp
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@ -633,11 +633,8 @@ bool GCOVProfiler::emitProfileArcs() {
Value *Sel = Builder.CreateSelect(BI->getCondition(),
Builder.getInt64(Edge),
Builder.getInt64(Edge + 1));
SmallVector<Value *, 2> Idx;
Idx.push_back(Builder.getInt64(0));
Idx.push_back(Sel);
Value *Counter = Builder.CreateInBoundsGEP(Counters->getValueType(),
Counters, Idx);
Value *Counter = Builder.CreateInBoundsGEP(
Counters->getValueType(), Counters, {Builder.getInt64(0), Sel});
Value *Count = Builder.CreateLoad(Counter);
Count = Builder.CreateAdd(Count, Builder.getInt64(1));
Builder.CreateStore(Count, Counter);