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CodeGen: Push the ModuleSlotTracker through MachineOperands
Push `ModuleSlotTracker` through `MachineOperand`s, dropping the time for `llc -print-machineinstrs` on the testcase in PR23865 from ~13 seconds to ~9 seconds. Now `SlotTracker::processFunctionMetadata()` accounts for only 8% of the runtime, which seems reasonable. llvm-svn: 240845
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10ed082b87
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@ -1105,6 +1105,8 @@ public:
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// Debugging support
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//
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void print(raw_ostream &OS, bool SkipOpers = false) const;
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void print(raw_ostream &OS, ModuleSlotTracker &MST,
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bool SkipOpers = false) const;
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void dump() const;
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//===--------------------------------------------------------------------===//
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@ -27,6 +27,7 @@ namespace llvm {
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class FoldingSetNodeID;
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class MDNode;
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class raw_ostream;
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class ModuleSlotTracker;
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/// MachinePointerInfo - This class contains a discriminated union of
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/// information about pointers in memory operands, relating them back to LLVM IR
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@ -200,6 +201,12 @@ public:
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///
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void Profile(FoldingSetNodeID &ID) const;
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/// Support for operator<<.
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/// @{
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void print(raw_ostream &OS) const;
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void print(raw_ostream &OS, ModuleSlotTracker &MST) const;
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/// @}
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friend bool operator==(const MachineMemOperand &LHS,
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const MachineMemOperand &RHS) {
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return LHS.getValue() == RHS.getValue() &&
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@ -219,7 +226,10 @@ public:
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}
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};
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raw_ostream &operator<<(raw_ostream &OS, const MachineMemOperand &MRO);
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inline raw_ostream &operator<<(raw_ostream &OS, const MachineMemOperand &MRO) {
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MRO.print(OS);
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return OS;
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}
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} // End llvm namespace
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@ -27,6 +27,7 @@ class MachineBasicBlock;
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class MachineInstr;
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class MachineRegisterInfo;
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class MDNode;
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class ModuleSlotTracker;
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class TargetMachine;
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class TargetRegisterInfo;
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class hash_code;
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@ -218,6 +219,8 @@ public:
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void clearParent() { ParentMI = nullptr; }
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void print(raw_ostream &os, const TargetRegisterInfo *TRI = nullptr) const;
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void print(raw_ostream &os, ModuleSlotTracker &MST,
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const TargetRegisterInfo *TRI = nullptr) const;
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//===--------------------------------------------------------------------===//
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// Accessors that tell you what kind of MachineOperand you're looking at.
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@ -29,8 +29,7 @@ namespace llvm {
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/// space), or constant pool.
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class PseudoSourceValue {
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private:
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friend raw_ostream &llvm::operator<<(raw_ostream &OS,
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const MachineMemOperand &MMO);
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friend class MachineMemOperand; // For printCustom().
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/// printCustom - Implement printing for PseudoSourceValue. This is called
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/// from Value::print or Value's operator<<.
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@ -305,7 +305,7 @@ void MachineBasicBlock::print(raw_ostream &OS, ModuleSlotTracker &MST,
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OS << '\t';
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if (I->isInsideBundle())
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OS << " * ";
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I->print(OS);
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I->print(OS, MST);
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}
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// Print the successors of this block according to the CFG.
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@ -28,6 +28,7 @@
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#include "llvm/IR/LLVMContext.h"
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#include "llvm/IR/Metadata.h"
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#include "llvm/IR/Module.h"
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#include "llvm/IR/ModuleSlotTracker.h"
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#include "llvm/IR/Type.h"
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#include "llvm/IR/Value.h"
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#include "llvm/MC/MCInstrDesc.h"
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@ -296,10 +297,14 @@ hash_code llvm::hash_value(const MachineOperand &MO) {
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llvm_unreachable("Invalid machine operand type");
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}
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/// print - Print the specified machine operand.
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///
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void MachineOperand::print(raw_ostream &OS,
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const TargetRegisterInfo *TRI) const {
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ModuleSlotTracker DummyMST(nullptr);
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print(OS, DummyMST, TRI);
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}
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void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,
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const TargetRegisterInfo *TRI) const {
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switch (getType()) {
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case MachineOperand::MO_Register:
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OS << PrintReg(getReg(), TRI, getSubReg());
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@ -387,7 +392,7 @@ void MachineOperand::print(raw_ostream &OS,
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break;
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case MachineOperand::MO_GlobalAddress:
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OS << "<ga:";
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getGlobal()->printAsOperand(OS, /*PrintType=*/false);
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getGlobal()->printAsOperand(OS, /*PrintType=*/false, MST);
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if (getOffset()) OS << "+" << getOffset();
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OS << '>';
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break;
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@ -398,7 +403,7 @@ void MachineOperand::print(raw_ostream &OS,
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break;
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case MachineOperand::MO_BlockAddress:
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OS << '<';
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getBlockAddress()->printAsOperand(OS, /*PrintType=*/false);
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getBlockAddress()->printAsOperand(OS, /*PrintType=*/false, MST);
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if (getOffset()) OS << "+" << getOffset();
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OS << '>';
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break;
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@ -505,49 +510,52 @@ uint64_t MachineMemOperand::getAlignment() const {
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return MinAlign(getBaseAlignment(), getOffset());
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}
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raw_ostream &llvm::operator<<(raw_ostream &OS, const MachineMemOperand &MMO) {
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assert((MMO.isLoad() || MMO.isStore()) &&
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void MachineMemOperand::print(raw_ostream &OS) const {
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ModuleSlotTracker DummyMST(nullptr);
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print(OS, DummyMST);
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}
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void MachineMemOperand::print(raw_ostream &OS, ModuleSlotTracker &MST) const {
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assert((isLoad() || isStore()) &&
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"SV has to be a load, store or both.");
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if (MMO.isVolatile())
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if (isVolatile())
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OS << "Volatile ";
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if (MMO.isLoad())
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if (isLoad())
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OS << "LD";
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if (MMO.isStore())
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if (isStore())
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OS << "ST";
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OS << MMO.getSize();
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OS << getSize();
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// Print the address information.
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OS << "[";
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if (const Value *V = MMO.getValue())
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V->printAsOperand(OS, /*PrintType=*/false);
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else if (const PseudoSourceValue *PSV = MMO.getPseudoValue())
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if (const Value *V = getValue())
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V->printAsOperand(OS, /*PrintType=*/false, MST);
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else if (const PseudoSourceValue *PSV = getPseudoValue())
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PSV->printCustom(OS);
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else
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OS << "<unknown>";
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unsigned AS = MMO.getAddrSpace();
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unsigned AS = getAddrSpace();
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if (AS != 0)
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OS << "(addrspace=" << AS << ')';
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// If the alignment of the memory reference itself differs from the alignment
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// of the base pointer, print the base alignment explicitly, next to the base
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// pointer.
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if (MMO.getBaseAlignment() != MMO.getAlignment())
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OS << "(align=" << MMO.getBaseAlignment() << ")";
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if (getBaseAlignment() != getAlignment())
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OS << "(align=" << getBaseAlignment() << ")";
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if (MMO.getOffset() != 0)
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OS << "+" << MMO.getOffset();
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if (getOffset() != 0)
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OS << "+" << getOffset();
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OS << "]";
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// Print the alignment of the reference.
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if (MMO.getBaseAlignment() != MMO.getAlignment() ||
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MMO.getBaseAlignment() != MMO.getSize())
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OS << "(align=" << MMO.getAlignment() << ")";
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if (getBaseAlignment() != getAlignment() || getBaseAlignment() != getSize())
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OS << "(align=" << getAlignment() << ")";
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// Print TBAA info.
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if (const MDNode *TBAAInfo = MMO.getAAInfo().TBAA) {
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if (const MDNode *TBAAInfo = getAAInfo().TBAA) {
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OS << "(tbaa=";
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if (TBAAInfo->getNumOperands() > 0)
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TBAAInfo->getOperand(0)->printAsOperand(OS);
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@ -557,7 +565,7 @@ raw_ostream &llvm::operator<<(raw_ostream &OS, const MachineMemOperand &MMO) {
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}
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// Print AA scope info.
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if (const MDNode *ScopeInfo = MMO.getAAInfo().Scope) {
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if (const MDNode *ScopeInfo = getAAInfo().Scope) {
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OS << "(alias.scope=";
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if (ScopeInfo->getNumOperands() > 0)
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for (unsigned i = 0, ie = ScopeInfo->getNumOperands(); i != ie; ++i) {
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@ -571,7 +579,7 @@ raw_ostream &llvm::operator<<(raw_ostream &OS, const MachineMemOperand &MMO) {
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}
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// Print AA noalias scope info.
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if (const MDNode *NoAliasInfo = MMO.getAAInfo().NoAlias) {
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if (const MDNode *NoAliasInfo = getAAInfo().NoAlias) {
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OS << "(noalias=";
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if (NoAliasInfo->getNumOperands() > 0)
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for (unsigned i = 0, ie = NoAliasInfo->getNumOperands(); i != ie; ++i) {
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@ -585,13 +593,11 @@ raw_ostream &llvm::operator<<(raw_ostream &OS, const MachineMemOperand &MMO) {
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}
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// Print nontemporal info.
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if (MMO.isNonTemporal())
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if (isNonTemporal())
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OS << "(nontemporal)";
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if (MMO.isInvariant())
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if (isInvariant())
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OS << "(invariant)";
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return OS;
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}
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//===----------------------------------------------------------------------===//
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@ -1526,6 +1532,12 @@ void MachineInstr::dump() const {
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}
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void MachineInstr::print(raw_ostream &OS, bool SkipOpers) const {
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ModuleSlotTracker DummyMST(nullptr);
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print(OS, DummyMST, SkipOpers);
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}
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void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
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bool SkipOpers) const {
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// We can be a bit tidier if we know the MachineFunction.
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const MachineFunction *MF = nullptr;
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const TargetRegisterInfo *TRI = nullptr;
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@ -1550,7 +1562,7 @@ void MachineInstr::print(raw_ostream &OS, bool SkipOpers) const {
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!getOperand(StartOp).isImplicit();
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++StartOp) {
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if (StartOp != 0) OS << ", ";
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getOperand(StartOp).print(OS, TRI);
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getOperand(StartOp).print(OS, MST, TRI);
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unsigned Reg = getOperand(StartOp).getReg();
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if (TargetRegisterInfo::isVirtualRegister(Reg))
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VirtRegs.push_back(Reg);
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@ -1577,7 +1589,7 @@ void MachineInstr::print(raw_ostream &OS, bool SkipOpers) const {
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if (isInlineAsm() && e >= InlineAsm::MIOp_FirstOperand) {
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// Print asm string.
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OS << " ";
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getOperand(InlineAsm::MIOp_AsmString).print(OS, TRI);
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getOperand(InlineAsm::MIOp_AsmString).print(OS, MST, TRI);
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// Print HasSideEffects, MayLoad, MayStore, IsAlignStack
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unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
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@ -1645,7 +1657,7 @@ void MachineInstr::print(raw_ostream &OS, bool SkipOpers) const {
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if (DIV && !DIV->getName().empty())
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OS << "!\"" << DIV->getName() << '\"';
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else
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MO.print(OS, TRI);
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MO.print(OS, MST, TRI);
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} else if (TRI && (isInsertSubreg() || isRegSequence()) && MO.isImm()) {
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OS << TRI->getSubRegIndexName(MO.getImm());
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} else if (i == AsmDescOp && MO.isImm()) {
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@ -1679,7 +1691,7 @@ void MachineInstr::print(raw_ostream &OS, bool SkipOpers) const {
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// Compute the index of the next operand descriptor.
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AsmDescOp += 1 + InlineAsm::getNumOperandRegisters(Flag);
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} else
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MO.print(OS, TRI);
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MO.print(OS, MST, TRI);
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}
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// Briefly indicate whether any call clobbers were omitted.
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@ -1704,7 +1716,7 @@ void MachineInstr::print(raw_ostream &OS, bool SkipOpers) const {
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OS << " mem:";
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for (mmo_iterator i = memoperands_begin(), e = memoperands_end();
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i != e; ++i) {
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OS << **i;
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(*i)->print(OS, MST);
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if (std::next(i) != e)
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OS << " ";
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}
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