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[Hexagon] Prefer _io over _rr for 64-bit store with constant offset

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Identify patterns where the address is aligned to an 8-byte boundary,
but both the base address and the constant offset are both proper
multiples of 4. In such cases, extract Base+4 into a separate instruc-
tion, and use S2_storerd_io, instead of using S4_storerd_rr.

llvm-svn: 277497
This commit is contained in:
Krzysztof Parzyszek 2016-08-02 18:50:05 +00:00
parent 0e4e2bbdee
commit 37ebf5f0df
2 changed files with 25 additions and 0 deletions
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13
lib/Target/Hexagon/HexagonInstrInfoV4.td
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@ -1047,6 +1047,19 @@ let AddedComplexity = 40 in {
def: Storexs_pat<store, I64, S4_storerd_rr>;
}
def s30_2ProperPred : PatLeaf<(i32 imm), [{
int64_t v = (int64_t)N->getSExtValue();
return isShiftedInt<30,2>(v) && !isShiftedInt<29,3>(v);
}]>;
def RoundTo8 : SDNodeXForm<imm, [{
int32_t Imm = N->getSExtValue();
return CurDAG->getTargetConstant(Imm & -8, SDLoc(N), MVT::i32);
}]>;
let AddedComplexity = 40 in
def: Pat<(store I64:$Ru, (add I32:$Rs, s30_2ProperPred:$Off)),
(S2_storerd_io (A2_addi I32:$Rs, 4), (RoundTo8 $Off), I64:$Ru)>;
class Store_rr_pat<PatFrag Store, PatFrag Value, InstHexagon MI>
: Pat<(Store Value:$Ru, (add I32:$Rs, I32:$Rt)),
(MI IntRegs:$Rs, IntRegs:$Rt, 0, Value:$Ru)>;

12
test/CodeGen/Hexagon/storerd-io-over-rr.ll Normal file
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@ -0,0 +1,12 @@
; RUN: llc -march=hexagon < %s | FileCheck %s
; Check for memd(base + #offset), instead of memd(base + reg<<#c).
; CHECK: memd(r{{[0-9]+}}+#
define void @fred(i32 %p, i64 %v) #0 {
%t0 = add i32 %p, 4
%t1 = inttoptr i32 %t0 to i64*
store i64 %v, i64* %t1
ret void
}
attributes #0 = { nounwind "target-cpu"="hexagonv60" }