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[ARM] Lower (select_cc k k (select_cc ~k ~k x)) into (SSAT l_k x)
Summary: SSAT saturates an integer, making sure that its value lies within an interval [-k, k]. Since the constant is given to SSAT as the number of bytes set to one, k + 1 must be a power of 2, otherwise the optimization is not possible. Also, the select_cc must use < and > respectively so that they define an interval. Reviewers: mcrosier, jmolloy, rengolin Subscribers: aemerson, rengolin, llvm-commits Differential Revision: http://reviews.llvm.org/D21372 llvm-svn: 273581
This commit is contained in:
Pablo Barrio
parent
2f20edd624
commit
382cd268e3
@ -116,6 +116,9 @@ def SDTIntBinOp : SDTypeProfile<1, 2, [ // add, and, or, xor, udiv, etc.
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def SDTIntShiftOp : SDTypeProfile<1, 2, [ // shl, sra, srl
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SDTCisSameAs<0, 1>, SDTCisInt<0>, SDTCisInt<2>
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]>;
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def SDTIntSatNoShOp : SDTypeProfile<1, 2, [ // ssat with no shift
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SDTCisSameAs<0, 1>, SDTCisInt<2>
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]>;
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def SDTIntBinHiLoOp : SDTypeProfile<2, 2, [ // mulhi, mullo, sdivrem, udivrem
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SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisSameAs<0, 3>,SDTCisInt<0>
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]>;
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@ -1136,6 +1136,8 @@ const char *ARMTargetLowering::getTargetNodeName(unsigned Opcode) const {
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case ARMISD::CMOV: return "ARMISD::CMOV";
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case ARMISD::SSAT: return "ARMISD::SSAT";
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case ARMISD::SRL_FLAG: return "ARMISD::SRL_FLAG";
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case ARMISD::SRA_FLAG: return "ARMISD::SRA_FLAG";
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case ARMISD::RRX: return "ARMISD::RRX";
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@ -3728,14 +3730,144 @@ SDValue ARMTargetLowering::getCMOV(const SDLoc &dl, EVT VT, SDValue FalseVal,
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}
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}
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bool isGTorGE(ISD::CondCode CC) { return CC == ISD::SETGT || CC == ISD::SETGE; }
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bool isLTorLE(ISD::CondCode CC) { return CC == ISD::SETLT || CC == ISD::SETLE; }
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// See if a conditional (LHS CC RHS ? TrueVal : FalseVal) is lower-saturating.
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// All of these conditions (and their <= and >= counterparts) will do:
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// x < k ? k : x
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// x > k ? x : k
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// k < x ? x : k
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// k > x ? k : x
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bool isLowerSaturate(const SDValue LHS, const SDValue RHS,
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const SDValue TrueVal, const SDValue FalseVal,
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const ISD::CondCode CC, const SDValue K) {
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return (isGTorGE(CC) &&
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((K == LHS && K == TrueVal) || (K == RHS && K == FalseVal))) ||
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(isLTorLE(CC) &&
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((K == RHS && K == TrueVal) || (K == LHS && K == FalseVal)));
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}
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// Similar to isLowerSaturate(), but checks for upper-saturating conditions.
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bool isUpperSaturate(const SDValue LHS, const SDValue RHS,
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const SDValue TrueVal, const SDValue FalseVal,
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const ISD::CondCode CC, const SDValue K) {
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return (isGTorGE(CC) &&
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((K == RHS && K == TrueVal) || (K == LHS && K == FalseVal))) ||
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(isLTorLE(CC) &&
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((K == LHS && K == TrueVal) || (K == RHS && K == FalseVal)));
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}
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// Check if two chained conditionals could be converted into SSAT.
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//
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// SSAT can replace a set of two conditional selectors that bound a number to an
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// interval of type [k, ~k] when k + 1 is a power of 2. Here are some examples:
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//
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// x < -k ? -k : (x > k ? k : x)
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// x < -k ? -k : (x < k ? x : k)
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// x > -k ? (x > k ? k : x) : -k
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// x < k ? (x < -k ? -k : x) : k
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// etc.
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//
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// It returns true if the conversion can be done, false otherwise.
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// Additionally, the variable is returned in parameter V and the constant in K.
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bool isSaturatingConditional(const SDValue &Op, SDValue &V, uint64_t &K) {
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SDValue LHS1 = Op.getOperand(0);
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SDValue RHS1 = Op.getOperand(1);
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SDValue TrueVal1 = Op.getOperand(2);
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SDValue FalseVal1 = Op.getOperand(3);
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ISD::CondCode CC1 = cast<CondCodeSDNode>(Op.getOperand(4))->get();
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const SDValue Op2 = isa<ConstantSDNode>(TrueVal1) ? FalseVal1 : TrueVal1;
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if (Op2.getOpcode() != ISD::SELECT_CC)
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return false;
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SDValue LHS2 = Op2.getOperand(0);
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SDValue RHS2 = Op2.getOperand(1);
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SDValue TrueVal2 = Op2.getOperand(2);
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SDValue FalseVal2 = Op2.getOperand(3);
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ISD::CondCode CC2 = cast<CondCodeSDNode>(Op2.getOperand(4))->get();
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// Find out which are the constants and which are the variables
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// in each conditional
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SDValue *K1 = isa<ConstantSDNode>(LHS1) ? &LHS1 : isa<ConstantSDNode>(RHS1)
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? &RHS1
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: NULL;
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SDValue *K2 = isa<ConstantSDNode>(LHS2) ? &LHS2 : isa<ConstantSDNode>(RHS2)
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? &RHS2
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: NULL;
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SDValue K2Tmp = isa<ConstantSDNode>(TrueVal2) ? TrueVal2 : FalseVal2;
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SDValue V1Tmp = (K1 && *K1 == LHS1) ? RHS1 : LHS1;
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SDValue V2Tmp = (K2 && *K2 == LHS2) ? RHS2 : LHS2;
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SDValue V2 = (K2Tmp == TrueVal2) ? FalseVal2 : TrueVal2;
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// We must detect cases where the original operations worked with 16- or
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// 8-bit values. In such case, V2Tmp != V2 because the comparison operations
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// must work with sign-extended values but the select operations return
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// the original non-extended value.
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SDValue V2TmpReg = V2Tmp;
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if (V2Tmp->getOpcode() == ISD::SIGN_EXTEND_INREG)
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V2TmpReg = V2Tmp->getOperand(0);
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// Check that the registers and the constants have the correct values
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// in both conditionals
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if (!K1 || !K2 || *K1 == Op2 || *K2 != K2Tmp || V1Tmp != V2Tmp ||
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V2TmpReg != V2)
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return false;
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// Figure out which conditional is saturating the lower/upper bound.
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const SDValue *LowerCheckOp =
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isLowerSaturate(LHS1, RHS1, TrueVal1, FalseVal1, CC1, *K1)
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? &Op
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: isLowerSaturate(LHS2, RHS2, TrueVal2, FalseVal2, CC2, *K2) ? &Op2
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: NULL;
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const SDValue *UpperCheckOp =
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isUpperSaturate(LHS1, RHS1, TrueVal1, FalseVal1, CC1, *K1)
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? &Op
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: isUpperSaturate(LHS2, RHS2, TrueVal2, FalseVal2, CC2, *K2) ? &Op2
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: NULL;
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if (!UpperCheckOp || !LowerCheckOp || LowerCheckOp == UpperCheckOp)
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return false;
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// Check that the constant in the lower-bound check is
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// the opposite of the constant in the upper-bound check
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// in 1's complement.
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int64_t Val1 = cast<ConstantSDNode>(*K1)->getSExtValue();
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int64_t Val2 = cast<ConstantSDNode>(*K2)->getSExtValue();
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int64_t PosVal = std::max(Val1, Val2);
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if (((Val1 > Val2 && UpperCheckOp == &Op) ||
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(Val1 < Val2 && UpperCheckOp == &Op2)) &&
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Val1 == ~Val2 && isPowerOf2_64(PosVal + 1)) {
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V = V2;
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K = (uint64_t)PosVal; // At this point, PosVal is guaranteed to be positive
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return true;
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}
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return false;
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}
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SDValue ARMTargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const {
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EVT VT = Op.getValueType();
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SDLoc dl(Op);
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// Try to convert two saturating conditional selects into a single SSAT
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SDValue SatValue;
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uint64_t SatConstant;
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if (isSaturatingConditional(Op, SatValue, SatConstant))
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return DAG.getNode(ARMISD::SSAT, dl, VT, SatValue,
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DAG.getConstant(countTrailingOnes(SatConstant), dl, VT));
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SDValue LHS = Op.getOperand(0);
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SDValue RHS = Op.getOperand(1);
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ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
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SDValue TrueVal = Op.getOperand(2);
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SDValue FalseVal = Op.getOperand(3);
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SDLoc dl(Op);
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if (Subtarget->isFPOnlySP() && LHS.getValueType() == MVT::f64) {
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DAG.getTargetLoweringInfo().softenSetCCOperands(DAG, MVT::f64, LHS, RHS, CC,
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@ -60,6 +60,8 @@ namespace llvm {
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CMOV, // ARM conditional move instructions.
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SSAT, // Signed saturation
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BCC_i64,
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SRL_FLAG, // V,Flag = srl_flag X -> srl X, 1 + save carry out.
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@ -129,6 +129,8 @@ def ARMintretflag : SDNode<"ARMISD::INTRET_FLAG", SDT_ARMcall,
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def ARMcmov : SDNode<"ARMISD::CMOV", SDT_ARMCMov,
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[SDNPInGlue]>;
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def ARMssatnoshift : SDNode<"ARMISD::SSAT", SDTIntSatNoShOp, []>;
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def ARMbrcond : SDNode<"ARMISD::BRCOND", SDT_ARMBrcond,
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[SDNPHasChain, SDNPInGlue, SDNPOutGlue]>;
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@ -3713,6 +3715,8 @@ def : ARMV6Pat<(int_arm_ssat GPRnopc:$a, imm1_32:$pos),
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(SSAT imm1_32:$pos, GPRnopc:$a, 0)>;
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def : ARMV6Pat<(int_arm_usat GPRnopc:$a, imm0_31:$pos),
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(USAT imm0_31:$pos, GPRnopc:$a, 0)>;
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def : ARMPat<(ARMssatnoshift GPRnopc:$Rn, imm0_31:$imm),
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(SSAT imm0_31:$imm, GPRnopc:$Rn, 0)>;
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//===----------------------------------------------------------------------===//
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// Bitwise Instructions.
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@ -2287,6 +2287,8 @@ def t2USAT16: T2SatI<(outs rGPR:$Rd), (ins imm0_15:$sat_imm, rGPR:$Rn),
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def : T2Pat<(int_arm_ssat GPR:$a, imm1_32:$pos), (t2SSAT imm1_32:$pos, GPR:$a, 0)>;
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def : T2Pat<(int_arm_usat GPR:$a, imm0_31:$pos), (t2USAT imm0_31:$pos, GPR:$a, 0)>;
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def : T2Pat<(ARMssatnoshift GPRnopc:$Rn, imm0_31:$imm),
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(t2SSAT imm0_31:$imm, GPRnopc:$Rn, 0)>;
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//===----------------------------------------------------------------------===//
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// Shift and rotate Instructions.
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215
test/CodeGen/ARM/ssat.ll
Normal file
215
test/CodeGen/ARM/ssat.ll
Normal file
@ -0,0 +1,215 @@
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; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s
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; Check for several conditions that should result in SSAT.
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; For example, the base test is equivalent to
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; x < -k ? -k : (x > k ? k : x) in C. All patterns that bound x
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; to the interval [-k, k] where k is a power of 2 can be
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; transformed into SSAT. At the end there are some tests
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; checking that conditionals are not transformed if they don't
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; match the right pattern.
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;
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; Base tests with different bit widths
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;
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; x < -k ? -k : (x > k ? k : x)
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; 32-bit base test
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define i32 @sat_base_32bit(i32 %x) #0 {
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; CHECK-LABEL: sat_base_32bit:
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; CHECK: ssat r0, #24, r0
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entry:
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%cmpLow = icmp slt i32 %x, -8388608
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%cmpUp = icmp sgt i32 %x, 8388607
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%saturateUp = select i1 %cmpUp, i32 8388607, i32 %x
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%saturateLow = select i1 %cmpLow, i32 -8388608, i32 %saturateUp
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ret i32 %saturateLow
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}
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; x < -k ? -k : (x > k ? k : x)
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; 16-bit base test
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define i16 @sat_base_16bit(i16 %x) #0 {
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; CHECK-LABEL: sat_base_16bit:
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; CHECK: ssat r0, #12, r0
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entry:
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%cmpLow = icmp slt i16 %x, -2048
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%cmpUp = icmp sgt i16 %x, 2047
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%saturateUp = select i1 %cmpUp, i16 2047, i16 %x
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%saturateLow = select i1 %cmpLow, i16 -2048, i16 %saturateUp
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ret i16 %saturateLow
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}
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; x < -k ? -k : (x > k ? k : x)
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; 8-bit base test
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define i8 @sat_base_8bit(i8 %x) #0 {
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; CHECK-LABEL: sat_base_8bit:
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; CHECK: ssat r0, #6, r0
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entry:
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%cmpLow = icmp slt i8 %x, -32
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%cmpUp = icmp sgt i8 %x, 31
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%saturateUp = select i1 %cmpUp, i8 31, i8 %x
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%saturateLow = select i1 %cmpLow, i8 -32, i8 %saturateUp
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ret i8 %saturateLow
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}
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;
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; Tests where the conditionals that check for upper and lower bounds,
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; or the < and > operators, are arranged in different ways. Only some
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; of the possible combinations that lead to SSAT are tested.
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;
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; x < -k ? -k : (x < k ? x : k)
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define i32 @sat_lower_upper_1(i32 %x) #0 {
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; CHECK-LABEL: sat_lower_upper_1:
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; CHECK: ssat r0, #24, r0
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entry:
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%cmpLow = icmp slt i32 %x, -8388608
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%cmpUp = icmp slt i32 %x, 8388607
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%saturateUp = select i1 %cmpUp, i32 %x, i32 8388607
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%saturateLow = select i1 %cmpLow, i32 -8388608, i32 %saturateUp
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ret i32 %saturateLow
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}
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; x > -k ? (x > k ? k : x) : -k
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define i32 @sat_lower_upper_2(i32 %x) #0 {
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; CHECK-LABEL: sat_lower_upper_2:
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; CHECK: ssat r0, #24, r0
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entry:
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%cmpLow = icmp sgt i32 %x, -8388608
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%cmpUp = icmp sgt i32 %x, 8388607
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%saturateUp = select i1 %cmpUp, i32 8388607, i32 %x
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%saturateLow = select i1 %cmpLow, i32 %saturateUp, i32 -8388608
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ret i32 %saturateLow
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}
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; x < k ? (x < -k ? -k : x) : k
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define i32 @sat_upper_lower_1(i32 %x) #0 {
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; CHECK-LABEL: sat_upper_lower_1:
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; CHECK: ssat r0, #24, r0
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entry:
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%cmpUp = icmp slt i32 %x, 8388607
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%cmpLow = icmp slt i32 %x, -8388608
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%saturateLow = select i1 %cmpLow, i32 -8388608, i32 %x
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%saturateUp = select i1 %cmpUp, i32 %saturateLow, i32 8388607
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ret i32 %saturateUp
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}
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; x > k ? k : (x < -k ? -k : x)
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define i32 @sat_upper_lower_2(i32 %x) #0 {
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; CHECK-LABEL: sat_upper_lower_2:
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; CHECK: ssat r0, #24, r0
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entry:
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%cmpUp = icmp sgt i32 %x, 8388607
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%cmpLow = icmp slt i32 %x, -8388608
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%saturateLow = select i1 %cmpLow, i32 -8388608, i32 %x
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%saturateUp = select i1 %cmpUp, i32 8388607, i32 %saturateLow
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ret i32 %saturateUp
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}
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; k < x ? k : (x > -k ? x : -k)
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define i32 @sat_upper_lower_3(i32 %x) #0 {
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; CHECK-LABEL: sat_upper_lower_3:
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; CHECK: ssat r0, #24, r0
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entry:
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%cmpUp = icmp slt i32 8388607, %x
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%cmpLow = icmp sgt i32 %x, -8388608
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%saturateLow = select i1 %cmpLow, i32 %x, i32 -8388608
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%saturateUp = select i1 %cmpUp, i32 8388607, i32 %saturateLow
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ret i32 %saturateUp
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}
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;
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; Miscellanea
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;
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; Check that >= and <= work the same as > and <
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; k <= x ? k : (x >= -k ? x : -k)
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define i32 @sat_le_ge(i32 %x) #0 {
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; CHECK-LABEL: sat_le_ge:
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; CHECK: ssat r0, #24, r0
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entry:
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%cmpUp = icmp sle i32 8388607, %x
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%cmpLow = icmp sge i32 %x, -8388608
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%saturateLow = select i1 %cmpLow, i32 %x, i32 -8388608
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%saturateUp = select i1 %cmpUp, i32 8388607, i32 %saturateLow
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ret i32 %saturateUp
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}
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;
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; The following tests check for patterns that should not transform
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; into SSAT but are similar enough that could confuse the selector.
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;
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; x > k ? k : (x > -k ? -k : x)
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; First condition upper-saturates, second doesn't lower-saturate.
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define i32 @no_sat_missing_lower(i32 %x) #0 {
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; CHECK-LABEL: no_sat_missing_lower
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; CHECK-NOT: ssat
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entry:
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%cmpUp = icmp sgt i32 %x, 8388607
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%cmpLow = icmp sgt i32 %x, -8388608
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%saturateLow = select i1 %cmpLow, i32 -8388608, i32 %x
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%saturateUp = select i1 %cmpUp, i32 8388607, i32 %saturateLow
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ret i32 %saturateUp
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}
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; x < k ? k : (x < -k ? -k : x)
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; Second condition lower-saturates, first doesn't upper-saturate.
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define i32 @no_sat_missing_upper(i32 %x) #0 {
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; CHECK-LABEL: no_sat_missing_upper:
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; CHECK-NOT: ssat
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entry:
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%cmpUp = icmp slt i32 %x, 8388607
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%cmpLow = icmp slt i32 %x, -8388608
|
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%saturateLow = select i1 %cmpLow, i32 -8388608, i32 %x
|
||||
%saturateUp = select i1 %cmpUp, i32 8388607, i32 %saturateLow
|
||||
ret i32 %saturateUp
|
||||
}
|
||||
|
||||
; Lower constant is different in the select and in the compare
|
||||
define i32 @no_sat_incorrect_constant(i32 %x) #0 {
|
||||
; CHECK-LABEL: no_sat_incorrect_constant:
|
||||
; CHECK-NOT: ssat
|
||||
entry:
|
||||
%cmpUp = icmp sgt i32 %x, 8388607
|
||||
%cmpLow = icmp slt i32 %x, -8388608
|
||||
%saturateLow = select i1 %cmpLow, i32 -8388607, i32 %x
|
||||
%saturateUp = select i1 %cmpUp, i32 8388607, i32 %saturateLow
|
||||
ret i32 %saturateUp
|
||||
}
|
||||
|
||||
; The interval is not [k, ~k]
|
||||
define i32 @no_sat_incorrect_interval(i32 %x) #0 {
|
||||
; CHECK-LABEL: no_sat_incorrect_interval:
|
||||
; CHECK-NOT: ssat
|
||||
entry:
|
||||
%cmpUp = icmp sgt i32 %x, 8388607
|
||||
%cmpLow = icmp slt i32 %x, -19088744
|
||||
%saturateLow = select i1 %cmpLow, i32 -19088744, i32 %x
|
||||
%saturateUp = select i1 %cmpUp, i32 8388607, i32 %saturateLow
|
||||
ret i32 %saturateUp
|
||||
}
|
||||
|
||||
; The returned value (y) is not the same as the tested value (x).
|
||||
define i32 @no_sat_incorrect_return(i32 %x, i32 %y) #0 {
|
||||
; CHECK-LABEL: no_sat_incorrect_return:
|
||||
; CHECK-NOT: ssat
|
||||
entry:
|
||||
%cmpUp = icmp sgt i32 %x, 8388607
|
||||
%cmpLow = icmp slt i32 %x, -8388608
|
||||
%saturateLow = select i1 %cmpLow, i32 -8388608, i32 %y
|
||||
%saturateUp = select i1 %cmpUp, i32 8388607, i32 %saturateLow
|
||||
ret i32 %saturateUp
|
||||
}
|
||||
|
||||
; One of the values in a compare (y) is not the same as the rest
|
||||
; of the compare and select values (x).
|
||||
define i32 @no_sat_incorrect_compare(i32 %x, i32 %y) #0 {
|
||||
; CHECK-LABEL: no_sat_incorrect_compare:
|
||||
; CHECK-NOT: ssat
|
||||
entry:
|
||||
%cmpUp = icmp sgt i32 %x, 8388607
|
||||
%cmpLow = icmp slt i32 %y, -8388608
|
||||
%saturateLow = select i1 %cmpLow, i32 -8388608, i32 %x
|
||||
%saturateUp = select i1 %cmpUp, i32 8388607, i32 %saturateLow
|
||||
ret i32 %saturateUp
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user