1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 03:02:36 +01:00

Fix to 80-col.

llvm-svn: 107684
This commit is contained in:
Eric Christopher 2010-07-06 18:35:20 +00:00
parent 0e0d4bcfc8
commit 383df15267

View File

@ -55,8 +55,8 @@ protected:
const TargetInstrInfo *tii; const TargetInstrInfo *tii;
const TargetRegisterInfo *tri; const TargetRegisterInfo *tri;
VirtRegMap *vrm; VirtRegMap *vrm;
/// Construct a spiller base. /// Construct a spiller base.
SpillerBase(MachineFunction *mf, LiveIntervals *lis, VirtRegMap *vrm) SpillerBase(MachineFunction *mf, LiveIntervals *lis, VirtRegMap *vrm)
: mf(mf), lis(lis), vrm(vrm) : mf(mf), lis(lis), vrm(vrm)
{ {
@ -97,7 +97,7 @@ protected:
do { do {
++regItr; ++regItr;
} while (regItr != mri->reg_end() && (&*regItr == mi)); } while (regItr != mri->reg_end() && (&*regItr == mi));
// Collect uses & defs for this instr. // Collect uses & defs for this instr.
SmallVector<unsigned, 2> indices; SmallVector<unsigned, 2> indices;
bool hasUse = false; bool hasUse = false;
@ -117,7 +117,7 @@ protected:
vrm->assignVirt2StackSlot(newVReg, ss); vrm->assignVirt2StackSlot(newVReg, ss);
LiveInterval *newLI = &lis->getOrCreateInterval(newVReg); LiveInterval *newLI = &lis->getOrCreateInterval(newVReg);
newLI->weight = HUGE_VALF; newLI->weight = HUGE_VALF;
// Update the reg operands & kill flags. // Update the reg operands & kill flags.
for (unsigned i = 0; i < indices.size(); ++i) { for (unsigned i = 0; i < indices.size(); ++i) {
unsigned mopIdx = indices[i]; unsigned mopIdx = indices[i];
@ -217,7 +217,7 @@ namespace {
/// When a call to spill is placed this spiller will first try to break the /// When a call to spill is placed this spiller will first try to break the
/// interval up into its component values (one new interval per value). /// interval up into its component values (one new interval per value).
/// If this fails, or if a call is placed to spill a previously split interval /// If this fails, or if a call is placed to spill a previously split interval
/// then the spiller falls back on the standard spilling mechanism. /// then the spiller falls back on the standard spilling mechanism.
class SplittingSpiller : public StandardSpiller { class SplittingSpiller : public StandardSpiller {
public: public:
SplittingSpiller(MachineFunction *mf, LiveIntervals *lis, SplittingSpiller(MachineFunction *mf, LiveIntervals *lis,
@ -243,7 +243,7 @@ private:
MachineRegisterInfo *mri; MachineRegisterInfo *mri;
const TargetInstrInfo *tii; const TargetInstrInfo *tii;
const TargetRegisterInfo *tri; const TargetRegisterInfo *tri;
DenseSet<LiveInterval*> alreadySplit; DenseSet<LiveInterval*> alreadySplit;
bool worthTryingToSplit(LiveInterval *li) const { bool worthTryingToSplit(LiveInterval *li) const {
@ -260,18 +260,18 @@ private:
SmallVector<VNInfo*, 4> vnis; SmallVector<VNInfo*, 4> vnis;
std::copy(li->vni_begin(), li->vni_end(), std::back_inserter(vnis)); std::copy(li->vni_begin(), li->vni_end(), std::back_inserter(vnis));
for (SmallVectorImpl<VNInfo*>::iterator vniItr = vnis.begin(), for (SmallVectorImpl<VNInfo*>::iterator vniItr = vnis.begin(),
vniEnd = vnis.end(); vniItr != vniEnd; ++vniItr) { vniEnd = vnis.end(); vniItr != vniEnd; ++vniItr) {
VNInfo *vni = *vniItr; VNInfo *vni = *vniItr;
// Skip unused VNIs. // Skip unused VNIs.
if (vni->isUnused()) if (vni->isUnused())
continue; continue;
DEBUG(dbgs() << " Extracted Val #" << vni->id << " as "); DEBUG(dbgs() << " Extracted Val #" << vni->id << " as ");
LiveInterval *splitInterval = extractVNI(li, vni); LiveInterval *splitInterval = extractVNI(li, vni);
if (splitInterval != 0) { if (splitInterval != 0) {
DEBUG(dbgs() << *splitInterval << "\n"); DEBUG(dbgs() << *splitInterval << "\n");
added.push_back(splitInterval); added.push_back(splitInterval);
@ -283,12 +283,12 @@ private:
} else { } else {
DEBUG(dbgs() << "0\n"); DEBUG(dbgs() << "0\n");
} }
} }
DEBUG(dbgs() << "Original LI: " << *li << "\n"); DEBUG(dbgs() << "Original LI: " << *li << "\n");
// If there original interval still contains some live ranges // If there original interval still contains some live ranges
// add it to added and alreadySplit. // add it to added and alreadySplit.
if (!li->empty()) { if (!li->empty()) {
added.push_back(li); added.push_back(li);
alreadySplit.insert(li); alreadySplit.insert(li);
@ -312,7 +312,7 @@ private:
LiveInterval *newLI = &lis->getOrCreateInterval(newVReg); LiveInterval *newLI = &lis->getOrCreateInterval(newVReg);
VNInfo *newVNI = newLI->createValueCopy(vni, lis->getVNInfoAllocator()); VNInfo *newVNI = newLI->createValueCopy(vni, lis->getVNInfoAllocator());
// Start by copying all live ranges in the VN to the new interval. // Start by copying all live ranges in the VN to the new interval.
for (LiveInterval::iterator rItr = li->begin(), rEnd = li->end(); for (LiveInterval::iterator rItr = li->begin(), rEnd = li->end();
rItr != rEnd; ++rItr) { rItr != rEnd; ++rItr) {
if (rItr->valno == vni) { if (rItr->valno == vni) {
@ -320,7 +320,7 @@ private:
} }
} }
// Erase the old VNI & ranges. // Erase the old VNI & ranges.
li->removeValNo(vni); li->removeValNo(vni);
// Collect all current uses of the register belonging to the given VNI. // Collect all current uses of the register belonging to the given VNI.
@ -367,8 +367,8 @@ private:
newVNI->setIsPHIDef(false); // not a PHI def anymore. newVNI->setIsPHIDef(false); // not a PHI def anymore.
newVNI->setIsDefAccurate(true); newVNI->setIsDefAccurate(true);
} else { } else {
// non-PHI def. Rename the def. If it's two-addr that means renaming the use // non-PHI def. Rename the def. If it's two-addr that means renaming the
// and inserting a new copy too. // use and inserting a new copy too.
MachineInstr *defInst = lis->getInstructionFromIndex(newVNI->def); MachineInstr *defInst = lis->getInstructionFromIndex(newVNI->def);
// We'll rename this now, so we can remove it from uses. // We'll rename this now, so we can remove it from uses.
uses.erase(defInst); uses.erase(defInst);
@ -384,7 +384,7 @@ private:
twoAddrUseIsUndef = true; twoAddrUseIsUndef = true;
} }
} }
SlotIndex defIdx = lis->getInstructionIndex(defInst); SlotIndex defIdx = lis->getInstructionIndex(defInst);
newVNI->def = defIdx.getDefIndex(); newVNI->def = defIdx.getDefIndex();
@ -402,9 +402,9 @@ private:
true, lis->getVNInfoAllocator()); true, lis->getVNInfoAllocator());
LiveRange copyRange(copyIdx.getDefIndex(),defIdx.getDefIndex(),copyVNI); LiveRange copyRange(copyIdx.getDefIndex(),defIdx.getDefIndex(),copyVNI);
newLI->addRange(copyRange); newLI->addRange(copyRange);
} }
} }
for (std::set<MachineInstr*>::iterator for (std::set<MachineInstr*>::iterator
usesItr = uses.begin(), usesEnd = uses.end(); usesItr = uses.begin(), usesEnd = uses.end();
usesItr != usesEnd; ++usesItr) { usesItr != usesEnd; ++usesItr) {
@ -424,7 +424,7 @@ private:
// Check if this instr is two address. // Check if this instr is two address.
unsigned useOpIdx = useInst->findRegisterUseOperandIdx(li->reg); unsigned useOpIdx = useInst->findRegisterUseOperandIdx(li->reg);
bool isTwoAddress = useInst->isRegTiedToDefOperand(useOpIdx); bool isTwoAddress = useInst->isRegTiedToDefOperand(useOpIdx);
// Rename uses (and defs for two-address instrs). // Rename uses (and defs for two-address instrs).
for (unsigned i = 0; i < useInst->getNumOperands(); ++i) { for (unsigned i = 0; i < useInst->getNumOperands(); ++i) {
MachineOperand &mo = useInst->getOperand(i); MachineOperand &mo = useInst->getOperand(i);
@ -440,8 +440,8 @@ private:
// reg. // reg.
MachineBasicBlock *useMBB = useInst->getParent(); MachineBasicBlock *useMBB = useInst->getParent();
MachineBasicBlock::iterator useItr(useInst); MachineBasicBlock::iterator useItr(useInst);
tii->copyRegToReg(*useMBB, llvm::next(useItr), li->reg, newVReg, trc, trc, tii->copyRegToReg(*useMBB, llvm::next(useItr), li->reg, newVReg, trc,
DebugLoc()); trc, DebugLoc());
MachineInstr *copyMI = llvm::next(useItr); MachineInstr *copyMI = llvm::next(useItr);
copyMI->addRegisterKilled(newVReg, tri); copyMI->addRegisterKilled(newVReg, tri);
SlotIndex copyIdx = lis->InsertMachineInstrInMaps(copyMI); SlotIndex copyIdx = lis->InsertMachineInstrInMaps(copyMI);