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[PowerPC] Remove unnecessary patterns and types
These patterns and type uses were added by mistake by commit 1372e23c7d4b25fd23689842246e66f70c949b46
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@ -747,7 +747,7 @@ let mayLoad = 1, mayStore = 0, Predicates = [PairedVectorMemops] in {
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IIC_LdStLFD, []>;
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def LXVPX : XForm_XTp5_XAB5<31, 333, (outs vsrprc:$XTp), (ins memrr:$src),
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"lxvpx $XTp, $src", IIC_LdStLFD,
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[(set v4i64:$XTp, (load xaddr:$src))]>;
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[]>;
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let Predicates = [PrefixInstrs] in {
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defm PLXVP :
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8LS_DForm_R_XTp5_SI34_MEM_p<1, 58, (outs vsrprc:$XTp), (ins memri34:$D_RA),
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@ -762,7 +762,7 @@ let mayLoad = 0, mayStore = 1, Predicates = [PairedVectorMemops] in {
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IIC_LdStLFD, []>;
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def STXVPX : XForm_XTp5_XAB5<31, 461, (outs), (ins vsrprc:$XTp, memrr:$dst),
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"stxvpx $XTp, $dst", IIC_LdStLFD,
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[(store v4i64:$XTp, xaddr:$dst)]>;
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[]>;
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let Predicates = [PrefixInstrs] in {
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defm PSTXVP :
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8LS_DForm_R_XTp5_SI34_MEM_p<1, 62, (outs), (ins vsrprc:$XTp, memri34:$D_RA),
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@ -399,7 +399,7 @@ def CARRYRC : RegisterClass<"PPC", [i32], 32, (add CARRY, XER)> {
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// Allocate in the same order as the underlying VSX registers.
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def VSRpRC :
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RegisterClass<"PPC", [v4i64,v4f64,v8i32,v8f32,v16i16,v32i8,v256i1], 128,
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RegisterClass<"PPC", [v256i1], 128,
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(add (sequence "VSRp%u", 0, 6),
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(sequence "VSRp%u", 15, 7), VSRp17, VSRp18,
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VSRp16, VSRp19, VSRp20, VSRp21, VSRp22, VSRp23,
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