From 38b77a1ef8d184e0809847b7812b6fb807f00350 Mon Sep 17 00:00:00 2001
From: Vasileios Kalintiris <Vasileios.Kalintiris@imgtec.com>
Date: Fri, 27 Feb 2015 09:01:39 +0000
Subject: [PATCH] [mips] Account for constant-zero operands in ADDE nodes.

Summary:
We identify the cases where the operand to an ADDE node is a constant
zero. In such cases, we can avoid generating an extra ADDu instruction
disguised as an identity move alias (ie. addu $r, $r, 0 --> move $r, $r).

Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7906

llvm-svn: 230742
---
 lib/Target/Mips/MipsSEISelDAGToDAG.cpp        |  8 +++--
 .../Mips/check-adde-redundant-moves.ll        | 35 +++++++++++++++++++
 2 files changed, 41 insertions(+), 2 deletions(-)
 create mode 100644 test/CodeGen/Mips/check-adde-redundant-moves.ll

diff --git a/lib/Target/Mips/MipsSEISelDAGToDAG.cpp b/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
index 0761ded9ccb..4da30bece9e 100644
--- a/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
+++ b/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
@@ -258,8 +258,12 @@ SDNode *MipsSEDAGToDAGISel::selectAddESubE(unsigned MOp, SDValue InFlag,
                                    CurDAG->getTargetConstant(Mips::sub_32, VT));
   }
 
-  SDNode *AddCarry = CurDAG->getMachineNode(ADDuOp, DL, VT,
-                                            SDValue(Carry, 0), RHS);
+  // Generate a second addition only if we know that RHS is not a
+  // constant-zero node.
+  SDNode *AddCarry = Carry;
+  ConstantSDNode *C = dyn_cast<ConstantSDNode>(RHS);
+  if (!C || C->getZExtValue())
+    AddCarry = CurDAG->getMachineNode(ADDuOp, DL, VT, SDValue(Carry, 0), RHS);
 
   return CurDAG->SelectNodeTo(Node, MOp, VT, MVT::Glue, LHS,
                               SDValue(AddCarry, 0));
diff --git a/test/CodeGen/Mips/check-adde-redundant-moves.ll b/test/CodeGen/Mips/check-adde-redundant-moves.ll
new file mode 100644
index 00000000000..7bc63a494ac
--- /dev/null
+++ b/test/CodeGen/Mips/check-adde-redundant-moves.ll
@@ -0,0 +1,35 @@
+; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \
+; RUN:    -check-prefix=ALL -check-prefix=GP32
+; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \
+; RUN:    -check-prefix=ALL -check-prefix=GP32
+; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \
+; RUN:    -check-prefix=ALL -check-prefix=GP32
+; RUN: llc < %s -march=mips -mcpu=mips32r3 | FileCheck %s \
+; RUN:    -check-prefix=ALL -check-prefix=GP32
+; RUN: llc < %s -march=mips -mcpu=mips32r5 | FileCheck %s \
+; RUN:    -check-prefix=ALL -check-prefix=GP32
+; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \
+; RUN:    -check-prefix=ALL -check-prefix=GP32
+; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s -check-prefix=ALL
+; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s -check-prefix=ALL
+; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s -check-prefix=ALL
+; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s -check-prefix=ALL
+; RUN: llc < %s -march=mips64 -mcpu=mips64r3 | FileCheck %s -check-prefix=ALL
+; RUN: llc < %s -march=mips64 -mcpu=mips64r5 | FileCheck %s -check-prefix=ALL
+; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s -check-prefix=ALL
+
+define i64 @add_i64(i64 %a) {
+  ; GP32-LABEL: add_i64
+
+  ; GP32-NOT:    move $[[T0:[0-9]+]], $[[T0]]
+  %r = add i64 5, %a
+  ret i64 %r
+}
+
+define i128 @add_i128(i128 %a) {
+  ; ALL-LABEL: add_i128
+
+  ; ALL-NOT:    move $[[T0:[0-9]+]], $[[T0]]
+  %r = add i128 5, %a
+  ret i128 %r
+}