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[llvm] Remove redundant return and continue statements (NFC)
Identified with readability-redundant-control-flow.
This commit is contained in:
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b67b152ce0
commit
39185b091b
@ -67,7 +67,6 @@ public:
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UsedRegUnits.addReg(Reg);
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}
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}
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return;
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}
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/// Initialize and clear the set.
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@ -1751,7 +1751,6 @@ void SwingSchedulerDAG::checkNodeSets(NodeSetType &NodeSets) {
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}
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NodeSets.clear();
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LLVM_DEBUG(dbgs() << "Clear recurrence node-sets\n");
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return;
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}
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/// Add the nodes that do not belong to a recurrence set into groups
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@ -649,5 +649,4 @@ void SpecialTableSymbolNode::output(OutputStream &OS, OutputFlags Flags) const {
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TargetName->output(OS, Flags);
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OS << "'}";
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}
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return;
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}
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@ -2318,7 +2318,6 @@ bool FileCheckString::CheckNot(const SourceMgr &SM, StringRef Buffer,
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PrintMatch(false, SM, Prefix, Pat->getLoc(), *Pat, 1, Buffer, Pos, MatchLen,
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Req, Diags);
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DirectiveFail = true;
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continue;
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}
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return DirectiveFail;
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@ -1769,7 +1769,6 @@ void llvm::UpgradeInlineAsmString(std::string *AsmStr) {
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(Pos = AsmStr->find("# marker")) != std::string::npos) {
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AsmStr->replace(Pos, 1, ";");
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}
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return;
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}
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/// Upgrade a call to an old intrinsic. All argument and return casting must be
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@ -501,7 +501,6 @@ void PrintIRInstrumentation::printBeforePass(StringRef PassID, Any IR) {
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SmallString<20> Banner = formatv("*** IR Dump Before {0} ***", PassID);
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unwrapAndPrint(dbgs(), IR, Banner, forcePrintModuleIR());
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return;
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}
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void PrintIRInstrumentation::printAfterPass(StringRef PassID, Any IR) {
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@ -685,8 +685,6 @@ void expand_tilde(const Twine &path, SmallVectorImpl<char> &dest) {
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path.toVector(dest);
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expandTildeExpr(dest);
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return;
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}
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static file_type typeForMode(mode_t Mode) {
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@ -3955,7 +3955,6 @@ void selectGatherScatterAddrMode(SDValue &BasePtr, SDValue &Index, EVT MemVT,
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Opcode = NewOp;
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BasePtr = Index->getOperand(0);
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Index = ConstOffset;
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return;
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}
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SDValue AArch64TargetLowering::LowerMGATHER(SDValue Op,
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@ -1873,7 +1873,6 @@ void AArch64InstructionSelector::materializeLargeCMVal(
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AArch64II::MO_G1 | AArch64II::MO_NC, 16, 0);
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DstReg = BuildMovK(DstReg, AArch64II::MO_G2 | AArch64II::MO_NC, 32, 0);
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BuildMovK(DstReg, AArch64II::MO_G3, 48, I.getOperand(0).getReg());
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return;
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}
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bool AArch64InstructionSelector::preISelLower(MachineInstr &I) {
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@ -58,7 +58,6 @@ void AMDGPUAsmBackend::relaxInstruction(MCInst &Inst,
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Res.setOpcode(RelaxedOpcode);
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Res.addOperand(Inst.getOperand(0));
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Inst = std::move(Res);
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return;
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}
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bool AMDGPUAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup,
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@ -3087,7 +3087,6 @@ public:
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// This is container for the immediate that we will create the constant
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// pool from
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addExpr(Inst, getConstantPoolImm());
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return;
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}
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void addMemTBBOperands(MCInst &Inst, unsigned N) const {
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@ -853,7 +853,6 @@ void MVEGatherScatterLowering::pushOutMul(PHINode *&Phi,
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Phi->addIncoming(NewIncrement, Phi->getIncomingBlock(LoopIncrement));
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Phi->removeIncomingValue((unsigned)0);
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Phi->removeIncomingValue((unsigned)0);
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return;
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}
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// Check whether all usages of this instruction are as offsets of
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@ -494,8 +494,6 @@ void BPFDAGToDAGISel::PreprocessTrunc(SDNode *Node,
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CurDAG->ReplaceAllUsesWith(SDValue(Node, 0), BaseV);
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I++;
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CurDAG->DeleteNode(Node);
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return;
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}
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FunctionPass *llvm::createBPFISelDag(BPFTargetMachine &TM) {
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@ -13805,7 +13805,6 @@ static void fixupShuffleMaskForPermutedSToV(SmallVectorImpl<int> &ShuffV,
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if ((Idx >= 0 && Idx < LHSMaxIdx) || (Idx >= RHSMinIdx && Idx < RHSMaxIdx))
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ShuffV[i] += HalfVec;
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}
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return;
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}
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// Replace a SCALAR_TO_VECTOR with a SCALAR_TO_VECTOR_PERMUTED except if
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@ -165,7 +165,6 @@ void RISCVInstPrinter::printAtomicMemOp(const MCInst *MI, unsigned OpNo,
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O << "(";
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printRegName(O, MO.getReg());
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O << ")";
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return;
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}
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void RISCVInstPrinter::printVTypeI(const MCInst *MI, unsigned OpNo,
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@ -981,5 +981,4 @@ void X86FlagsCopyLoweringPass::rewriteSetCC(MachineBasicBlock &TestMBB,
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MIB.setMemRefs(SetCCI.memoperands());
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SetCCI.eraseFromParent();
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return;
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}
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@ -95,7 +95,6 @@ struct LVIThunkInserter : ThunkInserter<LVIThunkInserter> {
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BuildMI(&MF.front(), DebugLoc(), TII->get(X86::LFENCE));
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BuildMI(&MF.front(), DebugLoc(), TII->get(X86::JMP64r)).addReg(X86::R11);
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MF.front().addLiveIn(X86::R11);
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return;
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}
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};
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@ -69,7 +69,6 @@ void InterfaceFile::addParentUmbrella(const Target &Target_, StringRef Parent) {
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}
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ParentUmbrellas.emplace(Iter, Target_, std::string(Parent));
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return;
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}
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void InterfaceFile::addUUID(const Target &Target_, StringRef UUID) {
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@ -83,7 +82,6 @@ void InterfaceFile::addUUID(const Target &Target_, StringRef UUID) {
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}
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UUIDs.emplace(Iter, Target_, std::string(UUID));
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return;
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}
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void InterfaceFile::addUUID(const Target &Target, uint8_t UUID[16]) {
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@ -2011,8 +2011,6 @@ static void sinkSpillUsesAfterCoroBegin(Function &F,
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Instruction *InsertPt = CoroBegin->getNextNode();
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for (Instruction *Inst : InsertionList)
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Inst->moveBefore(InsertPt);
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return;
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}
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/// For each local variable that all of its user are only used inside one of
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@ -3499,7 +3499,6 @@ struct AADereferenceableImpl : AADereferenceable {
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State.addAccessedBytes(Offset, Size);
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}
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}
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return;
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}
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/// See followUsesInMBEC
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@ -1127,8 +1127,6 @@ void createSwitchStatement(Module &M, OutlinableGroup &OG, BasicBlock *EndBB,
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Term->moveBefore(*EndBB, EndBB->end());
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OutputBlock->eraseFromParent();
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}
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return;
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}
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/// Fill the new function that will serve as the replacement function for all of
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@ -1134,7 +1134,6 @@ private:
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RFI.foreachUse(SCC, CheckGlobalization);
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}
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return;
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}
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/// Maps the values stored in the offload arrays passed as arguments to
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@ -2214,6 +2214,4 @@ void DevirtIndex::run() {
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if (PrintSummaryDevirt)
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for (const auto &DT : DevirtTargets)
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errs() << "Devirtualized call to " << DT << "\n";
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return;
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}
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@ -1809,7 +1809,6 @@ public:
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for (Value *Op : cast<Instruction>(V)->operand_values())
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collectSharedInfo(Leaf, Op, ExprsInSubprogram, Shared);
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return;
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}
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/// Calculate the number of exclusive and shared op counts for expression
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@ -63,7 +63,6 @@ void CodeRegions::beginRegion(StringRef Description, SMLoc Loc) {
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ActiveRegions[Description] = Regions.size();
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Regions.emplace_back(std::make_unique<CodeRegion>(Description, Loc));
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return;
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}
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void CodeRegions::endRegion(StringRef Description, SMLoc Loc) {
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@ -1907,7 +1907,6 @@ void DumpOutputStyle::dumpSectionHeaders(StringRef Label, DbgHeaderType Type) {
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P.getIndentLevel(), Header.Characteristics, 1, ""));
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++I;
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}
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return;
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}
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Error DumpOutputStyle::dumpSectionContribs() {
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@ -2254,7 +2254,6 @@ static void dumpHotFunctionList(const std::vector<std::string> &ColumnTitle,
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FOS.PadToColumn(ColumnOffset[3]);
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FOS << R.FuncName << "\n";
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}
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return;
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}
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static int
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@ -108,8 +108,6 @@ void ProfiledBinary::load() {
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ProEpilogTracker.inferEpilogOffsets(RetAddrs);
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// TODO: decode other sections.
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return;
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}
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bool ProfiledBinary::inlineContextEqual(uint64_t Address1,
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@ -571,8 +571,6 @@ void X86FoldTablesEmitter::updateTables(const CodeGenInstruction *RegInstr,
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getRegOperandSize(RegOpRec) == getMemOperandSize(MemOpRec))
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addEntryWithFlags(Table0, RegInstr, MemInstr, S, 0);
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}
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return;
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}
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void X86FoldTablesEmitter::run(formatted_raw_ostream &OS) {
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