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Revert trunc(lshr (sext A), Cst) to ashr A, Cst
This reverts commit r246997, it introduced a regression (PR24763). llvm-svn: 247180
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@ -498,26 +498,6 @@ Instruction *InstCombiner::visitTrunc(TruncInst &CI) {
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return CastInst::CreateIntegerCast(Shift, CI.getType(), false);
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}
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// Transform trunc(lshr (sext A), Cst) to ashr A, Cst to eliminate type
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// conversion.
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// It works because bits coming from sign extension have the same value as
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// sign bit of the original value; performing ashr instead of lshr
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// generates bits of the same value as the sign bit.
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if (Src->hasOneUse() &&
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match(Src, m_LShr(m_SExt(m_Value(A)), m_ConstantInt(Cst))) &&
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cast<Instruction>(Src)->getOperand(0)->hasOneUse()) {
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const unsigned ASize = A->getType()->getPrimitiveSizeInBits();
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// This optimization can be only performed when zero bits generated by
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// the original lshr aren't pulled into the value after truncation, so we
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// can only shift by values smaller then the size of destination type (in
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// bits).
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if (Cst->getValue().ult(ASize)) {
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Value *Shift = Builder->CreateAShr(A, Cst->getZExtValue());
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Shift->takeName(Src);
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return CastInst::CreateIntegerCast(Shift, CI.getType(), false);
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}
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}
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// Transform "trunc (and X, cst)" -> "and (trunc X), cst" so long as the dest
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// type isn't non-native.
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if (Src->hasOneUse() && isa<IntegerType>(Src->getType()) &&
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@ -1062,43 +1062,6 @@ define i8 @test85(i32 %a) {
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; CHECK: [[CST:%.*]] = trunc i32 [[SHR]] to i8
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}
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define i16 @test86(i16 %v) {
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%a = sext i16 %v to i32
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%s = ashr i32 %a, 4
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%t = trunc i32 %s to i16
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ret i16 %t
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; CHECK-LABEL: @test86(
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; CHECK: [[ASHR:%.*]] = ashr i16 %v, 4
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; CHECK-NEXT: ret i16 [[ASHR]]
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}
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define i16 @test87(i16 %v) {
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%c = sext i16 %v to i32
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%m = mul nsw i32 %c, 16
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%a = ashr i32 %m, 16
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%t = trunc i32 %a to i16
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ret i16 %t
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; CHECK-LABEL: @test87(
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; CHECK: [[ASHR:%.*]] = ashr i16 %v, 12
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; CHECK-NEXT: ret i16 [[ASHR]]
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}
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define i16 @test88(i16 %v) {
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%a = sext i16 %v to i32
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%s = ashr i32 %a, 18
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%t = trunc i32 %s to i16
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ret i16 %t
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; Do not optimize to ashr i16 (shift by 18)
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; CHECK-LABEL: @test88(
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; CHECK: [[SEXT:%.*]] = sext i16 %v to i32
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; CHECK-NEXT: [[ASHR:%.*]] = ashr i32 [[SEXT]], 18
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[ASHR]] to i16
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; CHECK-NEXT: ret i16 [[TRUNC]]
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}
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; Overflow on a float to int or int to float conversion is undefined (PR21130).
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define i8 @overflow_fptosi() {
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