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Hexagon: Sync TSFlags in MCTargetDesc/HexagonBaseInfo.h with

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HexagonInstrFormats.td.

llvm-svn: 175537
This commit is contained in:
Jyotsna Verma 2013-02-19 18:18:36 +00:00
parent e94a9e6d14
commit 3b0f6f5216
1 changed files with 60 additions and 28 deletions
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88
lib/Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h
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@ -17,6 +17,9 @@
#ifndef HEXAGONBASEINFO_H #ifndef HEXAGONBASEINFO_H
#define HEXAGONBASEINFO_H #define HEXAGONBASEINFO_H
#include "HexagonMCTargetDesc.h"
#include "llvm/Support/ErrorHandling.h"
namespace llvm { namespace llvm {
/// HexagonII - This namespace holds all of the target specific flags that /// HexagonII - This namespace holds all of the target specific flags that
@ -28,19 +31,19 @@ namespace HexagonII {
// Insn types. // Insn types.
// *** Must match HexagonInstrFormat*.td *** // *** Must match HexagonInstrFormat*.td ***
enum Type { enum Type {
TypePSEUDO = 0, TypePSEUDO = 0,
TypeALU32 = 1, TypeALU32 = 1,
TypeCR = 2, TypeCR = 2,
TypeJR = 3, TypeJR = 3,
TypeJ = 4, TypeJ = 4,
TypeLD = 5, TypeLD = 5,
TypeST = 6, TypeST = 6,
TypeSYSTEM = 7, TypeSYSTEM = 7,
TypeXTYPE = 8, TypeXTYPE = 8,
TypeMEMOP = 9, TypeMEMOP = 9,
TypeNV = 10, TypeNV = 10,
TypePREFIX = 30, // Such as extenders. TypePREFIX = 30, // Such as extenders.
TypeMARKER = 31 // Such as end of a HW loop. TypeENDLOOP = 31 // Such as end of a HW loop.
}; };
enum SubTarget { enum SubTarget {
@ -65,6 +68,14 @@ namespace HexagonII {
BaseRegOffset = 5 // Indirect with register offset BaseRegOffset = 5 // Indirect with register offset
}; };
enum MemAccessSize {
NoMemAccess = 0, // Not a memory acces instruction.
ByteAccess = 1, // Byte access instruction (memb).
HalfWordAccess = 2, // Half word access instruction (memh).
WordAccess = 3, // Word access instrution (memw).
DoubleWordAccess = 4 // Double word access instruction (memd)
};
// MCInstrDesc TSFlags // MCInstrDesc TSFlags
// *** Must match HexagonInstrFormat*.td *** // *** Must match HexagonInstrFormat*.td ***
enum { enum {
@ -79,46 +90,67 @@ namespace HexagonII {
// Predicated instructions. // Predicated instructions.
PredicatedPos = 6, PredicatedPos = 6,
PredicatedMask = 0x1, PredicatedMask = 0x1,
PredicatedNewPos = 7, PredicatedFalsePos = 7,
PredicatedFalseMask = 0x1,
PredicatedNewPos = 8,
PredicatedNewMask = 0x1, PredicatedNewMask = 0x1,
// Stores that can be newified. // New-Value consumer instructions.
mayNVStorePos = 8, NewValuePos = 9,
NewValueMask = 0x1,
// New-Value producer instructions.
hasNewValuePos = 10,
hasNewValueMask = 0x1,
// Which operand consumes or produces a new value.
NewValueOpPos = 11,
NewValueOpMask = 0x7,
// Which bits encode the new value.
NewValueBitsPos = 14,
NewValueBitsMask = 0x3,
// Stores that can become new-value stores.
mayNVStorePos = 16,
mayNVStoreMask = 0x1, mayNVStoreMask = 0x1,
// Dot new value store instructions. // New-value store instructions.
NVStorePos = 9, NVStorePos = 17,
NVStoreMask = 0x1, NVStoreMask = 0x1,
// Extendable insns. // Extendable insns.
ExtendablePos = 10, ExtendablePos = 18,
ExtendableMask = 0x1, ExtendableMask = 0x1,
// Insns must be extended. // Insns must be extended.
ExtendedPos = 11, ExtendedPos = 19,
ExtendedMask = 0x1, ExtendedMask = 0x1,
// Which operand may be extended. // Which operand may be extended.
ExtendableOpPos = 12, ExtendableOpPos = 20,
ExtendableOpMask = 0x7, ExtendableOpMask = 0x7,
// Signed or unsigned range. // Signed or unsigned range.
ExtentSignedPos = 15, ExtentSignedPos = 23,
ExtentSignedMask = 0x1, ExtentSignedMask = 0x1,
// Number of bits of range before extending operand. // Number of bits of range before extending operand.
ExtentBitsPos = 16, ExtentBitsPos = 24,
ExtentBitsMask = 0x1f, ExtentBitsMask = 0x1f,
// Valid subtargets // Valid subtargets
validSubTargetPos = 21, validSubTargetPos = 29,
validSubTargetMask = 0xf, validSubTargetMask = 0xf,
// Addressing mode for load/store instructions // Addressing mode for load/store instructions.
AddrModePos = 25, AddrModePos = 33,
AddrModeMask = 0xf AddrModeMask = 0x7,
}; // Access size of memory access instructions (load/store).
MemAccessSizePos = 36,
MemAccesSizeMask = 0x7
};
// *** The code above must match HexagonInstrFormat*.td *** // // *** The code above must match HexagonInstrFormat*.td *** //