diff --git a/test/CodeGen/Thumb2/thumb2-ifcvt1.ll b/test/CodeGen/Thumb2/thumb2-ifcvt1.ll
index 1f69ac34634..78be507943b 100644
--- a/test/CodeGen/Thumb2/thumb2-ifcvt1.ll
+++ b/test/CodeGen/Thumb2/thumb2-ifcvt1.ll
@@ -1,15 +1,19 @@
-; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s
-; RUN: llc < %s -mtriple=thumbv7-apple-darwin -arm-default-it | FileCheck %s
-; RUN: llc < %s -mtriple=thumbv8 -arm-no-restrict-it | FileCheck %s
-; RUN: llc < %s -mtriple=thumbv8 -arm-no-restrict-it -enable-tail-merge=0 | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefixes=ALL,V01
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -arm-default-it | FileCheck %s --check-prefixes=ALL,V01
+; RUN: llc < %s -mtriple=thumbv8 -arm-no-restrict-it | FileCheck %s --check-prefixes=ALL,V23,V2
+; RUN: llc < %s -mtriple=thumbv8 -arm-no-restrict-it -enable-tail-merge=0 | FileCheck %s --check-prefixes=ALL,V23,V3
+
 define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) nounwind {
-; CHECK-LABEL: t1:
-; CHECK: ittee ne
-; CHECK: cmpne
-; CHECK: addne
-; CHECK: addeq
-; CHECK: addeq
-; CHECK: bx lr
+; ALL-LABEL: t1:
+; ALL:       @ %bb.0:
+; ALL-NEXT:    cmp r2, #7
+; ALL-NEXT:    ittee ne
+; ALL-NEXT:    cmpne r2, #1
+; ALL-NEXT:    addne r0, r1
+; ALL-NEXT:    addeq r0, r1
+; ALL-NEXT:    addeq r0, #1
+; ALL-NEXT:    bx lr
 	switch i32 %c, label %cond_next [
 		 i32 1, label %cond_true
 		 i32 7, label %cond_true
@@ -26,11 +30,54 @@ cond_next:
 }
 
 define i32 @t2(i32 %a, i32 %b) nounwind {
+; V01-LABEL: t2:
+; V01:       @ %bb.0: @ %entry
+; V01-NEXT:    cmp r0, r1
+; V01-NEXT:    it eq
+; V01-NEXT:    bxeq lr
+; V01-NEXT:  LBB1_1: @ %bb
+; V01-NEXT:    @ =>This Inner Loop Header: Depth=1
+; V01-NEXT:    cmp r0, r1
+; V01-NEXT:    ite gt
+; V01-NEXT:    subgt r0, r0, r1
+; V01-NEXT:    suble r1, r1, r0
+; V01-NEXT:    cmp r1, r0
+; V01-NEXT:    bne LBB1_1
+; V01-NEXT:  @ %bb.2: @ %bb17
+; V01-NEXT:    bx lr
+;
+; V2-LABEL: t2:
+; V2:       @ %bb.0: @ %entry
+; V2-NEXT:    cmp r0, r1
+; V2-NEXT:    it eq
+; V2-NEXT:    bxeq lr
+; V2-NEXT:  .LBB1_1: @ %bb
+; V2-NEXT:    @ =>This Inner Loop Header: Depth=1
+; V2-NEXT:    cmp r0, r1
+; V2-NEXT:    ite gt
+; V2-NEXT:    subgt r0, r0, r1
+; V2-NEXT:    suble r1, r1, r0
+; V2-NEXT:    cmp r1, r0
+; V2-NEXT:    bne .LBB1_1
+; V2-NEXT:  @ %bb.2: @ %bb17
+; V2-NEXT:    bx lr
+;
+; V3-LABEL: t2:
+; V3:       @ %bb.0: @ %entry
+; V3-NEXT:    cmp r0, r1
+; V3-NEXT:    it eq
+; V3-NEXT:    bxeq lr
+; V3-NEXT:  .LBB1_1: @ %bb
+; V3-NEXT:    @ =>This Inner Loop Header: Depth=1
+; V3-NEXT:    cmp r0, r1
+; V3-NEXT:    ite le
+; V3-NEXT:    suble r1, r1, r0
+; V3-NEXT:    subgt r0, r0, r1
+; V3-NEXT:    cmp r1, r0
+; V3-NEXT:    bne .LBB1_1
+; V3-NEXT:  @ %bb.2: @ %bb17
+; V3-NEXT:    bx lr
 entry:
-; CHECK-LABEL: t2:
-; CHECK: ite {{gt|le}}
-; CHECK-DAG: suble
-; CHECK-DAG: subgt
 	%tmp1434 = icmp eq i32 %a, %b		; <i1> [#uses=1]
 	br i1 %tmp1434, label %bb17, label %bb.outer
 
@@ -64,11 +111,75 @@ bb17:		; preds = %cond_false, %cond_true, %entry
 }
 
 define i32 @t2_nomerge(i32 %a, i32 %b) nounwind {
+; V01-LABEL: t2_nomerge:
+; V01:       @ %bb.0: @ %entry
+; V01-NEXT:    cmp r0, r1
+; V01-NEXT:    it eq
+; V01-NEXT:    bxeq lr
+; V01-NEXT:  LBB2_1: @ %bb
+; V01-NEXT:    @ =>This Inner Loop Header: Depth=1
+; V01-NEXT:    cmp r0, r1
+; V01-NEXT:    ble LBB2_3
+; V01-NEXT:  @ %bb.2: @ %cond_true
+; V01-NEXT:    @ in Loop: Header=BB2_1 Depth=1
+; V01-NEXT:    subs r0, r0, r1
+; V01-NEXT:    cmp r1, r0
+; V01-NEXT:    bne LBB2_1
+; V01-NEXT:    b LBB2_4
+; V01-NEXT:  LBB2_3: @ %cond_false
+; V01-NEXT:    @ in Loop: Header=BB2_1 Depth=1
+; V01-NEXT:    subs r1, r1, r0
+; V01-NEXT:    cmp r0, #0
+; V01-NEXT:    bne LBB2_1
+; V01-NEXT:  LBB2_4: @ %bb17
+; V01-NEXT:    bx lr
+;
+; V2-LABEL: t2_nomerge:
+; V2:       @ %bb.0: @ %entry
+; V2-NEXT:    cmp r0, r1
+; V2-NEXT:    it eq
+; V2-NEXT:    bxeq lr
+; V2-NEXT:  .LBB2_1: @ %bb
+; V2-NEXT:    @ =>This Inner Loop Header: Depth=1
+; V2-NEXT:    cmp r0, r1
+; V2-NEXT:    ble .LBB2_3
+; V2-NEXT:  @ %bb.2: @ %cond_true
+; V2-NEXT:    @ in Loop: Header=BB2_1 Depth=1
+; V2-NEXT:    subs r0, r0, r1
+; V2-NEXT:    cmp r1, r0
+; V2-NEXT:    bne .LBB2_1
+; V2-NEXT:    b .LBB2_4
+; V2-NEXT:  .LBB2_3: @ %cond_false
+; V2-NEXT:    @ in Loop: Header=BB2_1 Depth=1
+; V2-NEXT:    subs r1, r1, r0
+; V2-NEXT:    cmp r0, #0
+; V2-NEXT:    bne .LBB2_1
+; V2-NEXT:  .LBB2_4: @ %bb17
+; V2-NEXT:    bx lr
+;
+; V3-LABEL: t2_nomerge:
+; V3:       @ %bb.0: @ %entry
+; V3-NEXT:    cmp r0, r1
+; V3-NEXT:    beq .LBB2_4
+; V3-NEXT:    b .LBB2_2
+; V3-NEXT:  .LBB2_1: @ %cond_true
+; V3-NEXT:    @ in Loop: Header=BB2_2 Depth=1
+; V3-NEXT:    subs r0, r0, r1
+; V3-NEXT:    cmp r1, r0
+; V3-NEXT:    it eq
+; V3-NEXT:    bxeq lr
+; V3-NEXT:  .LBB2_2: @ %bb
+; V3-NEXT:    @ =>This Inner Loop Header: Depth=1
+; V3-NEXT:    cmp r0, r1
+; V3-NEXT:    bgt .LBB2_1
+; V3-NEXT:  @ %bb.3: @ %cond_false
+; V3-NEXT:    @ in Loop: Header=BB2_2 Depth=1
+; V3-NEXT:    subs r1, r1, r0
+; V3-NEXT:    cmp r0, #0
+; V3-NEXT:    bne .LBB2_2
+; V3-NEXT:  .LBB2_4: @ %bb17
+; V3-NEXT:    bx lr
 entry:
-; CHECK-LABEL: t2_nomerge:
-; CHECK-NOT: ite {{gt|le}}
-; CHECK-NOT: suble
-; CHECK-NOT: subgt
 	%tmp1434 = icmp eq i32 %a, %b		; <i1> [#uses=1]
 	br i1 %tmp1434, label %bb17, label %bb.outer
 
@@ -104,6 +215,24 @@ bb17:		; preds = %cond_false, %cond_true, %entry
 @x = external global i32*		; <i32**> [#uses=1]
 
 define void @foo(i32 %a) nounwind {
+; V01-LABEL: foo:
+; V01:       @ %bb.0: @ %entry
+; V01-NEXT:    movw r1, :lower16:(L_x$non_lazy_ptr-(LPC3_0+4))
+; V01-NEXT:    movt r1, :upper16:(L_x$non_lazy_ptr-(LPC3_0+4))
+; V01-NEXT:  LPC3_0:
+; V01-NEXT:    add r1, pc
+; V01-NEXT:    ldr r1, [r1]
+; V01-NEXT:    ldr r1, [r1]
+; V01-NEXT:    str r0, [r1]
+; V01-NEXT:    bx lr
+;
+; V23-LABEL: foo:
+; V23:       @ %bb.0: @ %entry
+; V23-NEXT:    movw r1, :lower16:x
+; V23-NEXT:    movt r1, :upper16:x
+; V23-NEXT:    ldr r1, [r1]
+; V23-NEXT:    str r0, [r1]
+; V23-NEXT:    bx lr
 entry:
 	%tmp = load i32*, i32** @x		; <i32*> [#uses=1]
 	store i32 %a, i32* %tmp
@@ -111,12 +240,29 @@ entry:
 }
 
 define void @t3(i32 %a, i32 %b) nounwind {
+; V01-LABEL: t3:
+; V01:       @ %bb.0: @ %entry
+; V01-NEXT:    cmp r0, #11
+; V01-NEXT:    it lt
+; V01-NEXT:    bxlt lr
+; V01-NEXT:  LBB4_1: @ %cond_true
+; V01-NEXT:    str lr, [sp, #-4]!
+; V01-NEXT:    mov r0, r1
+; V01-NEXT:    bl _foo
+; V01-NEXT:    ldr lr, [sp], #4
+; V01-NEXT:    bx lr
+;
+; V23-LABEL: t3:
+; V23:       @ %bb.0: @ %entry
+; V23-NEXT:    cmp r0, #11
+; V23-NEXT:    it lt
+; V23-NEXT:    bxlt lr
+; V23-NEXT:  .LBB4_1: @ %cond_true
+; V23-NEXT:    push {r7, lr}
+; V23-NEXT:    mov r0, r1
+; V23-NEXT:    bl foo
+; V23-NEXT:    pop {r7, pc}
 entry:
-; CHECK-LABEL: t3:
-; CHECK: it lt
-; CHECK-NEXT: bxlt lr
-; CHECK: mov r0, r1
-; CHECK: bl  {{_?}}foo
 	%tmp1 = icmp sgt i32 %a, 10		; <i1> [#uses=1]
 	br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock
 
diff --git a/utils/UpdateTestChecks/asm.py b/utils/UpdateTestChecks/asm.py
index 8ef09996d4a..2a18899d55f 100644
--- a/utils/UpdateTestChecks/asm.py
+++ b/utils/UpdateTestChecks/asm.py
@@ -141,12 +141,18 @@ ASM_FUNCTION_ARM_MACHO_RE = re.compile(
      r'[ \t]*\.cfi_endproc\n',
      flags=(re.M | re.S))
 
-ASM_FUNCTION_THUMB_DARWIN_RE = re.compile(
+ASM_FUNCTION_THUMBS_DARWIN_RE = re.compile(
      r'^_(?P<func>[^:]+):\n'
      r'(?P<body>.*?)\n'
      r'[ \t]*\.data_region\n',
      flags=(re.M | re.S))
 
+ASM_FUNCTION_THUMB_DARWIN_RE = re.compile(
+     r'^_(?P<func>[^:]+):\n'
+     r'(?P<body>.*?)\n'
+     r'^[ \t]*@[ \t]--[ \t]End[ \t]function',
+     flags=(re.M | re.S))
+
 ASM_FUNCTION_ARM_IOS_RE = re.compile(
      r'^_(?P<func>[^:]+):\n'
      r'(?P<body>.*?)'
@@ -382,7 +388,8 @@ def get_run_handler(triple):
       'thumb': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_RE),
       'thumb-macho': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_MACHO_RE),
       'thumbv5-macho': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_MACHO_RE),
-      'thumbv7s-apple-darwin' : (scrub_asm_arm_eabi, ASM_FUNCTION_THUMB_DARWIN_RE),
+      'thumbv7s-apple-darwin' : (scrub_asm_arm_eabi, ASM_FUNCTION_THUMBS_DARWIN_RE),
+      'thumbv7-apple-darwin' : (scrub_asm_arm_eabi, ASM_FUNCTION_THUMB_DARWIN_RE),
       'thumbv7-apple-ios' : (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_IOS_RE),
       'm68k': (scrub_asm_m68k, ASM_FUNCTION_M68K_RE),
       'mips': (scrub_asm_mips, ASM_FUNCTION_MIPS_RE),