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Remove FrameAccess struct from hasLoadFromStackSlot
This removes the FrameAccess struct that was added to the interface in D51537, since the PseudoValue from the MachineMemoryOperand can be safely casted to a FixedStackPseudoSourceValue. Reviewers: MatzeB, thegameg, javed.absar Reviewed By: thegameg Differential Revision: https://reviews.llvm.org/D51617 llvm-svn: 341454
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@ -79,13 +79,6 @@ public:
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return Opc <= TargetOpcode::GENERIC_OP_END;
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}
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// Simple struct describing access to a FrameIndex.
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struct FrameAccess {
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const MachineMemOperand *MMO;
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int FI;
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FrameAccess(const MachineMemOperand *MMO, int FI) : MMO(MMO), FI(FI) {}
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};
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/// Given a machine instruction descriptor, returns the register
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/// class constraint for OpNum, or NULL.
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const TargetRegisterClass *getRegClass(const MCInstrDesc &MCID, unsigned OpNum,
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@ -258,8 +251,9 @@ public:
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/// If not, return false. Unlike isLoadFromStackSlot, this returns true for
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/// any instructions that loads from the stack. This is just a hint, as some
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/// cases may be missed.
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virtual bool hasLoadFromStackSlot(const MachineInstr &MI,
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SmallVectorImpl<FrameAccess> &Accesses) const;
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virtual bool hasLoadFromStackSlot(
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const MachineInstr &MI,
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SmallVectorImpl<const MachineMemOperand *> &Accesses) const;
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/// If the specified machine instruction is a direct
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/// store to a stack slot, return the virtual or physical register number of
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@ -295,8 +289,9 @@ public:
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/// If not, return false. Unlike isStoreToStackSlot,
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/// this returns true for any instructions that stores to the
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/// stack. This is just a hint, as some cases may be missed.
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virtual bool hasStoreToStackSlot(const MachineInstr &MI,
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SmallVectorImpl<FrameAccess> &Accesses) const;
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virtual bool hasStoreToStackSlot(
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const MachineInstr &MI,
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SmallVectorImpl<const MachineMemOperand *> &Accesses) const;
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/// Return true if the specified machine instruction
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/// is a copy of one stack slot to another and has no other effect.
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@ -750,19 +750,21 @@ static bool emitComments(const MachineInstr &MI, raw_ostream &CommentOS,
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const MachineFrameInfo &MFI = MF->getFrameInfo();
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bool Commented = false;
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auto getSize = [&MFI](
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const SmallVectorImpl<TargetInstrInfo::FrameAccess> &Accesses) {
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unsigned Size = 0;
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for (auto &A : Accesses)
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if (MFI.isSpillSlotObjectIndex(A.FI))
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Size += A.MMO->getSize();
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return Size;
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};
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auto getSize =
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[&MFI](const SmallVectorImpl<const MachineMemOperand *> &Accesses) {
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unsigned Size = 0;
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for (auto A : Accesses)
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if (MFI.isSpillSlotObjectIndex(
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cast<FixedStackPseudoSourceValue>(A->getPseudoValue())
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->getFrameIndex()))
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Size += A->getSize();
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return Size;
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};
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// We assume a single instruction only has a spill or reload, not
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// both.
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const MachineMemOperand *MMO;
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SmallVector<TargetInstrInfo::FrameAccess, 2> Accesses;
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SmallVector<const MachineMemOperand *, 2> Accesses;
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if (TII->isLoadFromStackSlotPostFE(MI, FI)) {
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if (MFI.isSpillSlotObjectIndex(FI)) {
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MMO = *MI.memoperands_begin();
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@ -470,7 +470,7 @@ bool LiveDebugValues::isSpillInstruction(const MachineInstr &MI,
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MachineFunction *MF, unsigned &Reg) {
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const MachineFrameInfo &FrameInfo = MF->getFrameInfo();
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int FI;
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SmallVector<TargetInstrInfo::FrameAccess, 1> Accesses;
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SmallVector<const MachineMemOperand*, 1> Accesses;
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// TODO: Handle multiple stores folded into one.
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if (!MI.hasOneMemOperand())
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@ -480,8 +480,10 @@ bool LiveDebugValues::isSpillInstruction(const MachineInstr &MI,
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if (!((TII->isStoreToStackSlotPostFE(MI, FI) &&
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FrameInfo.isSpillSlotObjectIndex(FI)) ||
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(TII->hasStoreToStackSlot(MI, Accesses) &&
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llvm::any_of(Accesses, [&FrameInfo](TargetInstrInfo::FrameAccess &FA) {
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return FrameInfo.isSpillSlotObjectIndex(FA.FI);
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llvm::any_of(Accesses, [&FrameInfo](const MachineMemOperand *MMO) {
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return FrameInfo.isSpillSlotObjectIndex(
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cast<FixedStackPseudoSourceValue>(MMO->getPseudoValue())
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->getFrameIndex());
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}))))
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return false;
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@ -3120,24 +3120,23 @@ void RAGreedy::reportNumberOfSplillsReloads(MachineLoop *L, unsigned &Reloads,
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// Handle blocks that were not included in subloops.
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if (Loops->getLoopFor(MBB) == L)
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for (MachineInstr &MI : *MBB) {
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SmallVector<TargetInstrInfo::FrameAccess, 2> Accesses;
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SmallVector<const MachineMemOperand *, 2> Accesses;
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auto isSpillSlotAccess = [&MFI](const MachineMemOperand *A) {
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return MFI.isSpillSlotObjectIndex(
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cast<FixedStackPseudoSourceValue>(A->getPseudoValue())
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->getFrameIndex());
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};
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if (TII->isLoadFromStackSlot(MI, FI) && MFI.isSpillSlotObjectIndex(FI))
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++Reloads;
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else if (TII->hasLoadFromStackSlot(MI, Accesses) &&
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llvm::any_of(Accesses,
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[&MFI](const TargetInstrInfo::FrameAccess &A) {
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return MFI.isSpillSlotObjectIndex(A.FI);
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}))
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llvm::any_of(Accesses, isSpillSlotAccess))
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++FoldedReloads;
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else if (TII->isStoreToStackSlot(MI, FI) &&
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MFI.isSpillSlotObjectIndex(FI))
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++Spills;
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else if (TII->hasStoreToStackSlot(MI, Accesses) &&
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llvm::any_of(Accesses,
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[&MFI](const TargetInstrInfo::FrameAccess &A) {
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return MFI.isSpillSlotObjectIndex(A.FI);
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}))
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llvm::any_of(Accesses, isSpillSlotAccess))
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++FoldedSpills;
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}
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@ -340,34 +340,29 @@ bool TargetInstrInfo::PredicateInstruction(
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}
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bool TargetInstrInfo::hasLoadFromStackSlot(
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const MachineInstr &MI, SmallVectorImpl<FrameAccess> &Accesses) const {
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const MachineInstr &MI,
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SmallVectorImpl<const MachineMemOperand *> &Accesses) const {
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size_t StartSize = Accesses.size();
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for (MachineInstr::mmo_iterator o = MI.memoperands_begin(),
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oe = MI.memoperands_end();
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o != oe; ++o) {
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if ((*o)->isLoad()) {
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if (const FixedStackPseudoSourceValue *Value =
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dyn_cast_or_null<FixedStackPseudoSourceValue>(
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(*o)->getPseudoValue()))
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Accesses.emplace_back(*o, Value->getFrameIndex());
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}
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if ((*o)->isLoad() &&
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dyn_cast_or_null<FixedStackPseudoSourceValue>((*o)->getPseudoValue()))
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Accesses.push_back(*o);
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}
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return Accesses.size() != StartSize;
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}
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bool TargetInstrInfo::hasStoreToStackSlot(
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const MachineInstr &MI, SmallVectorImpl<FrameAccess> &Accesses) const {
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const MachineInstr &MI,
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SmallVectorImpl<const MachineMemOperand *> &Accesses) const {
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size_t StartSize = Accesses.size();
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for (MachineInstr::mmo_iterator o = MI.memoperands_begin(),
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oe = MI.memoperands_end();
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o != oe; ++o) {
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if ((*o)->isStore()) {
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if (const FixedStackPseudoSourceValue *Value =
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dyn_cast_or_null<FixedStackPseudoSourceValue>(
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(*o)->getPseudoValue()))
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Accesses.emplace_back(*o, Value->getFrameIndex());
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}
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if ((*o)->isStore() &&
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dyn_cast_or_null<FixedStackPseudoSourceValue>((*o)->getPseudoValue()))
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Accesses.push_back(*o);
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}
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return Accesses.size() != StartSize;
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}
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@ -1172,9 +1172,11 @@ unsigned ARMBaseInstrInfo::isStoreToStackSlot(const MachineInstr &MI,
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unsigned ARMBaseInstrInfo::isStoreToStackSlotPostFE(const MachineInstr &MI,
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int &FrameIndex) const {
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SmallVector<TargetInstrInfo::FrameAccess, 1> Accesses;
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SmallVector<const MachineMemOperand *, 1> Accesses;
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if (MI.mayStore() && hasStoreToStackSlot(MI, Accesses)) {
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FrameIndex = Accesses.begin()->FI;
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FrameIndex =
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cast<FixedStackPseudoSourceValue>(Accesses.front()->getPseudoValue())
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->getFrameIndex();
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return true;
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}
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return false;
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@ -1390,9 +1392,11 @@ unsigned ARMBaseInstrInfo::isLoadFromStackSlot(const MachineInstr &MI,
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unsigned ARMBaseInstrInfo::isLoadFromStackSlotPostFE(const MachineInstr &MI,
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int &FrameIndex) const {
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SmallVector<TargetInstrInfo::FrameAccess, 1> Accesses;
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SmallVector<const MachineMemOperand *, 1> Accesses;
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if (MI.mayLoad() && hasLoadFromStackSlot(MI, Accesses)) {
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FrameIndex = Accesses.begin()->FI;
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FrameIndex =
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cast<FixedStackPseudoSourceValue>(Accesses.front()->getPseudoValue())
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->getFrameIndex();
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return true;
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}
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return false;
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@ -337,7 +337,7 @@ unsigned HexagonInstrInfo::isStoreToStackSlot(const MachineInstr &MI,
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/// operand of that instruction if true.
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bool HexagonInstrInfo::hasLoadFromStackSlot(
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const MachineInstr &MI,
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SmallVectorImpl<TargetInstrInfo::FrameAccess> &Accesses) const {
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SmallVectorImpl<const MachineMemOperand *> &Accesses) const {
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if (MI.isBundle()) {
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const MachineBasicBlock *MBB = MI.getParent();
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MachineBasicBlock::const_instr_iterator MII = MI.getIterator();
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@ -355,7 +355,7 @@ bool HexagonInstrInfo::hasLoadFromStackSlot(
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/// operand of that instruction if true.
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bool HexagonInstrInfo::hasStoreToStackSlot(
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const MachineInstr &MI,
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SmallVectorImpl<TargetInstrInfo::FrameAccess> &Accesses) const {
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SmallVectorImpl<const MachineMemOperand *> &Accesses) const {
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if (MI.isBundle()) {
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const MachineBasicBlock *MBB = MI.getParent();
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MachineBasicBlock::const_instr_iterator MII = MI.getIterator();
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@ -71,14 +71,14 @@ public:
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/// if true.
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bool hasLoadFromStackSlot(
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const MachineInstr &MI,
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SmallVectorImpl<TargetInstrInfo::FrameAccess> &Accesses) const override;
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SmallVectorImpl<const MachineMemOperand *> &Accesses) const override;
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/// Check if the instruction or the bundle of instructions has
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/// store to stack slots. Return the frameindex and machine memory operand
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/// if true.
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bool hasStoreToStackSlot(
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const MachineInstr &MI,
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SmallVectorImpl<TargetInstrInfo::FrameAccess> &Accesses) const override;
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SmallVectorImpl<const MachineMemOperand *> &Accesses) const override;
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/// Analyze the branching code at the end of MBB, returning
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/// true if it cannot be understood (e.g. it's a switch dispatch or isn't
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@ -733,9 +733,11 @@ unsigned LanaiInstrInfo::isLoadFromStackSlotPostFE(const MachineInstr &MI,
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if ((Reg = isLoadFromStackSlot(MI, FrameIndex)))
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return Reg;
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// Check for post-frame index elimination operations
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SmallVector<TargetInstrInfo::FrameAccess, 1> Accesses;
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SmallVector<const MachineMemOperand *, 1> Accesses;
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if (hasLoadFromStackSlot(MI, Accesses)){
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FrameIndex = Accesses.begin()->FI;
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FrameIndex =
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cast<FixedStackPseudoSourceValue>(Accesses.front()->getPseudoValue())
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->getFrameIndex();
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return 1;
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}
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}
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@ -411,9 +411,11 @@ unsigned X86InstrInfo::isLoadFromStackSlotPostFE(const MachineInstr &MI,
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if ((Reg = isLoadFromStackSlot(MI, FrameIndex)))
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return Reg;
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// Check for post-frame index elimination operations
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SmallVector<TargetInstrInfo::FrameAccess, 1> Accesses;
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SmallVector<const MachineMemOperand *, 1> Accesses;
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if (hasLoadFromStackSlot(MI, Accesses)) {
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FrameIndex = Accesses.begin()->FI;
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FrameIndex =
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cast<FixedStackPseudoSourceValue>(Accesses.front()->getPseudoValue())
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->getFrameIndex();
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return 1;
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}
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}
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@ -444,9 +446,11 @@ unsigned X86InstrInfo::isStoreToStackSlotPostFE(const MachineInstr &MI,
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if ((Reg = isStoreToStackSlot(MI, FrameIndex)))
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return Reg;
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// Check for post-frame index elimination operations
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SmallVector<TargetInstrInfo::FrameAccess, 1> Accesses;
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SmallVector<const MachineMemOperand *, 1> Accesses;
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if (hasStoreToStackSlot(MI, Accesses)) {
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FrameIndex = Accesses.begin()->FI;
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FrameIndex =
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cast<FixedStackPseudoSourceValue>(Accesses.front()->getPseudoValue())
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->getFrameIndex();
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return 1;
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}
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}
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